STMICROELECTRONICS VND5E025AK-E

VND5E025AK-E
Double channel high side driver with analog current sense
for automotive applications
Features
Max transient supply voltage
VCC
41V
Operating voltage range
VCC
4.5 to 28V
Max On-state resistance (per ch.)
RON
25mΩ
Current limitation (typ)
ILIMH
60A
Off state supply current
IS
2 µA(1)
PowerSSO-24
– Reverse battery protected (see Figure 32.)
– Electrostatic discharge protection
1. Typical value with all loads connected.
■
■
■
General
– Inrush current active management by
power limitation
– Very low stand-by current
– 3.0V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC
european directive
– Very low current sense leakage
Diagnostic functions
– Proportional load current sense
– High current sense precision for wide
currents range
– Current sense disable
– Off state open load detection
– Output short to VCC detection
– Overload and short to ground (power
limitation) indication
– Thermal shutdown indication
Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of VCC
– Over-temperature shutdown with
autorestart (thermal shut down)
April 2008
Application
■
All types of resistive, inductive and capacitive
loads
■
Suitable as LED driver
Description
The VND5E025AK-E is a double channel highside drivers manufactured in the ST proprietary
VIPower M0-5 technology and housed in the tiny
PowerSSO-24 package. The VND5E025AK-E is
designed to drive 12V automotive grounded loads
delivering protection, diagnostics and easy 3V
and 5V CMOS compatible interface with any
microcontroller.
The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, over-temperature shut-off with
auto-restart and over-voltage active clamp. A
dedicated analog current sense pin is associated
with every output channel in order to provide
Ehnanced diagnostic functions including fast
detection of overload and short-circuit to ground
through power limitation indication, overtemperature indication, short-circuit to Vcc
diagnosis and ON & OFF state open load
detection. The current sensing and diagnostic
feedback of the whole device can be disabled by
pulling the CS_DIS pin high to allow sharing of
the external sense resistor with other similar
devices.
Rev 1
1/37
www.st.com
37
Contents
VND5E025AK-E
Contents
1
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.5
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.1
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 24
3.1.1
Solution 1 : resistor in the ground line (RGND only) . . . . . . . . . . . . . . . 24
3.1.2
Solution 2 : diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 25
3.2
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.3
MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.4
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.4.1
3.5
4
Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 28
Package and thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.1
5
Short to VCC and OFF state open load detection . . . . . . . . . . . . . . . . . 27
PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.1
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.2
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.3
Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2/37
VND5E025AK-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Current sense (8V < VCC < 18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Openload detection (8V < VCC < 18V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
3/37
List of figures
VND5E025AK-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
4/37
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Openload Off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Delay response time between rising edge of ouput current and rising edge of current sense
(CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
IOUT/ISENSE vs. IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Maximum current sense ratio drift vs. load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Overload or Short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Intermittent Overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
OFF-State Open Load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Short to VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
TJ evolution in Overload or Short to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
On state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
On state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Turn- On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Turn-Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Maximum turn off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 28
PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Rthj-amb vs PCB copper area in open box free air condition ( one channel ON). . . . . . . . 29
PowerSSO-24 thermal impedance junction to ambient single pulse (one channel ON). . . 30
Thermal fitting model of a double channel HSD in PowerSSO-24 . . . . . . . . . . . . . . . . . . 30
PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
PowerSSO-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
VND5E025AK-E
Block diagram and pin description
Figure 1.
Block diagram
VCC
S ignal C lamp
Undervoltage
C ontrol & Diagnostic 1
IN1
P ower
C lamp
DR IVE R
IN2
V ON
Limitation
Over
temp.
CH 1
C urrent
Limitation
OFF S tate
Open load
C S_
DIS
V S E NSE H
C S1
C ONTROL & DIAG NOS TIC
C hannels 2
1
Block diagram and pin description
CH 2
C urrent
S ense
C S2
OUT2
OUT1
LOG IC
OVE R LOAD P R OTE C TION
(AC TIVE P OWE R LIMITATION)
G ND
Table 1.
Pin functions
Name
VCC
OUTPUT1,2
GND
INPUT1,2
Function
Battery connection.
Power output.
Ground connection. Must be reverse battery protected by an external
diode / resistor network.
Voltage controlled input pin with hysteresis, CMOS compatible. Controls
output switch state.
CURRENT SENSE1,2
Analog current sense pin; delivers a current proportional to the load
current.
CS_DIS
Active high CMOS compatible pin to disable the current sense pin.
5/37
Block diagram and pin description
Figure 2.
VND5E025AK-E
Configuration diagram (top view)
VCC
GND
N.C.
INPUT2
N.C.
INPUT1
N.C.
CURRENT SENSE1
N.C.
CURRENT SENSE2
CS_DIS.
VCC
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
TAB = VCC
Table 2.
6/37
Suggested connections for unused and not connected pins
Connection / pin
Current sense
N.C.
Output
Input
CS_DIS
Floating
Not allowed
X
X
X
X
To ground
Through 1kΩ
resistor
X
Through 22kΩ
resistor
Through 10kΩ
resistor
Through 10kΩ
resistor
VND5E025AK-E
2
Electrical specification
Electrical specification
Figure 3.
Current and voltage conventions
IS
VCC
ICSD
VCSD
CS_DIS
OUTPUT1
INPUT1
CURRENT
SENSE1
VCC
VOUT1
ISENSE1
IIN1
VIN1
VFn
IOUT1
IIN2
IOUT2
VSENSE1
OUTPUT2
INPUT2
ISENSE2
VIN2
VOUT2
CURRENT
SENSE2
GND
VSENSE2
IGND
Note:
VFn = VOUTn - VCC during reverse battery condition.
2.1
Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality document.
Table 3.
Absolute maximum ratings
Symbol
Parameter
Value
VCC
DC supply voltage
41
-VCC
Reverse DC supply voltage
0.3
-IGND
DC reverse ground pin current
200
IOUT
DC output current
- IOUT
Reverse DC output current
IIN
ICSD
Unit
V
mA
Internally limited
A
24
DC input current
-1 to 10
DC current sense disable input current
-ICSENSE
DC reverse CS pin current
VCSENSE
Current sense maximum voltage
mA
200
VCC - 41 to +VCC
V
7/37
Electrical specification
Table 3.
VND5E025AK-E
Absolute maximum ratings (continued)
Symbol
Unit
140
mJ
EMAX
VESD
Electrostatic discharge
(Human Body Model: R = 1.5kΩ; C = 100pF)
- INPUT
- CURRENT SENSE
- CS_DIS
- OUTPUT
- VCC
4000
2000
4000
5000
5000
V
V
V
V
V
VESD
Charge device model (CDM-AEC-Q100-011)
750
V
Tstg
Junction operating temperature
- 40 to 150
Storage temperature
- 55 to 150
°C
Thermal data
Table 4.
Symbol
Thermal data
Parameter
Rthj-case Thermal resistance junction-case (with one channel ON)
Rthj-amb Thermal resistance junction-ambient
8/37
Value
Maximum switching energy (single pulse)
(L = 0.8 mH; RL = 0Ω; Vbat = 13.5V; Tjstart = 150°C;
IOUT = IlimL(Typ.) )
Tj
2.2
Parameter
Max. value
Unit
1.35
°C/W
See Figure 36
VND5E025AK-E
2.3
Electrical specification
Electrical characteristics
Values specified in this section are for 8V<VCC<28V; -40°C<Tj<150°C, unless otherwise
stated.
Table 5.
Power section
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
4.5
13
28
4.5
VCC
Operating supply
voltage
VUSD
Undervoltage shutdown
3.5
VUSDhyst
Undervoltage shutdown
hysteresis
0.5
RON
Vclamp
IS
IL(off1)
VF
On state resistance (1)
Clamp voltage
Supply current
IOUT = 3A; Tj = 25°C
25
IOUT = 3A; Tj = 150°C
50
IOUT = 3A; VCC = 5V; Tj = 25°C
35
IS = 20 mA
41
Output - VCC diode
voltage (1)
0
VIN = VOUT = 0V; VCC = 13V;
Tj = 125°C
0
mΩ
52
V
2 (2)
5 (2)
µA
3
6
mA
0.01
3
On State; VCC = 13V; VIN = 5V;
IOUT = 0A
Off state output
current (1)
V
46
Off State; VCC = 13V; Tj = 25°C;
VIN = VOUT = VSENSE = VCSD = 0V
VIN = VOUT = 0V; VCC = 13V;
Tj = 25°C
Unit
µA
5
-IOUT = 4 A; Tj = 150°C
0.7
V
1. For each channel.
2. PowerMOS leakage included.
Table 6.
Symbol
Switching (VCC = 13V; Tj = 25°C)
Parameter
td(on)
Turn-On delay time
td(off)
Turn-Off delay time
(dVOUT/dt)on Turn-On voltage slope
(dVOUT/dt)off Turn-Off voltage slope
WON
Switching energy losses
during tWON
WOFF
Switching energy losses
during tWOFF
Test conditions
RL = 4.3 Ω
(see Figure 6)
RL = 4.3 Ω
RL = 4.3 Ω
(see Figure 6)
Min.
Typ.
Max. Unit
20
µs
40
See Figure 27
V/µs
See Figure 28
0.6
mJ
0.35
9/37
Electrical specification
Table 7.
Symbol
VND5E025AK-E
Logic inputs
Parameter
VIL
Input low level voltage
IIL
Low level input current
VIH
Input high level voltage
IIH
High level input current
VI(hyst)
Input hysteresis voltage
VICL
ICSDL
Low level CS_DIS current
VCSDH
CS_DIS high level voltage
ICSDH
High level CS_DIS current
VCSD(hyst)
CS_DIS hysteresis voltage
Symbol
Unit
0.9
V
µA
2.1
V
10
0.25
IIN = 1mA
5.5
7
V
-0.7
0.9
VCSD = 0.9V
1
µA
2.1
V
VCSD = 2.1V
10
µA
7
V
Max.
Unit
0.25
ICSD = 1mA
5.5
-0.7
Parameter
ILIML
TTSD
Shutdown temperature
Test conditions
Min.
Typ.
VCC = 13V
43
60
85
5V < VCC < 28V
TR
Reset temperature
TRS
Thermal reset of STATUS
Output voltage drop
limitation
15
150
175
TRS + 1
TRS + 5
200
°C
135
Thermal hysteresis
(TTSD-TR)
Turn-Off output voltage
clamp
A
VCC = 13V;
TR < Tj < TTSD
7
IOUT= 2A; VIN = 0;
L = 6 mH
VCC - 41 VCC - 46 VCC - 52
V
IOUT = 0.1A;
Tj = -40°C to +150°C
(see Figure 8)
25
mV
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
10/37
µA
Protections and diagnostics (1)
Short circuit current
during thermal cycling
VON
Max.
1
ICSD = -1mA
DC short circuit current
VDEMAG
Typ.
VIN = 2.1V
CS_DIS clamp voltage
ILIMH
THYST
Min.
IIN = -1mA
CS_DIS low level voltage
Table 8.
VIN = 0.9V
Input clamp voltage
VCSDL
VCSCL
Test conditions
VND5E025AK-E
Electrical specification
Table 9.
Symbol
Current sense (8V < VCC < 18V)
Parameter
Test conditions
Min. Typ. Max. Unit
KLED
IOUT/ISENSE
IOUT = 0.05A; VSENSE = 0.5V; VCSD = 0V;
1240 3350 4960
Tj = -40°C to 150°C
K0
IOUT/ISENSE
IOUT = 0.5A; VSENSE = 0.5V; VCSD = 0V;
Tj = -40°C to 150°C
IOUT/ISENSE
IOUT = 2 A; VSENSE = 4 V;
VCSD = 0V;
Tj = -40°C to 150°C
Tj = 25°C to 150°C
Current sense
ratio drift
IOUT = 2 A; VSENSE = 4 V;
VCSD = 0V;
Tj = -40°C to 150°C
IOUT/ISENSE
IOUT = 3 A; VSENSE = 4V;
VCSD = 0V;
Tj = -40°C to 150°C
Tj = 25°C to150°C
Current sense
ratio drift
IOUT = 3 A; VSENSE = 4V; VCSD = 0V;
Tj = -40°C to 150°C
IOUT/ISENSE
IOUT = 10 A; VSENSE = 4V;
VCSD = 0V;
Tj = -40°C to 150°C
Tj = 25°C to 150°C
Current sense
ratio drift
IOUT = 10 A; VSENSE = 4V; VCSD = 0V;
Tj = -40°C to 150°C
K1
dK1/K1(1)
K2
dK2/K2(1)
K3
dK3/K3(1)
ISENSE0
Analog sense
leakage current
1860 3150 4600
2100 3100 4400
2250 3100 3850
-13
13
%
2200 3000 4100
2450 3000 3550
-12
12
%
2550 2850 3280
2650 2850 3180
-6
+6
%
IOUT = 0A; VSENSE = 0V;
VCSD = 5V; VIN = 0V; Tj = -40°C to 150°C
VCSD = 0V; VIN = 5V; Tj = -40°C to 150°C
0
0
1
2
µA
µA
IOUT = 2A; VSENSE = 0V;
VCSD = 5V; VIN = 5V; Tj = -40°C to 150°C
0
1
µA
30
mA
IOL
Openload ON
state current
detection
threshold
VIN = 5V, 8V<VCC<18V
ISENSE= 5 µA
5
VSENSE
Max analog
sense output
voltage
IOUT = 3 A; VCSD = 0V
5
VSENSEH
Analog sense
output voltage in VCC = 13V; RSENSE = 3.9kΩ
fault condition(1)
8
ISENSEH
Analog sense
output current in VCC = 13V; VSENSE = 5V
fault condition(2)
9
V
mA
11/37
Electrical specification
Table 9.
VND5E025AK-E
Current sense (8V < VCC < 18V) (continued)
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
tDSENSE1H
Delay response V
< 4V, 0.5 < I
< 10A
time from falling I SENSE= 90% of I OUT
SENSEMAX
edge of CS_DIS SENSE
(see Figure 4)
pin
30
100
tDSENSE1L
Delay response V
< 4V, 0.5 < I
< 10A
time from rising I SENSE= 10% of I OUT
SENSE
SENSEMAX
edge of CS_DIS
(see Figure 4)
pin
5
20
tDSENSE2H
Delay response
time from rising
edge of INPUT
pin
80
300
Delay response
time between
rising edge of
∆tDSENSE2H
output current
and rising edge
of current sense
tDSENSE2L
Delay response
time from falling
edge of INPUT
pin
VSENSE < 4V, 0.5 < IOUT < 10A
ISENSE = 90% of ISENSEMAX
(see Figure 4)
µs
VSENSE < 4V,
ISENSE = 90% of ISENSEMAX,
IOUT = 90% of IOUTMAX, IOUTMAX = 3A
(see Figure 7)
110
VSENSE < 4V, 0.5 < IOUT < 10A
ISENSE = 10% of ISENSEMAX
(see Figure 4)
70
250
1. Fault condition includes: power limitation, overtemperature and open load OFF state detection.
Table 10.
Symbol
VOL
tDSTKON
12/37
Openload detection (8V < VCC < 18V)
Parameter
Test condition
Openload Off State
V = 0V
voltage detection threshold IN
Output short circuit to VCC
See Figure 5
detection delay at turn Off
Min.
Typ.
Max.
Unit
2
See
Figure 5
4
V
180
1200
µs
IL(off2)r
Off state output current at
VOUT = 4V
VIN=0V; VSENSE=0V
VOUT rising from 0V to 4V
-120
0
µA
IL(off2)f
Off state output current at
VOUT = 2V
VIN=0V; VSENSE=VSENSEH
VOUT falling from VCC to 2V
-50
90
µA
td_vol
Delay response from
output rising edge to
VSENSE rising edge in
openload
VOUT= 4 V; VIN= 0V
VSENSE= 90% of VSENSEH
20
µs
VND5E025AK-E
Electrical specification
Figure 4.
Current sense delay characteristics
INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
tDSENSE2H
Figure 5.
tDSENSE1L
tDSENSE1H
tDSENSE2L
Openload Off-state delay timing
OUTPUT STUCK TO VCC
VIN
VOUT > VOL
VSENSEH
VCS
tDSTKON
Figure 6.
Switching characteristics
tWoff
tWon
VOUT
90%
80%
dVOUT/dt(off)
dVOUT/dt(on)
tr
tf
10%
t
INPUT
td(on)
td(off)
t
13/37
Electrical specification
Figure 7.
VND5E025AK-E
Delay response time between rising edge of ouput current and rising
edge of current sense (CS enabled)
VIN
∆tDSENSE2H
t
IOUT
IOUTMAX
90% IOUTMAX
t
ISENSE
ISENSEMAX
90% ISENSEMAX
t
Figure 8.
Output voltage drop limitation
VCC - VOUT
Tj = 150oC
Tj = 25oC
Tj = -40oC
Von
Von/Ron(T)
14/37
IOUT
VND5E025AK-E
Electrical specification
Figure 9.
IOUT/ISENSE vs. IOUT
Iout / Isense
4700
max Tj = -40 °C to 150 °C
4200
max Tj = 25 °C to 150 °C
3700
3200
typical value
2700
min Tj = 25 °C to 150 °C
2200
min Tj = -40 °C to 150 °C
1700
1200
2
3
4
5
6
7
8
9
10
IOUT (A)
Figure 10. Maximum current sense ratio drift vs. load current
dk/k(%)
20
15
10
5
0
-5
-10
-15
-20
2
Note:
3
4
5
6
IOUT (A)
7
8
9
10
Parameter guaranteed by design; it is not tested.
15/37
Electrical specification
Table 11.
VND5E025AK-E
Truth table
Input
Output
Sense (VCSD=0V)(1)
Normal operation
L
H
L
H
0
Nominal
Overtemperature
L
H
L
L
0
VSENSEH
Undervoltage
L
H
L
L
0
0
H
X
(no power limitation)
Cycling
(power limitation)
Nominal
Conditions
Overload
H
VSENSEH
Short circuit to GND
(Power limitation)
L
H
L
L
0
VSENSEH
Open load OFF state
(with external pul up)
L
H
VSENSEH
Short circuit to VCC
(external pull up
disconnected)
L
H
H
H
VSENSEH
< Nominal
Negative output voltage
clamp
L
L
0
1. If the VCSD is high, the SENSE output is at a high impedance, its potential depends on leakage currents
and external circuit.
16/37
VND5E025AK-E
Electrical specification
Table 12.
ISO 7637-2:
2004(E)
Test pulse
Electrical transient requirements
Test levels (1)
III
IV
1
-75V
-100V
2a
+37V
3a
Number of
pulses or
test times
Burst cycle / pulse
repetition time
Delays and
Impedance
Min.
Max.
5000 pulses
0.5s
5s
2 ms, 10Ω
+50V
5000 pulses
0.2s
5s
50µs, 2Ω
-100V
-150V
1h
90ms
100ms
0.1µs, 50Ω
3b
+75V
+100V
1h
90ms
100ms
0.1µs, 50Ω
4
-6V
-7V
1 pulse
100ms, 0.01Ω
+65V
+87V
1 pulse
400ms, 2Ω
(2)
5b
ISO 7637-2:
2004E
Test pulse
III
VI
1
C
C
2a
C
C
3a
C
C
3b
C
C
4
C
C
5b(2)
C
C
Class
Test level results
Contents
C
All functions of the device performed as designed after exposure to disturbance.
E
One or more functions of the device did not perform as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b.
2. Valid in case of external load dump clamp: 40V maximum referred to ground.
17/37
Electrical specification
2.4
VND5E025AK-E
Waveforms
Figure 11. Normal operation
Normal operation
INPUT
Nominal load
Nominal load
IOUT
VSENSE
VCS_DIS
Figure 12. Overload or Short to GND
Overload or Short to GND
INPUT
ILimH >
Power Limitation
Thermal cycling
ILimL >
IOUT
VSENSE
VCS_DIS
18/37
VND5E025AK-E
Electrical specification
Figure 13. Intermittent Overload
Intermittent Overload
INPUT
Overload
ILimH >
ILimL >
Nominal load
IOUT
VSENSEH>
VSENSE
VCS_DIS
Figure 14. OFF-State Open Load with external circuitry
OFF-State Open Load
with external circuitry
INPUT
VOUT > VOL
VOUT
VOL
IOUT
VSENSEH >
tDSTK(on)
VSENSE
VCS_DIS
19/37
Electrical specification
VND5E025AK-E
Figure 15. Short to VCC
Short to VCC
Resistive
Short to VCC
Hard
Short to VCC
VOUT > VOL
VOL
VOUT
IOUT
tDSTK(on)
tDSTK(on)
VCS_DIS
Figure 16. TJ evolution in Overload or Short to GND
TJ evolution in
Overload or Short to GND
INPUT
Self-limitation of fast thermal transients
TTSD
THYST
TR
TJ_START
TJ
ILimH >
Power Limitation
< ILimL
IOUT
20/37
VND5E025AK-E
2.5
Electrical specification
Electrical characteristics curves
Figure 17. Off state output current
Figure 18. High level input current
Iloff (nA)
Iih (µA)
1000
5
900
4,5
Off State
Vcc=13V
Vin=Vout=0V
800
700
Vin = 2.1V
VCC = 8 V
4
3,5
600
3
500
2,5
400
2
300
1,5
200
1
100
0,5
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
50
75
100
125
150
175
100
125
150
175
150
175
Tc (°C)
Figure 19. Input clamp voltage
Figure 20. Input high level
Vicl (V)
Vih (V)
7
4
6,8
3,5
lin=1mA
6,6
3
6,4
2,5
6,2
6
2
5,8
1,5
5,6
1
5,4
0,5
5,2
5
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
50
75
Tc (°C)
Figure 21. Input low level
Figure 22. Input hysteresis voltage
Vil (V)
Vihyst (V)
2
1
1,8
0,9
1,6
0,8
1,4
0,7
1,2
0,6
1
0,5
0,8
0,4
0,6
0,3
0,4
0,2
0,2
0,1
0
0
-50
-25
0
25
50
75
Tc (°C)
100
125
150
175
-50
-25
0
25
50
75
100
125
Tc (°C)
21/37
Electrical specification
VND5E025AK-E
Figure 23. On state resistance vs Tcase
Figure 24. On state resistance vs VCC
Ron (mOhm)
Ron (mOhm)
70
60
60
Iout= 3A
Vcc=13V
50
Tc=150°C
50
40
40
Tc=125°C
30
30
Tc=25°C
20
20
Tc=-40°C
10
10
0
0
-50
-25
0
25
50
75
100
125
150
175
0
5
10
15
Tc (°C)
20
25
30
35
40
150
175
150
175
Vcc (V)
Figure 25. Undervoltage shutdown
Figure 26. ILIMH vs Tcase
Vusd (V)
Ilimh (A)
16
70
14
65
Vcc=13V
12
60
10
55
8
6
50
4
45
2
40
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Figure 27. Turn- On voltage slope
75
100
125
Figure 28. Turn-Off voltage slope
(dVout/dt )On (V/ms)
(dVout/dt )Off (V/ms)
700
600
600
500
Vcc=13V
RI=4.3 Ohm
500
50
Tc (°C)
Tc (°C)
Vcc=13V
RI= 4.3 Ohm
400
400
300
300
200
200
100
100
0
0
-50
-25
0
25
50
75
Tc (°C)
22/37
100
125
150
175
-50
-25
0
25
50
75
Tc (°C)
100
125
VND5E025AK-E
Electrical specification
Figure 29. CS_DIS high level voltage
Figure 30. CS_DIS low level voltage
Vcsdh (V)
Vcsdl (V)
4
3
3,5
2,5
3
2
2,5
2
1,5
1,5
1
1
0,5
0,5
0
0
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Figure 31. CS_DIS clamp voltage
Vcsdcl(V)
10
9
8
Icsd = 1 mA
7
6
5
4
3
2
1
0
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
23/37
Application information
3
VND5E025AK-E
Application information
Figure 32. Application schematic
+5V
VCC
Rprot
CS_DIS
Dld
ΜCU
Rprot
INPUT
OUTPUT
Rprot
CURRENT SENSE
GND
RSENSE
CEXT
VGND
RGND
DGND
Note:
Channel 2 has the same internal circuit as channel 1.
3.1
GND protection network against reverse battery
This section provides two solutions for implementing a ground protection network against
reverse battery.
3.1.1
Solution 1 : resistor in the ground line (RGND only)
This can be used with any type of load.
The following is an indication on how to dimension the RGND resistor.
1.
RGND ≤600mV / (IS(on)max)
2.
RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power dissipation in RGND (when VCC<0: during reverse battery situations) is:
PD= (-VCC)2/RGND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum On-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift will vary depending on how many devices are On in the case of several
high side drivers sharing the same RGND.
24/37
VND5E025AK-E
Application information
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Solution 2 (see below).
3.1.2
Solution 2 : diode (DGND) in the ground line
A resistor (RGND=1kΩ) should be inserted in parallel to DGND if the device drives an
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network will produce a shift (≈ 600mV) in the input
threshold and in the status output values if the microprocessor ground is not common to the
device ground. This shift will not vary if more than one HSD shares the same diode/resistor
network.
3.2
Load dump protection
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
VCC max DC rating. The same applies if the device is subject to transients on the VCC line
that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
3.3
MCU I/Os protection
If a ground protection network is used and negative transient are present on the VCC line,
the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to
prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of µC and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC
I/Os:
-VCCpeak/Ilatchup ≤Rprot ≤(VOHµC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak = - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
5kΩ ≤Rprot ≤180kΩ
Recommended values: Rprot =10kΩ, CEXT=10nF.
25/37
Application information
3.4
VND5E025AK-E
Current sense and diagnostic
The current sense pin performs a double function (see Figure 33: Current sense and
diagnostic):
●
Current mirror of the load current in normal operation, delivering a current
proportional to the load one according to a know ratio KX.
The current ISENSE can be easily converted to a voltage VSENSE by means of an
external resistor RSENSE. Linearity between IOUT and VSENSE is ensured up to 5V
minimum (see parameter VSENSE in Table 9: Current sense (8V < VCC < 18V)). The
current sense accuracy depends on the output current (refer to current sense electrical
characteristics Table 9: Current sense (8V < VCC < 18V)).
●
Diagnostic flag in fault conditions, delivering a fixed voltage VSENSEH up to a
maximum current ISENSEH in case of the following fault conditions (refer to Truth table):
–
Power limitation activation
–
Over-temperature
–
Short to VCC in OFF state
–
Open load in OFF state with additional external components.
A logic level high on CS_DIS pin sets at the same time all the current sense pins of the
device in a high impedance state, thus disabling the current monitoring and diagnostic
detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of
sense resistance and ADC line among different devices.
Figure 33. Current sense and diagnostic
VPU
VBAT
VCC
Main MOSn
41V
PU_CMD
Overtemperature
IOUT/KX
RPU
+
OL OFF
ISENSEH
VOL
Pwr_Lim
CS_DIS
OUTn
ILoff2r
ILoff2f
INPUTn
VSENSEH
CURRENT
SENSEn
RPROT
To uC ADC
26/37
RSENSE
GND
Load
RPD
VSENSE
VND5E025AK-E
3.4.1
Application information
Short to VCC and OFF state open load detection
Short to VCC
A short circuit between VCC and output is indicated by the relevant current sense pin set to
VSENSEH during the device off state. Small or no current is delivered by the current sense
during the on state depending on the nature of the short circuit.
OFF state open load with external circuitry
Detection of an open load in off mode requires an external pull-up resistor RPU connecting
the output to a positive supply voltage VPU.
It is preferable VPU to be switched off during the module stand-by mode in order to avoid the
overall stand-by current consumption to increase in normal conditions, i.e. when load is
connected.
An external pull down resistor RPD connected between output and GND is mandatory to
avoid misdetection in case of floating outputs in off state (see Figure 33: Current sense and
diagnostic).
RPD must be selected in order to ensure VOUT < VOLmin unless pulled up by the external
circuitry:
VOUT
Pull − up _ OFF
= RPD ⋅ I L ( off 2 ) f < VOL min = 2V
RPD ≤22 KΩ is recommended.
For proper open load detection in off state, the external pull-up resistor must be selected
according to the following formula:
VOUT
Pull − up _ ON
=
RPD ⋅ VPU − RPU ⋅ RPD ⋅ I L ( off 2) r
RPU + RPD
> VOL max = 4V
For the values of VOLmin ,VOLmax, IL(off2)r and IL(off2)f see Table 10: Openload detection
(8V < VCC < 18V).
27/37
Application information
3.5
VND5E025AK-E
Maximum demagnetization energy (VCC = 13.5V)
Figure 34. Maximum turn off current versus inductance (for each channel)
100
A
B
C
I (A)
10
1
0,1
1
L (mH)
10
100
A: Tjstart = 150°C single pulse
B: Tjstart = 100°C repetitive pulse
C: Tjstart = 125°C repetitive pulse
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
Note:
Values are generated with RL = 0 Ω.
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse
must not exceed the temperature specified above for curves A and B.
28/37
VND5E025AK-E
Package and thermal data
4
Package and thermal data
4.1
PowerSSO-24 thermal data
Figure 35. PowerSSO-24 PC board
Note:
Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4
area = 77mm x 86mm, PCB thickness = 1.6mm, Cu thickness = 70µm (front and back side),
Copper areas: from minimum pad layout to 8cm2).
Figure 36. Rthj-amb vs PCB copper area in open box free air condition ( one channel
ON)
RTHj_amb(°C/W)
55
50
45
40
35
30
0
2
4
6
8
10
PCB Cu heatsink area (cm^2)
29/37
Package and thermal data
VND5E025AK-E
Figure 37. PowerSSO-24 thermal impedance junction to ambient single pulse (one
channel ON)
ZTH (°C/W)
1000
100
Footprint
2 cm2
8 cm2
10
1
0.1
0.0001
0.001
0.01
0.1
1
Time (s)
10
100
1000
Equation 1: pulse calculation formula
Z
THδ
= R
TH
⋅ δ+Z
THtp
( 1 – δ)
where δ = tP/T
Figure 38. Thermal fitting model of a double channel HSD in PowerSSO-24 (a)
a. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
30/37
VND5E025AK-E
Package and thermal data
Table 13.
Thermal parameters
Area/Island (cm2)
Footprint
R1 (°C/W)
0.28
R2 (°C/W)
0.9
R3 (°C/W)
6
R4 (°C/W)
7.7
R5 (°C/W)
2
8
9
9
8
R6 (°C/W)
28
17
10
R7 (°C/W)
0.28
R8 (°C/W)
0.9
C1 (W.s/°C)
0.001
C2 (W.s/°C)
0.003
C3 (W.s/°C)
0.025
C4 (W.s/°C)
0.75
C5 (W.s/°C)
1
4
9
C6 (W.s/°C)
2.2
5
17
C7 (W.s/°C)
0.001
C8 (W.s/°C)
0.003
31/37
Package and packing information
5
Package and packing information
5.1
ECOPACK® packages
VND5E025AK-E
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. ECOPACK® packages are lead-free. The category of Second Level Interconnect
is marked on the package and on the inner box label, in compliance with JEDEC Standard
JESD97. The maximum ratings related to soldering conditions are also marked on the inner
box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com.
5.2
Package mechanical data
Figure 39. PowerSSO-24 package dimensions
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VND5E025AK-E
Package and packing information
Table 14.
PowerSSO-24 mechanical data
Millimeters
Symbol
Min.
Typ.
Max.
A
2.15
2.47
A2
2.15
2.40
a1
0
0.075
b
0.33
0.51
c
0.23
0.32
D
10.10
10.50
E
7.4
7.6
e
0.8
e3
8.8
G
0.1
G1
0.06
H
10.1
10.5
h
0.4
k
L
5°
0.55
N
0.85
10°
X
4.1
4.7
Y
6.5
7.1
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Package and packing information
5.3
VND5E025AK-E
Packing information
Figure 40. PowerSSO-24 tube shipment (no suffix)
Base Qty
Bulk Qty
Tube length (±0.5)
A
B
C (±0.1)
C
B
49
1225
532
3.5
13.8
0.6
All dimensions are in mm.
A
Figure 41. PowerSSO-24 tape and reel shipment (suffix “TR”)
REEL DIMENSIONS
Base Qty
Bulk Qty
A (max)
B (min)
C (±0.2)
F
G (+2 / -0)
N (min)
T (max)
1000
1000
330
1.5
13
20.2
24.4
100
30.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (±0.1)
P
D (±0.05)
D1 (min)
F (±0.1)
K (max)
P1 (±0.1)
24
4
12
1.55
1.5
11.5
2.85
2
End
All dimensions are in mm.
Start
Top
cover
tape
No components Components
500mm min
500mm min
Empty components pockets
sealed with cover tape.
User direction of feed
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No components
VND5E025AK-E
6
Order codes
Order codes
Table 15.
Device summary
Order codes
Package
PowerSSO-24
Part number (tube)
Part number (tape & reel)
VND5E025AK-E
VND5E025AKTR-E
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Revision history
7
VND5E025AK-E
Revision history
Table 16.
36/37
Document revision history
Date
Revision
01-Apr-2008
1
Changes
Initial release
VND5E025AK-E
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