VNQ5E160K-E Quad channel high side driver for automotive applications Features Max transient supply voltage VCC 41V Operating voltage range VCC 4.5 to 28V Max on-state resistance (per ch.) RON Current limitation (typ) ILIMH 10 A Off-state supply current IS 2 µA(1) 160 mΩ 1. Typical value with all loads connected. ■ ■ ■ General – Inrush current active management by power limitation – Very low standby current – 3.0V CMOS compatible inputs – Optimized electromagnetic emissions – Very low electromagnetic susceptibility – In compliance with the 2002/95/EC european directive Diagnostic functions – Open Drain status output – On-state open load detection – Off-state open load detection – Output short to VCC detection – Overload and short to ground (power limitation) indication – Thermal shutdown indication Protections – Undervoltage shut-down – Overvoltage clamp – Load current limitation – Self limiting of fast thermal transients – Protection against loss of ground and loss of VCC – Over temperature shutdown with auto restart (thermal shutdown) – Reverse battery protected (see Application schematic on page 22) – Electrostatic discharge protection July 2009 PowerSSO-24 Application ■ All types of resistive, inductive and capacitive loads Description The VNQ5E160K-E is a quad channel high-side driver manufactured in the ST proprietary VIPower M0-5 technology and housed in the tiny PowerSSO-24 package. The VNQ5E160K-E is designed to drive automotive grounded loads delivering protection, diagnostics and easy 3V and 5V CMOS-compatible interface with any microcontroller. The device integrates advanced protective functions such as load current limitation, inrush and overload active management by power limitation, over temperature shut-off with auto restart and over-voltage active clamp. A dedicated active low digital status pin is associated with every output channel in order to provide Enhanced diagnostic functions including fast detection of overload and short-circuit to ground, over temperature indication, short-circuit to VCC diagnosis and ON & OFF-state open-load detection. The diagnostic feedback of the whole device can be disabled by pulling the STAT_DIS pin up, thus allowing wired-ORing with other similar devices. Doc ID 14471 Rev 3 1/34 www.st.com 1 Contents VNQ5E160K-E Contents 1 Block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.1 4 3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 22 3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 23 3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.4 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.5 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 25 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.1 5 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 22 PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.2 PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 2/34 Doc ID 14471 Rev 3 VNQ5E160K-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Status pin (VSD=0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Openload detection (8V<VCC<18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 PowerSSO-24™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Doc ID 14471 Rev 3 3/34 List of figures VNQ5E160K-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. 4/34 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Undervoltage shut-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Overload or Short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Intermittent Overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Open Load with external pull-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Open Load without external pull-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Short to VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 TJ evolution in Overload or Short to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Low level STAT_DIS current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 High level STAT_DIS current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Low level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 STAT_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 High level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Low level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Open load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 25 PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Rthj-amb vs. PCB copper area in open box free air condition (one channel ON). . . . . . . . 26 PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON). . . . . 27 Thermal fitting model of a double channel HSD in PowerSSO-24(1) . . . . . . . . . . . . . . . . . 27 PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 PowerSSO-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Doc ID 14471 Rev 3 VNQ5E160K-E Block diagram and pin configuration Figure 1. Block diagram VCC Signal Clamp Undervoltage IN1 Control & Diagnostic 1 Power Clamp DRIVER IN2 VON Limitation CH 1 IN3 Over temp. IN4 Current Limitation OFF State Open load ST_ DIS ON State Open load CONTROL & DIAGNOSTIC Channels 2, 3 & 4 1 Block diagram and pin configuration ST1 CH 4 CH 3 OUT4 OUT3 CH 2 ST2 OUT2 OUT1 ST3 LOGIC ST4 OVERLOAD PROTECTION (ACTIVE POWER LIMITATION) GND Table 1. Pin functions Name VCC OUTPUTn GND INPUTn Function Battery connection. Power output. Ground connection. Must be reverse battery protected by an external diode / resistor network. Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state. STATUSn Open drain digital diagnostic pin. STAT_DIS Active high CMOS compatible pin, to disable the STATUS pin. Doc ID 14471 Rev 3 5/34 Block diagram and pin configuration Figure 2. VNQ5E160K-E Configuration diagram (top view) VCC GND INPUT1 STATUS1 INPUT2 STATUS2 INPUT3 STATUS3 INPUT4 STATUS4 STAT_DIS VCC 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT3 OUTPUT3 OUTPUT3 OUTPUT4 OUTPUT4 OUTPUT4 TAB = VCC Table 2. 6/34 Suggested connections for unused and not connected pins Connection / pin Status N.C. Output Input STAT_DIS Floating X X X X X To ground Not allowed X Not allowed Through 10kΩ resistor Through 10kΩ resistor Doc ID 14471 Rev 3 VNQ5E160K-E 2 Electrical specifications Electrical specifications Figure 3. Current and voltage conventions IS VCC VCC VFn ISD IOUTn STAT_DIS OUTPUTn VSD VOUTn IINn ISTATn INPUTn STATUSn VINn VSTATn GND IGND Note: VFn = VOUTn - VCC during reverse battery condition. 2.1 Absolute maximum ratings Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to the conditions in table below for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document. Table 3. Absolute maximum ratings Symbol Value Unit DC supply voltage 41 V - VCC Reverse DC supply voltage 0.3 V - IGND DC reverse ground pin current VCC IOUT - IOUT Parameter DC output current Reverse DC output current 200 mA Internally limited A 6 A IIN DC input current +10 / -1 mA ISTAT DC status current +10 / -1 mA DC status disable current +10 / -1 mA 36 mJ ISTAT_DIS EMAX Maximum switching energy (single pulse) (L= 8 mH; RL=0 Ω; Vbat=13.5 V; Tjstart=150 °C; IOUT = IlimL(Typ.)) Doc ID 14471 Rev 3 7/34 Electrical specifications Table 3. VNQ5E160K-E Absolute maximum ratings Symbol VESD Electrostatic discharge (Human Body Model: R=1.5KΩ; C=100pF) – Input – Status – STAT_DIS – Output – VCC VESD Charge device model (CDM-AEC-Q100-011) Tj Tstg 2.2 Value Unit 4000 4000 4000 5000 5000 V V V V V 750 V Junction operating temperature -40 to 150 °C Storage temperature - 55 to 150 °C Thermal data Table 4. Symbol 8/34 Parameter Thermal data Parameter Rthj-case Thermal resistance junction-case (max) (with one channel on) Rthj-amb Thermal resistance junction-ambient (max) Doc ID 14471 Rev 3 Max. value Unit 8 °C/W See Figure 36 °C/W VNQ5E160K-E 2.3 Electrical specifications Electrical characteristics Values specified in this section are for 8V<VCC<28V; -40°C< Tj <150°C, unless otherwise stated. Table 5. Power section Symbol Parameter VCC Operating supply voltage VUSD VUSDhyst RON Vclamp IS IL(off1) VF Test conditions Min. Typ. Max. Unit 4.5 13 28 V Undervoltage shut-down 3.5 4.5 V Undervoltage shut-down hysteresis 0.5 On-state resistance(1) IOUT=1A; Tj=25°C IOUT=1A; Tj=150°C IOUT=1A; VCC=5V; Tj=25°C Clamp voltage IS = 20 mA Supply current Off-state; VCC=13V; VIN=VOUT=0V; Tj=25°C On-state; VIN=5V; VCC=13V; IOUT=0A 41 Off-state output current(1) VIN=VOUT=0V; VCC=13V; Tj=25°C VIN=VOUT=0V; VCC=13V; Tj=125°C Output - VCC diode voltage(1) -IOUT=0.6A; Tj=150°C 0 0 V 160 320 210 mΩ mΩ mΩ 46 52 V 2(2) 5(2) µA 8 14 mA 0.01 3 5 µA µA 0.7 V 1. For each channel. 2. PowerMOS leakage included. Table 6. Switching (VCC = 13V; Tj = 25°C) Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time RL= 13Ω (see Figure 6.) 15 µs td(off) Turn-off delay time RL= 13Ω (see Figure 6.) 15 µs dVOUT/dt(on) Turn-on voltage slope RL= 13Ω See Figure 26. V/µs dVOUT/dt(off) Turn-off voltage slope RL= 13Ω See Figure 28. V/µs WON Switching energy losses during twon RL= 13Ω (see Figure 6.) 0.05 mJ WOFF Switching energy losses during twoff RL= 13Ω (see Figure 6.) 0.03 mJ Table 7. Symbol Status pin (VSD=0) Parameter Test conditions Min. Typ. Max. Unit VSTAT Status low output voltage ISTAT= 1.6 mA, VSD=0V 0.5 V ILSTAT Status leakage current Normal operation or VSD=5V, VSTAT= 5V 10 µA Doc ID 14471 Rev 3 9/34 Electrical specifications Table 7. Symbol VNQ5E160K-E Status pin (VSD=0) Parameter Test conditions CSTAT Status pin input capacitance Normal operation or VSD=5V, VSTAT= 5V VSCL Status clamp voltage ISTAT = 1mA ISTAT = -1mA Table 8. Protection(1) Symbol Parameter Test conditions IlimH DC short circuit current IlimL Short circuit current VCC=13V; TR<Tj<TTSD during thermal cycling TTSD Shutdown temperature TR Reset temperature TRS Thermal reset of STATUS THYST Thermal hysteresis (TTSD-TR) tSDL Status delay in overload conditions VDEMAG VON VCC=13V; 5V<VCC<28V Typ. 5.5 Max. Unit 100 pF 7 V V -0.7 Min. Typ. Max. Unit 7 10 14 14 A A 2.5 150 175 TRS + 1 TRS + 5 A 200 °C 7 Tj>TTSD (see Figure 4.) VCC-41 IOUT=0.03A (see Figure 5.) Tj= -40°C...+150°C °C °C 135 Turn-off output voltage IOUT=1A; VIN=0; L=20mH clamp Output voltage drop limitation Min. VCC-46 °C 20 µs VCC-52 V 25 mV 1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. Table 9. Symbol Openload detection (8V<VCC<18V) Parameter IOL Openload on-state detection threshold VIN = 5V tDOL(on) Openload on-state detection delay IOUT = 0A, VCC=13V (see Figure 4.) tPOL Delay between INPUT falling edge and = 0A (see Figure 4.) I STATUS rising edge in OUT Openload condition VOL Openload off-state voltage detection threshold Output short circuit to tDSTKON Vcc detection delay at turn-off 10/34 Test conditions VIN = 0V See Figure 4. Doc ID 14471 Rev 3 Min. Typ. Max. Unit 40 mA 200 µs 1200 µs 2 4 V 180 tPOL µs 10 200 500 VNQ5E160K-E Electrical specifications Table 9. Symbol Openload detection (8V<VCC<18V) Parameter Test conditions VIN= 0V; VOUT= 4V (see Section 3.4: Open-load detection in off-state) IL(off2) Off-state output current(1) td_vol Delay response from output rising edge to VIN= 0V; VOUT= 4V STATUS falling edge in open load Min. Typ. -75 Max. Unit 0 µA 20 µs Max. Unit 1. For each channel. Table 10. Symbol Logic input Parameter VIL Input low level IIL Low level input current VIH Input high level IIH High level input current VI(hyst) Input hysteresis voltage Test conditions Min. VIN = 0.9V 1 µA 2.1 V 0.9 VIN = 2.1V Input clamp voltage VSDL STAT_DIS low level voltage ISDL Low level STAT_DIS current VSDH STAT_DIS high level voltage ISDH High level STAT_DIS current VSD=0.9V Doc ID 14471 Rev 3 µA 7 V V 0.9 V -0.7 1 µA 2.1 V 10 0.25 ISD=1mA ISD=-1mA V V 5.5 VSD=2.1V VSD(hyst) STAT_DIS hysteresis voltage STAT_DIS clamp voltage 10 0.25 IIN = 1mA IIN = -1mA VICL VSDCL Typ. µA V 5.5 7 -0.7 V V 11/34 Electrical specifications Figure 4. VNQ5E160K-E Status timings OPEN LOAD STATUS TIMING (with external pull-up) OPEN LOAD STATUS TIMING (without external pull-up) IOUT < IOL VIN IOUT < IOL VIN VOUT > VOL VOUT < VOL VSTAT VSTAT tDOL(on) tDOL(on) tPOL OVER TEMP STATUS TIMING OUTPUT STUCK TO Vcc Tj > TTSD IOUT > IOL VIN VOUT > VOL VIN VSTAT VSTAT tDOL(on) Figure 5. tSDL tDSTKON tSDL Output voltage drop limitation Vcc-Vout Tj=150oC Tj=25oC Tj=-40oC Von Iout Von/Ron(T) 12/34 Doc ID 14471 Rev 3 VNQ5E160K-E Electrical specifications Figure 6. Switching characteristics VOUT tWon tWoff 90% 80% dVOUT/dt(off) dVOUT/dt(on) 10% tr tf t INPUT td(on) td(off) t Table 11. Truth table Conditions INPUTn OUTPUTn STATUSn (VSD=0V)(1) Normal operation L H L H H H Over temperature L H L L H L Undervoltage L H L L X X Overload & Short circuit to GND H H X (no power limitation) Cycling (power limitation) H L Output voltage > VOL L H H H L(2) H Output current < IOL L H L H H(3) L 1. If the VSD is high, the STATUS pin is in a high impedance. 2. The STATUS pin is low with a delay equal to tDSTKON after INPUT falling edge. 3. The STATUS pin becomes high with a delay equal to tPOL after INPUT falling edge. Doc ID 14471 Rev 3 13/34 Electrical specifications Table 12. VNQ5E160K-E Electrical transient requirements (part 1/3) ISO 7637-2: 2004(E) Test levels Number of pulses or test times Burst cycle / pulse repetition time Delays and Impedance Test pulse III IV 1 -75 V -100 V 5000 pulses 0.5 s 5s 2 ms, 10 Ω 2a +37 V +50 V 5000 pulses 0.2 s 5s 50 μs, 2 Ω 3a -100 V -150 V 1h 90 ms 100 ms 0.1 μs, 50 Ω 3b +75 V +100 V 1h 90 ms 100 ms 0.1 μs, 50 Ω 4 -6 V -7 V 1 pulse 100 ms, 0.01 Ω 5b(2) +65 V +87 V 1 pulse 400 ms, 2 Ω Table 13. Electrical transient requirements (part 2/3) Test level results(1) ISO 7637-2: 2004(E) Test pulse III IV 1 C C 2a C C 3a C C 3b C C 4 C C 5b(2) C C 1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b. 2. Valid in case of external load dump clamp: 40V maximum referred to ground. Table 14. 14/34 Electrical transient requirements (part 3/3) Class Contents C All functions of the device are performed as designed after exposure to disturbance. E One or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. Doc ID 14471 Rev 3 VNQ5E160K-E 2.4 Electrical specifications Waveforms Figure 7. Normal operation Normal operation INPUT Nominal load Nominal load IOUT VSTATUS VST_DIS Figure 8. Undervoltage shut-down Undervoltage shut-down VCC VUSD VUSDhyst INPUT IOUT UNDEFINED VSTATUS VST_DIS Doc ID 14471 Rev 3 15/34 Electrical specifications Figure 9. VNQ5E160K-E Overload or Short to GND Overload or Short to GND INPUT ILimH > Power Limitation Thermal cycling ILimL > IOUT VSTATUS VST_DIS Figure 10. Intermittent Overload Intermittent Overload INPUT ILimH > Overload ILimL > IOUT VSTATUS VST_DIS 16/34 Doc ID 14471 Rev 3 Nominal load VNQ5E160K-E Electrical specifications Figure 11. Open Load with external pull-up Open Load with external pull-up INPUT VOUT VPU > VOL VOL IOUT tDOL(on) VSTATUS VST_DIS Figure 12. Open Load without external pull-up Open Load without external pull-up INPUT VOUT IOUT < IOL IOUT IOL tDOL(on) VSTATUS tPOL VST_DIS Doc ID 14471 Rev 3 17/34 Electrical specifications VNQ5E160K-E Figure 13. Short to VCC Short to V CC INPUT Resistive Short to VCC Hard Short to VCC VOUT > VOL VOUT > VOL VOL VOUT IOUT > IOL IOUT < IOL IOL IOUT tDOL(on) tDSTK(on) VSTATUS VST_DIS Figure 14. TJ evolution in Overload or Short to GND TJ evolution in Overload or Short to GND INPUT Self-limitation of fast thermal transients TTSD THYST TR TJ_START TJ ILimH > Power Limitation < ILimL IOUT 18/34 Doc ID 14471 Rev 3 VNQ5E160K-E 2.5 Electrical specifications Electrical characteristics curves Figure 15. Off-state output current Figure 16. High level input current Iloff (nA) Iih (µA) 200 5 4,5 Off State Vcc=13V Vin=Vout=0V 150 Vin=2.1V 4 3,5 100 3 2,5 50 2 1,5 0 1 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (°C) 50 75 100 125 150 175 100 125 150 175 Tc (°C) Figure 17. Input clamp voltage Figure 18. Input high level Vicl (V) Vih (V) 4 8 3,5 lin=1mA 7,5 3 7 2,5 6,5 2 1,5 6 1 5,5 0,5 5 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (°C) 50 75 Tc (°C) Figure 19. Input low level Figure 20. Low level STAT_DIS current Vil (V) Isdl (µA) 2 5 1,8 4,5 1,6 4 1,4 3,5 Vsd= 0.9V 1,2 3 1 2,5 0,8 2 0,6 1,5 0,4 1 0,2 0,5 0 0 -50 -25 0 25 50 75 100 125 150 175 -50 Tc (°C) -25 0 25 50 75 100 125 150 175 Tc (°C) Doc ID 14471 Rev 3 19/34 Electrical specifications VNQ5E160K-E Figure 21. On-state resistance vs Tcase Figure 22. High level STAT_DIS current Isdh (µA) Ron (mOhm) 5 300 4,5 Iout= 1A Vcc=13V 250 Vsd= 2.1V 4 3,5 200 3 150 2,5 2 100 1,5 1 50 -50 -25 0 25 50 75 100 125 150 -50 175 -25 0 25 50 75 100 125 150 175 150 175 150 175 Tc (°C) Tc (°C) Figure 23. On-state resistance vs VCC Figure 24. Low level input current Iil (µA) Ron (mOhm) 5 350 4,5 Vin=0.9V 300 4 Tc=150°C 250 3,5 Tc=125°C 3 200 2,5 Tc=25°C 150 2 1,5 100 Tc=-40°C 1 50 0,5 0 0 0 5 10 15 20 25 30 35 -50 -25 0 25 Figure 25. ILIM vs Tcase 75 100 125 Figure 26. Turn-on voltage slope Ilimh (A) (dVout/dt )On (V/ms) 20 1000 900 Vcc=13V RI=13 Ohm Vcc=13V 15 50 Tc (°C) Tc (°C) 800 700 10 600 500 5 400 0 300 -50 -25 0 25 50 75 100 125 150 Tc (°C) 20/34 -50 -25 0 25 50 75 Tc (°C) Doc ID 14471 Rev 3 100 125 VNQ5E160K-E Electrical specifications Figure 27. Undervoltage shutdown Figure 28. Turn-off voltage slope Vusd (V) (dVout/dt )Off (V/ms) 8 1200 Vcc=13V RI= 13 Ohm 1000 6 800 4 600 2 400 200 0 -50 -25 0 25 50 75 100 125 150 -50 175 -25 0 25 50 75 100 125 150 175 Tc (°C) Tc (°C) Figure 29. STAT_DIS clamp voltage Figure 30. High level STAT_DIS voltage VsdH(V) Vsdcl(V) 3 10 9 2,5 Isd = 1 mA 8 2 7 1,5 6 5 1 4 0,5 3 0 2 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Tc (°C) Figure 31. Low level STAT_DIS voltage VsdL(V) 3 2,5 2 1,5 1 0,5 0 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Doc ID 14471 Rev 3 21/34 Application information 3 VNQ5E160K-E Application information Figure 32. Application schematic +5V +5V VCC Rprot STAT_DIS Rprot INPUT Dld μC OUTPUT Rprot STATUS GND VGND RGND DGND Note: Channels 2, 3 and 4 have the same internal circuit as channel 1. 3.1 GND protection network against reverse battery 3.1.1 Solution 1: resistor in the ground line (RGND only) This solution can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1. RGND ≤ 600mV / (IS(on)max). 2. RGND ≥ (−VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. Power dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum On-state currents of the different devices. Please note that if the microprocessor ground is not shared by the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on how many devices are ON in the case of several high side drivers sharing the same RGND. 22/34 Doc ID 14471 Rev 3 VNQ5E160K-E Application information If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then ST suggests that Solution 2 is used (see below). 3.1.2 Solution 2: diode (DGND) in the ground line A resistor (RGND=1kΩ) should be inserted in parallel with DGND if the device drives an inductive load. This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network will produce a shift (~600mV) in the input threshold and in the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. 3.2 Load dump protection Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds to VCC max DC rating. The same applies if the device is subject to transients on the VCC line that are greater than the ones shown in the ISO T/R 7637/2 table. 3.3 MCU I/Os protection If a ground protection network is used and negative transients are present on the VCC line, the control pins will be pulled negative. ST suggests the insertion of resistors (Rprot) in the lines to prevent the µC I/Os pins from latching up. The values of these resistors are a compromise between the leakage current of µC and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of the µC I/Os. -VCCpeak/Ilatchup ≤ Rprot ≤ (VOHμC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHμC ≥ 4.5V 5kΩ ≤ Rprot ≤ 180kΩ. Recommended Rprot value is 10kΩ. Doc ID 14471 Rev 3 23/34 Application information 3.4 VNQ5E160K-E Open-load detection in off-state Off-state open load detection requires an external pull-up resistor (RPU) connected between the OUTPUT pin and a positive supply voltage (VPU) like the +5V line used to supply the microprocessor. The external resistor has to be selected according to the following requirements: 1. no false open load indication when load is connected: in this case we have to avoid VOUT to be higher than VOlmin; this results in the following condition: VOUT=(VPU/(RL+RPU))RL<VOlmin. 2. no misdetection when the load is disconnected: in this case the VOUT has to be higher than VOLmax; this results in the following condition: RPU<(VPU–VOLmax) / IL(off2). Because Is(OFF) may significantly increase if Vout is pulled high (up to several mA), the pullup resistor RPU should be connected to a supply that is switched OFF when the module is in standby. The values of VOLmin, VOLmax and IL(off2) are available in the Electrical characteristics section. Figure 33. Open load detection in off-state V batt. VPU VCC RPU INPUT DRIVER + LOGIC IL(off2) OUT + STATUS R VOL GROUND 24/34 Doc ID 14471 Rev 3 RL VNQ5E160K-E 3.5 Application information Maximum demagnetization energy (VCC = 13.5V) Figure 34. Maximum turn-off current versus inductance (for each channel) 100 A 10 C B I (A) 1 0,1 0,1 1 L (mH) 10 100 A: Tjstart = 150°C single pulse B: Tjstart = 100°C repetitive pulse C: Tjstart = 125°C repetitive pulse VIN, IL Demagnetization Demagnetization Demagnetization t Note: Values are generated with RL = 0 Ω. In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B. Doc ID 14471 Rev 3 25/34 Package and PC board thermal data VNQ5E160K-E 4 Package and PC board thermal data 4.1 PowerSSO-24 thermal data Figure 35. PowerSSO-24 PC board Note: Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4 area= 77mm x 86mm, PCB thickness=1.6mm, Cu thickness=70mm (front and back side), Copper areas: from minimum pad lay-out to 8cm2). Figure 36. Rthj-amb vs. PCB copper area in open box free air condition (one channel ON) RTHj_amb(°C/W) 60 55 50 45 40 35 30 0 2 4 6 PCB Cu heatsink area (cm^2) 26/34 Doc ID 14471 Rev 3 8 10 VNQ5E160K-E Package and PC board thermal data Figure 37. PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON) ZTH (°C/W) 1000 100 Footprint 2 cm2 8 cm2 10 1 0.1 0.0001 0.001 0.01 0.1 1 Time (s) 10 100 1000 Figure 38. Thermal fitting model of a double channel HSD in PowerSSO-24(1) 1. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered. Doc ID 14471 Rev 3 27/34 Package and PC board thermal data VNQ5E160K-E Equation 1: pulse calculation formula: Z THδ = R TH ⋅δ+Z THtp (1 – δ) where δ = tP/T Table 15. 28/34 Thermal parameters Area/island (cm2) Footprint R1 = R7 = R9 = R11 (°C/W) 1.2 R2 = R8 = R10 = R12 (°C/W) 6 R3 (°C/W) 6 R4 (°C/W) 7.7 R5 (°C/W) 2 8 9 9 8 R6 (°C/W) 28 17 10 C1 = C7 = C9 = C11 (W.s/°C) 0.0008 C2 = C8 = C10 = C12 (W.s/°C) 0.0016 C3 (W.s/°C) 0.025 C4 (W.s/°C) 0.75 C5 (W.s/°C) 1 4 9 C6 (W.s/°C) 2.2 5 17 Doc ID 14471 Rev 3 VNQ5E160K-E Package and packing information 5 Package and packing information 5.1 ECOPACK® packages In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 5.2 PowerSSO-24 mechanical data Figure 39. PowerSSO-24 package dimensions Doc ID 14471 Rev 3 29/34 Package and packing information Table 16. VNQ5E160K-E PowerSSO-24™ mechanical data Millimeters Symbol Min Typ A 2.45 A2 2.15 2.35 a1 0 0.1 b 0.33 0.51 c 0.23 0.32 D 10.10 10.50 E 7.4 7.6 e 0.8 e3 8.8 F 2.3 G H 0.1 10.1 10.5 h 0.4 k 0° 8° L 0.55 0.85 O 1.2 Q 0.8 S 2.9 T 3.65 U 1.0 N 30/34 Max 10° X 4.1 4.7 Y 6.5 7.1 Doc ID 14471 Rev 3 VNQ5E160K-E 5.3 Package and packing information Packing information Figure 40. PowerSSO-24 tube shipment (no suffix) C B Base Q.ty 49 Bulk Q.ty 1225 Tube length (± 0.5) 532 A 3.5 B 13.8 C (± 0.1) 0.6 A All dimensions are in mm. Figure 41. PowerSSO-24 tape and reel shipment (suffix “TR”) Reel dimensions Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 24.4 100 30.4 All dimensions are in mm. TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.05) D1 (min) F (± 0.1) K (max) P1 (± 0.1) 24 4 12 1.55 1.5 11.5 2.85 2 End All dimensions are in mm. Start Top cover tape No components Components 500mm min No components 500mm min Empty components pockets sealed with cover tape. User direction of feed Doc ID 14471 Rev 3 31/34 Order codes 6 VNQ5E160K-E Order codes Table 17. Device summary Package PowerSSO-24 32/34 Order codes Tube Tape and reel VNQ5E160K-E VNQ5E160KTR-E Doc ID 14471 Rev 3 VNQ5E160K-E 7 Revision history Revision history Table 18. Document revision history Date Revision 04-Feb-2008 1 Initial release. 2 Table 16: PowerSSO-24 mechanical data: – Deleted A (min) value – Changed A (max) value from 2.47 to 2.45 – Changed A2 (max) value from 2.40 to 2.35 – Changed a1 (max) value from 0.075 to 0.1 – Added F and k rows 3 Updated Figure 39: PowerSSO-24 package dimensions. Updated Table 16: PowerSSO-24 mechanical data: – Deleted G1 row – Added O, Q, S, T and U rows 24-Jun-2009 23-Jul-2009 Changes Doc ID 14471 Rev 3 33/34 VNQ5E160K-E Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2009 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 34/34 Doc ID 14471 Rev 3