TA2152FLG TOSHIBA Bipolar Linear IC Silicon Monolithic TA2152FLG Low Current Consumption Headphone Amplifier (for 1.5-V/3-V Use) The TA2152FLG is a headphone amplifier of low current consumption type developed for portable digital audio. It is especially suitable for portable CD players, portable MD players etc. Features • Low current consumption • • • The power amplifier output stage can be driven using a single battery. As a result, overall current consumption is low. Weight: 0.05 g (typ.) Marking: 2152 Built-in center amplifier switch For the output-coupling type, the consumption current has been decreased still further. Current value (VCC1 = 2.4 V, VCC2 = 1.2 V, f = 1 kHz, RL = 16 Ω, Ta = 25°C, typ.) • Output-coupling type • No Signal: ICC (VCC1) = 0.4 mA, ICC (VCC2) = 0.3 mA • 0.1 mW × 2 ch: ICC (VCC1) = 0.5 mA, ICC (VCC2) = 2.2 mA • 0.5 mW × 2 ch: ICC (VCC1) = 0.5 mA, ICC (VCC2) = 5.0 mA • OCL type • No Signal: ICC (VCC1) = 0.7 mA, ICC (VCC2) = 0.7 mA • 0.1 mW × 2 ch: ICC (VCC1) = 0.7 mA, ICC (VCC2) = 4.5 mA • 0.5 mW × 2 ch: ICC (VCC1) = 0.8 mA, ICC (VCC2) = 10.0 mA • Output power: Po = 8 mW (typ.) • Voltage gain: GV = 11.5dB (typ.) • Built-in beep function • Built-in low-pass compensation (output-coupling type) • Built-in mute switch • Built-in power switch • Operating supply voltage range (Ta = 25°C) (VCC1 = 2.4 V, VCC2 = 1.2 V, f = 1 kHz, RL = 16 Ω, THD = 10%, Ta = 25°C) VCC1 (opr) = 1.8 V~4.5 V VCC2 (opr) = 0.9 V~4.5 V 1 2006-04-19 TA2152FLG Block Diagram (of OCL Application) VCC1 ON OFF PW SW 18 MUTE TC 19 VCC1 ON OFF MUTE SW 17 PW/MUTE SW BEEP IN 16 15 BIAS OUT 14 GND 13 RF IN 12 C-AMP SW BEEP BIAS IN 11 VCC1 VCC1 20 C-AMP SW BIAS INB 21 OUT ADJ 10 INA 22 9 NC VCC2 VCC2 NC 23 PW A PW C PW B BEEP OUTA 24 8 BEEP OUTB 7 1 OUTA 2 EQA RL 3 PW GND 4 OUTC 5 EQB 6 OUTB RL 2 2006-04-19 TA2152FLG Pin Descriptions Pin Voltage: Typical pin voltage for test circuit when no input signal is applied (VCC1 = 2.4 V, VCC2 = 1.2 V, Ta = 25°C) Pin No. Function Pin Voltage (V) Internal Circuit Name 1 OUTA 4 OUTC 6 OUTB 3 PW GND 23 VCC2 Outputs from power amplifier 0.6 1 GND for power drive stage 0 3 23 VCC2 2 EQA 1.2 VCC for power drive stage 20 kΩ Low-pass compensation pins 5 0.6 EQB 22 21 1 INB 0.6 Inputs to power amplifier INA 7 BEEP OUTB 5 kΩ 22 15 kΩ 43 kΩ 2 VCC2 ⎯ Outputs for beep signal 14 GND 8 NC 9 NC 10 OUT ADJ GND for everything other than power drive stage ⎯ 0 Not connected ⎯ ⎯ DC output voltage adjustment Either connect this pin or leave it open depending on the level of VCC2. If the power supply of a 1.5 V system is applied to VCC2, connect this pin to BIAS IN (pin11) If the power supply of a 3 V system is applied to VCC2, leave this pin open. 11 BIAS IN Bias circuit input 12 RF IN Ripple filter input 15 BIAS OUT Bias circuit output 20 VCC1 VCC for everything other than power drive stage VCC2 47 kΩ 15 kΩ BEEP OUTA 12 10 0.6 VCC1 20 0.6 11 15 62 kΩ 24 24 1.1 0.6 2.4 3 2006-04-19 TA2152FLG Pin No. Function Pin Voltage (V) Internal Circuit Name VCC1 13 16 17 C-AMP SW Center amplifier switch C-Cup type: GND OCL type: Open BEEP IN Beep signal input If the beep function is not used, this pin is connected to GND. MUTE SW Mute switch Mute OFF: L level Mute ON: H level Refer to application note (6) 13 ⎯ to center amplifier 10 kΩ 16 ⎯ VCC1 62 kΩ ⎯ 17 VCC1 100 kΩ ⎯ 10 kΩ PW SW 39 kΩ 18 18 Power switch IC ON: H level IC OFF: L level Refer to application note (6) VCC1 19 MUTE TC 19 Mute smoothing Reduces pop noises during switching. ⎯ 4 2006-04-19 TA2152FLG Application Notes (1) Beep function In Power Mute Mode, the beep signal from the microcomputer or other controlling device is input on the BEEP IN pin (pin 16). This signal is output as a current which flows to the load via the BEEP output pin (pin 7/24). The beep level is set to Vo = −50dBV (RL = 16 Ω (typ.) ). For the beep signal timing, please refer to Figure 1. ON PW SW OFF ON MUTE SW OFF BEEP OUT OCL type Output-coupling type 100 ms 100 ms 10 ms 100 ms 200 ms 100 ms 10 ms 100 ms Figure 1 Timing chart for beep and output signals (2) Low-cut compensation For output-coupling type, the low-frequency range can be decreased using an output-coupling capacitor and a load (fc = 45 Hz at C = 220 µF, R = 16 Ω). However, since the capacitor is connected between the IC’s output pin (pin 1/6) and EQ pin (pin 2/5), the low-frequency gain of the power amplifier increases, enabling low-cut compensation to be performed. For the response of capacitors of different values, please refer to Figure 2. RES − f 4 Response (dB) 2 0 0.18 µF 0.22 µF −2 0.33 µF −4 0.47 µF 0.68 µF −6 No compensation −8 20 50 100 200 Frequency 500 1k 2k f (Hz) Figure 2 Capacitor response 5 2006-04-19 TA2152FLG (3) Adjustment of DC output voltage Please perform the OUT ADJ pin (pin 10) as follows by the power supply of VCC1 and VCC2. • If a boost voltage is applied to VCC1, VCC2 is connected to a battery and the difference between VCC1 and VCC2 is greater than or equal to 0.7 V, short pins 10 and 11 together. In this case the DC output voltage will be • VCC2 . 2 If the difference between VCC1 and VCC2 is less than 0.7 V, or if VCC1 and VCC2 are connected to the same power supply, leave pin 10 open. In these cases the DC output voltage will be VCC2 − 0.7 V . 2 However, when the voltage level of VCC2 is high, the DC output voltage is will be set to approximately 1.4 V. (4) RF IN pin The ripple rejection ratio can by improved by connecting a capacitor to this pin. Connection of a capacitor is recommended, particularly for output-coupling type. RR − C (RF IN) 30 Ripple rejection ratio RR (dB) Output-coupling type 40 50 60 70 VCC1 = 2.4 V VCC2 = 1.2 V (ripple signal applied) 80 fr = 100 Hz Vr = −20dBV BIAS IN = 4.7 µF Open 0.1 0.2 0.5 RF IN capacitance 1 2 C (µF) 5 10 Figure 3 Improvement of ripple rejection ratio (5) Output application of power amplifier For output-coupling type the center amplifier is not used with the result that current consumption is low. Please set the C-AMP SW pin (pin 13) accordingly. Output-coupling type: Pin 13 is connected to GND. OCL type: Pin 13 is open. 6 2006-04-19 TA2152FLG (6) Switching pins (a) PW SW The device is ON when this pin is set to High. To prevent the IC being turned ON by external noise, it is necessary to connect an external pull-down resistor to the PW SW pin. The pin is highly sensitive. (b) MUTE SW If the MUTE SW pin is fixed to High, current will flow through the pin, even when the PW SW pin is in OFF Mode. To prevent the IC being turned ON by external noise, it is necessary to connect an external pull-down resistor. The pop noise heard when the MUTE SW switch is turned ON or OFF can be reduced by connecting an external capacitor to the MUTE TC pin. (c) Switch sensitivity (Ta = 25°C) PW SW MUTE SW 5 5 4.5 V 4.5 V 4 1.5 V 1 3 2 H 1.0 V 1 0.3 V 0 0 V17 2 H Pin voltage V18 3 Pin voltage (V) (V) 4 1 0.3 V L 2 Supply voltage 3 4 VCC1 0 0 5 (V) 1 L 2 Supply voltage PW SW 3 VCC1 4 5 (V) MUTE SW H level IC ON H level Mute ON L level IC OFF L level Mute OFF Figure 4 Switch sensitivity (7) Miscellaneous The following capacitors must have excellent temperature and frequency characteristics. • Capacitor between VCC1 (pin 20) and GND (pin 14) • Capacitor between VCC2 (pin 23) and PW GND (pin 3) • Capacitor between BIAS IN (pin 11) and GND (pin 14) • Capacitor between BIAS OUT (pin 15) and GND (pin 14) • Capacitor between RF IN (pin 12) and GND (pin 14) 7 2006-04-19 TA2152FLG Absolute Maximum Ratings (Ta = 25°C) Characteristic Symbol Rating Supply voltage 1 VCC1 4.5 Supply voltage 2 VCC2 4.5 Unit V Output current Io (peak) 100 mA Power dissipation PD (Note) 350 mW Operating temperature Topr −25~75 °C Storage temperature Tstg −55~150 °C Note: Derated by 2.8 mW/°C above Ta = 25°C Electrical Characteristics (Unless otherwise specified VCC1 = 2.4 V, VCC2 = 1.2 V, Rg = 600 Ω, RL = 16 Ω, f = 1 kHz, Ta = 25°C, SW1: a, SW2: b, SW3: a) Characteristic Quiescent supply current Power supply current during drive Symbol Test conditions Min Typ. Max ICCQ1 IC OFF (VCC1), SW1: b ⎯ 0.1 5 ICCQ2 IC OFF (VCC2), SW1: b ⎯ 0.1 5 ICCQ3 OCL, Mute ON (VCC1), SW2: a ⎯ 400 600 ICCQ4 OCL, Mute ON (VCC2), SW2: a ⎯ 650 1400 ICCQ5 C-Cup, Mute ON (VCC1), SW2: a ⎯ 170 250 ICCQ6 C-Cup, Mute ON (VCC2), SW2: a ⎯ 85 170 ICCQ7 OCL, no signal (VCC1) ⎯ 0.7 1.1 ICCQ8 OCL, no signal (VCC2) ⎯ 0.7 1.5 ICCQ9 C-Cup, no signal (VCC1) ⎯ 0.4 0.6 ICCQ10 C-Cup, no signal (VCC2) ⎯ 0.3 0.6 ICC1 OCL, 0.5 mW × 2 ch (VCC1) ⎯ 0.8 ⎯ ICC2 OCL, 0.5 mW × 2 ch (VCC2) ⎯ 10.0 ⎯ ICC3 C-Cup, 0.5 mW × 2 ch (VCC1) ⎯ 0.5 ⎯ ICC4 C-Cup, 0.5 mW × 2 ch (VCC2) ⎯ 5.0 ⎯ Unit µA mA mA Voltage gain GV Vo = −22 dBV 9.5 11.5 13.5 Channel balance CB Vo = −22 dBV −1.5 0 +1.5 Output power Po THD = 10% 5 8 ⎯ Total harmonic distortion THD Po = 1 mW ⎯ 0.1 1.0 % Output noise voltage Vno Rg = 600 Ω, Filter: IHF-A, SW3: b ⎯ −100 −96 dBV Cross talk CT Vo = −22 dBV −25 −35 ⎯ dB mW Ripple rejection ratio 1 RR1 Inflow to VCC1, SW3: b fr = 100 Hz, Vr = −20 dBV −65 −85 ⎯ Ripple rejection ratio 2 RR2 Inflow to VCC2, SW3: b fr = 100 Hz, Vr = −20 dBV −85 −100 ⎯ Muting attenuation ATT Vo = −12 dBV −100 −115 ⎯ −55 −50 −45 dBV VCC1 = 1.8 V, VCC2 = 0.9 V 5 ⎯ ⎯ µA Beep sound output voltage VBEEP (OUT) VBEEP (IN) = 2 Vp-p dB PW SW ON current I18 PW SW OFF voltage V18 VCC1 = 1.8 V, VCC2 = 0.9 V 0 ⎯ 0.3 V Mute SW ON current I17 VCC1 = 1.8 V, VCC2 = 0.9 V 5 ⎯ ⎯ µA Mute SW OFF voltage V17 VCC1 = 1.8 V, VCC2 = 0.9 V 0 ⎯ 0.3 V 8 2006-04-19 TA2152FLG 0.47 µF VCC1 VCC1 (a) SW1 (b) (a) SW2 (b) 18 PW SW 19 MUTE TC 17 MUTE SW 10 µF Test Circuit 16 BEEP IN 15 BIAS OUT 14 GND 13 C-AMP SW RF IN 12 22 µF 4.7 µF VCC1 20 VCC1 BIAS IN 11 600 Ω (b) 10 µF (a) SW3b Rg = 600 Ω 600 Ω (b) 10 µF (a) SW3a Rg = 600 Ω VCC2 22 µF BIAS OUT 21 INB OUT ADJ 10 TA2152FLG 22 INA NC 9 23 VCC2 NC 8 24 BEEP OUTA OUTA 1 EQA 2 PW GND 3 RL 16 Ω BEEP OUTB 7 OUTC 4 EQB 5 OUTB 6 RL 16 Ω 9 2006-04-19 TA2152FLG Characteristic Curves (unless otherwise specified, VCC1 = 2.4 V, VCC2 = 1.2 V, Rg = 600 Ω, RL = 16 Ω, f = 1 kHz, Ta = 25°C) ICCQ – VCC2 ICCQ – VCC1 1.5 1.5 1 OCL: VCC1 current OCL: VCC2 current 0.5 C-Cup: VCC1 current C-Cup: VCC2 current 0 1.5 V application (mA) ICCQ VCC1 = 2.4 V Quiescent supply current Quiescent supply current ICCQ (mA) 1.5 V application VCC2 = 1.2 V OCL: VCC2 current 1 OCL: VCC1 current 0.5 C-Cup: VCC1 current C-Cup: VCC2 current 0 0 1 1.5 2 Supply voltage of power drive stage 2.5 VCC2 0 1 (V) 2 (V) 1 C-Cup 0.5 3 V application VCC1 = VCC2 ICCQ (VCC1 + VCC2) 1 2 3 Supply voltage 4 Pin 10, 11: Short 1.5 V application 1 Pin 10, 11: Open 3 V application 0.5 0 5 VCC (V) 0 1 2 ICC – Po 4 VCC2 5 (V) ICC – Po 100 OCL mode C-Cup mode f = 1 kHz f = 1 kHz VCC2 Supply current ICC 10 1 VCC1 0.1 1 Dual input (mA) Dual input (mA) ICC Supply current 3 Supply voltage of power drive stage 100 0.1 0.01 5 1.5 VO(DC) OCL Output DC voltage Quiescent supply current ICCQ 1.5 0 4 VCC1 (V) VO (DC) – VCC2 (mA) ICCQ – VCC 0 3 Supply voltage 10 10 VCC2 1 VCC1 0.1 0.01 100 Output power Po (mW) 0.1 1 10 100 Output power Po (mW) 10 2006-04-19 TA2152FLG Po – VCC2 Po – VCC 100 30 3 V application VCC1 = VCC2 20 (mW) 20 Output power 5 1.5 V application VCC1 = 2.4 V 3 30 Po (mW) Po Output power 10 f = 1 kHz 0 1 1.5 2 Supply voltage of power drive stage RL = 16 Ω 10 5 3 RL = 16 Ω 2 f = 1 kHz 50 2 0 2.5 VCC2 1 2 (V) Supply voltage THD – Vo 3 V application VCC1 = 2.4 V VCC1 = VCC2 = 2.4 V RL = 16 Ω (%) (%) THD Total harmonic distortion THD Total harmonic distortion 1.5 V application RL = 16 Ω 10 1 f = 10 kHz f = 100 Hz 0.1 f = 1 kHz 0.01 −60 −50 −40 −30 Output voltage −20 Vo −10 1 f = 10 kHz f = 100 Hz 0.1 f = 1 kHz 0.01 −60 0 −50 (dBV) −40 (dBV) Vno OCL C-Cup −110 1.5 V application VCC1 = 2.4 V Rg = 600 Ω −120 −20 Vo 1.5 Supply voltage of power drive stage 0 (dBV) −90 OCL −100 C-Cup −110 3 V application VCC1 = VCC2 Rg = 600 Ω −120 Filter: IHF-A Filter: IHF-A 1 −10 Vno – VCC −90 −100 −30 Output voltage Output noise voltage (dBV) VCC (V) 10 Vno – VCC2 Vno 5 100 VCC2 = 1.2 V 0 4 THD – Vo 100 Output noise voltage 3 2 0 2.5 VCC2 (V) 1 2 Supply voltage 11 3 4 5 VCC (V) 2006-04-19 TA2152FLG CT – VCC2 CT – VCC 1.5 V application VCC1 = VCC2 f = 1 kHz CT (dB) 0 −20 OCL Cross talk CT (dB) Cross talk 3 V application VCC1 = 2.4 V f = 1 kHz 0 −40 −20 OCL −40 C-Cup C-Cup −60 −60 0 1 1.5 2 Supply voltage of power drive stage 2.5 VCC2 0 1 (V) 2 3 Supply voltage RR – VCC2 4 5 4 5 VCC (V) RR – VCC (dB) fr = 100 Hz Vr = −20 dBV RR RR1: Inflow to VCC1 RR2: Inflow to VCC2 −60 Ripple rejection ratio Ripple rejection ratio RR (dB) 1.5 V application −40 RR2 (C-Cup) −80 RR1 (OCL) RR1 (C-Cup) −100 1 1.5 3 V application fr = 100 Hz Vr = −20 dBV VCC1 = VCC2 −60 C-Cup −80 OCL −100 RR2 (OCL) 0 −40 2 Supply voltage of power drive stage 0 2.5 VCC2 (V) 1 2 Supply voltage 3 VCC (V) VBEEP (OUT) – VBEEP (IN) (dBV) −20 Beep output voltage f = 400 Hz (rectangle wave) −10 R = 16 Ω L VBEEP (OUT) 0 −30 −40 −50 −60 −70 −80 −90 −100 0.1 0.3 0.5 Beep input voltage 1 3 VBEEP (IN) 5 10 (Vp-p) 12 2006-04-19 TA2152FLG C-Cup: VCC1 current 0.4 C-Cup: VCC2 current 0.2 GV 10 Po 0.4 5 0.2 VCC1 = 2.4 V VCC2 = 1.2 V 0 −20 0 20 40 Ambient temperature 60 Ta THD 0 80 −20 (°C) 0 CT (dB) VBEEP (OUT) Cross talk Output noise voltage Vno (dBV) Beep output voltage VBEEP (OUT) (dBV) 0 −60 −80 Vno (OCL) 80 0 (°C) −20 OCL −40 C-Cup Vno (C-Cup) −120 −20 0 20 40 Ta 60 −80 80 −20 (°C) 0 VCC1 = 2.4 V ATT (dB) RR fr = 100 Hz Vr = −20 dBV Muting attenuation RR2: Inflow to VCC2 RR2 (C-Cup) −80 Ta 60 80 (°C) ATT – Ta RR1: Inflow to VCC1 −60 40 −60 VCC1 = 2.4 V VCC2 = 1.2 V VCC2 = 1.2 V −40 20 Ambient temperature RR – Ta −20 (dB) Ta 60 VCC1 = 2.4 V VCC2 = 1.2 V −60 Ambient temperature Ripple rejection ratio 40 CT – Ta VCC1 = 2.4 V VCC2 = 1.2 V −100 20 Ambient temperature Vno, VBEEP (OUT) − Ta −40 0.6 THD OCL: VCC1 current 0.6 0.8 15 OCL: VCC2 current Total harmonic distortion VCC1 = 2.4 V VCC2 = 1.2 V 0.8 (%) GV, Po, THD – Ta Voltage gain GV (dB) Output power Po (mW) Quiescent supply current ICCQ (mA) ICCQ − Ta RR1 (OCL) RR1 (C-Cup) −100 −80 −100 OCL −120 C-Cup −140 RR2 (OCL) −20 0 20 Ambient temperature 40 Ta 60 −20 80 (°C) 0 20 Ambient temperature 13 40 Ta 60 80 (°C) 2006-04-19 TA2152FLG Application Circuit1 (1.5 V Output Coupling Type) ON OFF PW SW 18 MUTE TC 19 0.47 µF VCC1 ON OFF MUTE SW 17 PW/MUTE SW 10 µF VCC1 BEEP IN 16 15 BIAS OUT 14 GND C-AMP SW 13 RF IN 2.2 µF 12 C-AMP SW BEEP BIAS IN 4.7 µF 11 VCC1 22 µF 20 1 µF 1 µF BIAS INB 21 OUT ADJ 10 INA 22 9 NC VCC2 NC 23 PW A PW C 8 PW B BEEP OUTA 24 BEEP OUTB 7 OUTA 2 EQA 3 PW GND 0.22 µF 4 OUTC 5 EQB 0.22 µF RL 6 OUTB 220 µF 1 220 µF 22 µF 3 V application : Open RL 14 2006-04-19 TA2152FLG Application Circuit2 (1.5 V OCL Type) ON OFF PW SW 18 MUTE TC 19 0.47 µF VCC1 ON OFF MUTE SW 17 PW/MUTE SW 10 µF VCC1 BEEP IN 16 15 BIAS OUT 14 GND 13 C-AMP SW RF IN 12 C-AMP SW BEEP BIAS IN 4.7 µF 11 VCC1 22 µF 20 1 µF 1 µF BIAS INB 21 OUT ADJ 10 INA 22 9 NC VCC2 22 µF 3 V application : Open NC 23 PW A PW C PW B BEEP OUTA 24 8 BEEP OUTB 7 1 OUTA 2 EQA 3 PW GND RL 4 OUTC 5 EQB 6 OUTB RL 15 2006-04-19 TA2152FLG Markings Markings (example) *1 9 *1 *2 0 1 K A *1 Product name: 2152 *2 Weekly code: 9 0 1 K A Toshiba internal management code Weekly code Year (last digit only) Orientation marking *2 Precautions when using QON Package outline (lower surface) (Upper surface) Please take into account the following points regarding the QON package (1) (2) Do not attempt to strengthen the device mechanically by performing soldering on the island sections at the four corners of the package (the sections illustrated by diagonal lines) on the diagram of the lower surface. This island sections on the package surfaces (the sections illustrated by diagonal lines on the upper and lower surface diagrams) must be electrically insulated. *1: Ensure that the island sections on the lower surface (as indicated by the diagonal lines on the diagram) do not come into contact with solder from via holes in the board. • When mounting or soldering, take care to ensure that neither static electricity nor electrical overstress is applied to the IC (by taking measures to prevent antistatic, leaks etc.). • When incorporating the device into an item of equipment employ a set design which does not result in voltage being applied directly to the island section. 16 2006-04-19 TA2152FLG Package Dimensions Weight: 0.05 g (typ.) 17 2006-04-19 TA2152FLG RESTRICTIONS ON PRODUCT USE 060116EBA • The information contained herein is subject to change without notice. 021023_D • TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc. 021023_A • The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer’s own risk. 021023_B • The products described in this document shall not be used or embedded to any downstream products of which manufacture, use and/or sale are prohibited under any applicable laws and regulations. 060106_Q • The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of TOSHIBA or others. 021023_C • The products described in this document are subject to the foreign exchange and foreign trade laws. 021023_E About solderability, following conditions were confirmed • Solderability (1) Use of Sn-37Pb solder Bath · solder bath temperature = 230°C · dipping time = 5 seconds · the number of times = once · use of R-type flux (2) Use of Sn-3.0Ag-0.5Cu solder Bath · solder bath temperature = 245°C · dipping time = 5 seconds · the number of times = once · use of R-type flux 18 2006-04-19