SN74FB2040 8-BIT TTL/BTL TRANSCEIVER SCBS173I – NOVEMBER 1991 – REVISED SEPTEMBER 1999 D D D D D Compatible With IEEE Std 1194.1-1991 (BTL) TTL A Port, Backplane Transceiver Logic (BTL) B Port Open-Collector B-Port Outputs Sink 100 mA Isolated Logic-Ground and Bus-Ground Pins Reduce Noise D D D High-Impedance State During Power Up and Power Down BIAS VCC Pin Minimizes Signal Distortion During Live Insertion or Withdrawal B-Port Biasing Network Preconditions the Connector and PC Trace to the BTL High-Level Voltage Packaged in Plastic Quad Flatpack TMS GND B1 AO2 AI1 AO1 VCC BIAS VCC OEA OEB OEB TCK VCC RC PACKAGE (TOP VIEW) 52 51 50 49 48 47 46 45 44 43 42 41 40 1 39 2 38 3 37 4 36 5 35 6 34 7 33 8 32 9 31 10 30 11 29 12 28 13 27 GND B2 GND B3 GND B4 GND B5 GND B6 GND B7 GND B8 AI8 GND BG GND AO8 TDO TDI VCC 14 15 16 17 18 19 20 21 22 23 24 25 26 AI6 GND AO7 BG VCC AI7 GND AI2 AI3 AO3 GND AO4 GND AI4 AI5 AO5 GND AO6 GND description The SN74FB2040 device is an 8-bit transceiver designed to translate signals between TTL and backplane transceiver logic (BTL) environments. The B port operates at BTL-signal levels. The open-collector B ports are specified to sink 100 mA. Two output enables (OEB and OEB) are provided for the B outputs. When OEB is high and OEB is low, the B port is active and reflects the inverse of the data present at the A-input pins. When OEB is low, OEB is high, or VCC is less than 2.1 V, the B port is turned off. The A port operates at TTL-signal levels and has separate input and output pins. The A outputs reflect the inverse of the data at the B port when the A-port output enable (OEA) is high. When OEA is low or when VCC is less than 2.1 V, the A outputs are in the high-impedance state. Pins are allocated for the four-wire IEEE Std 1149.1 (JTAG) test bus. TMS and TCK are not connected and TDI is shorted to TDO. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 1999, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN74FB2040 8-BIT TTL/BTL TRANSCEIVER SCBS173I – NOVEMBER 1991 – REVISED SEPTEMBER 1999 description (continued) BIAS VCC establishes a voltage between 1.62 V and 2.1 V on the BTL outputs when VCC is not connected. The SN74FB2040 is characterized for operation from 0°C to 70°C. FUNCTION TABLE INPUTS FUNCTION OEB OEB OEA L X L X H L L X H X H H H L L AI data to B bus H L H AI data to B bus, B data to AO bus Isolation B data to AO bus logic symbol† OEB OEA OEB AO1 AI1 AO2 AI2 AO3 AI3 AO4 AI4 AO5 AI5 AO6 AI6 AO7 AI7 AO8 AI8 46 47 45 50 G1 EN2 1EN3 2 51 52 40 1 1 B1 3 B2 2 4 36 B3 3 6 34 B4 8 32 10 B5 9 12 30 B6 14 16 28 B7 18 20 26 B8 24 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 2 38 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN74FB2040 8-BIT TTL/BTL TRANSCEIVER SCBS173I – NOVEMBER 1991 – REVISED SEPTEMBER 1999 functional block diagram OEB OEB OEA AI1 AO1 46 45 47 40 51 B1 50 To Seven Other Channels absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI: Except B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1.2 V to 7 V B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1.2 V to 3.5 V Voltage range applied to any B output in the disabled or power-off state, VO . . . . . . . . . . . . . . –0.5 V to 3.5 V Voltage range applied to any output in the high state, VO: A port . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC Input clamp current, IIK: Except B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40 mA B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 mA Current applied to any single output in the low state, IO: A port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 mA B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 mA Package thermal impedance, θJA (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The package thermal impedance is calculated in accordance with JESD 51. recommended operating conditions (see Note 2) VCC, BIAS VCC, BG VCC Supply voltage VIH High level input voltage High-level VIL Low level input voltage Low-level IIK IOH Input clamp current IOL B port Except B port B port Except B port High-level output current Low level output current Low-level MIN NOM MAX 45 4.5 5 55 5.5 1.62 2.3 2 0.75 1.47 0.8 UNIT V V V –18 mA AO port –3 mA AO port 24 B port 100 mA TA Operating free-air temperature 0 70 °C NOTE 2: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN74FB2040 8-BIT TTL/BTL TRANSCEIVER SCBS173I – NOVEMBER 1991 – REVISED SEPTEMBER 1999 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH B port TEST CONDITIONS Except B port VCC = MIN, VCC = MIN, II = –18 mA II = –40 mA AO port VCC = MIN IOH = –1 mA IOH = –3 mA AO port VCC = MIN IOL = 20 mA IOL = 24 mA B port VCC = MIN IOL = 80 mA IOL = 100 mA Except B port VCC = 5.5 V, VOL II IIH‡ IIL‡ –0.5 2.5 0.35 V V 3.3 0.75 UNIT 0.5 1.1 V 1.15 50 µA 50 µA –50 VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VI = 0.5 V VI = 0.75 V VCC = 0 to 5.5 V, VCC = 5.5 V, VO = 2.1 V VO = 2.7 V 100 µA 50 µA VCC = 5.5 V, VCC = 0 to 2.1 V, VO = 0.5 V VO = 0.5 V to 2.7 V – 50 µA 50 µA VCC = 2.1 V to 0, VCC = 5.5 V, VO = 0.5 V to 2.7 V VO = 0 VCC = 5 5.5 5 V, V IO = 0 B port AO port IOZPD IOS§ A port AO port A port AO port AI port to B port B port to AO port AI port Control inputs Cio –1.2 Except B port IOZL IOZPU Co MAX Except B port B port Ci TYP† VI = 5.5 V VI = 2.7 V IOH IOZH ICC MIN AO port B port per IEEE Std 1194.1-1991 –100 –30 – 50 µA –180 mA 40 mA 70 3.5 VI = VCC or GND pF 3 VO = VCC or GND VCC = 0 to 4.5 V 6 pF 5 5 VCC = 4.5 V to 5.5 V µA A pF † All typical values are at VCC = 5 V, TA = 25°C. ‡ For I/O ports, the parameters IIH and IIL include the off-state output current. § Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second. live-insertion specifications over recommended operating free-air temperature range PARAMETER ICC (BIAS VCC) 4 TEST CONDITIONS VCC = 0 to 4.5 V VCC = 4.5 to 5.5 V V VB = 0 to 2 V, MIN 450 4 5 V to 5.5 55V VI (BIAS VCC) = 4.5 VO B port VCC = 0, VCC = 0 , VI (BIAS VCC) = 5 V VB = 1 V, IO B port VCC = 0 to 5.5 V, VCC = 0 to 2.2 V, MAX 10 µA 2.1 V OEB = 0 to 0.8 V 100 µA OEB = 0 to 5 V 100 POST OFFICE BOX 655303 1.62 UNIT VI (BIAS VCC) = 4.5 V to 5.5 V • DALLAS, TEXAS 75265 –1 SN74FB2040 8-BIT TTL/BTL TRANSCEIVER SCBS173I – NOVEMBER 1991 – REVISED SEPTEMBER 1999 switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 1) FROM (INPUT) TO (OUTPUT) tPLH tPHL AI B tPLH tPHL B AO tPLH tPHL OEB B tPLH tPHL OEB B tPZH tPZL OEA AO tPHZ tPLZ OEA AO PARAMETER VCC = 5 V, TA = 25°C MIN MAX 6 2.4 6.5 4.2 5.6 2.7 5.8 2.3 3.8 5.7 1.9 6.2 2.3 4.2 5.9 2 8.2 3.7 5.1 6.7 3 7 3.1 4.6 5.9 3 6.1 3.6 5.2 6.8 3.3 7 2.9 4.4 5.9 2.6 6.1 2.5 4 5.5 2.1 5.8 2.1 3.6 4.8 2 5 2.3 4.1 5.9 1.9 6.5 1.6 3.1 4.5 1.4 4.7 MIN TYP MAX 3.2 4.5 2.8 UNIT ns ns ns ns ns ns tsk(p) tsk(o) Pulse skew, AI to B or B to AO 0.5 Pulse skew, AI to B or B to AO 0.4 tr tf Rise time, 1.3 V to 1.8 V, B port 2 2.8 3.8 1.7 Fall time, 1.8 V to 1.3 V, B port 1 1.9 3 1 4.2 ns 1 3.4 ns B-port input pulse rejection POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ns ns ns 5 SN74FB2040 8-BIT TTL/BTL TRANSCEIVER SCBS173I – NOVEMBER 1991 – REVISED SEPTEMBER 1999 PARAMETER MEASUREMENT INFORMATION 2.1 V 16.5 Ω 7V S1 500 Ω From Output Under Test CL = 50 pF (see Note A) Open CL = 30 pF (see Note A) 500 Ω LOAD CIRCUIT FOR A OUTPUTS Input 1.5 V Test Point From Output Under Test LOAD CIRCUIT FOR B OUTPUTS 3V TEST S1 0V tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 7V Open 1.5 V tPHL tPLH 1.55 V 1.55 V VOH Output VOL 3V Output Control tPZL 2V Input 1.55 V 1.55 V 1V tPHL 1.5 V Output Waveform 1 S1 at 7 V (see Note B) 1.5 V tPLZ 3.5 V 1.5 V tPZH tPLH VOH Output 1.5 V 0V VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES (A TO B) 1.5 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES (B TO A) Output Waveform 2 S1 at Open (see Note B) VOL + 0.3 V VOL tPHZ 1.5 V VOH VOH – 0.3 V ≈0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES (A PORT) NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: TTL inputs: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns; BTL inputs: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuits and Voltage Waveforms 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. 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