TS922, TS922A Rail-to-rail, high output current dual operational amplifier Datasheet - production data Features • Rail-to-rail input and output • Low noise: 9 nV/√Hz • Low distortion J Flip-chip with backcoating • High output current: 80 mA (able to drive 32 Ω loads) • High-speed: 4 MHz, 1 V/μs • Operating from 2.7 to 12 V • Low input offset voltage: 900 μV max. (TS922A) MiniSO8 (plastic micropackage) • ESD internal protection: 2 kV • Latch-up immunity • Macromodel included in this specification • Dual version available in Flip-chip package D SO8 (plastic micropackage) Applications • Headphone and servo amplifiers • Sound cards, multimedia systems • Line drivers, actuator drivers • Mobile phones and portable equipment • Instrumentation with low noise as key factor • Piezoelectric speaker drivers P TSSOP8 (thin shrink small outline package) N DIP8 (plastic package) Description TS922 and TS922A devices are rail-to-rail dual BiCMOS operational amplifiers optimized and fully specified for 3 V and 5 V operation. These devices have high output currents which allow low-load impedances to be driven. Very low noise, low distortion, low offset, and a high output current capability make these devices an excellent choice for high quality, low voltage, or battery operated audio systems. The devices are stable for capacitive loads up to 500 pF. June 2013 This is information on a product in full production. DocID5150 Rev 11 1/24 www.st.com Contents TS922, TS922A Contents 1 Pin diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 4 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 TS922, TS922A macromodel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5 4.1 Important note concerning this macromodel . . . . . . . . . . . . . . . . . . . . . . 12 4.2 Electrical characteristics from macromodelization . . . . . . . . . . . . . . . . . . 12 4.3 Macromodel code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.1 8-bump Flip-chip package information . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.2 MiniSO8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.3 SO8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5.4 TSSOP8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.5 DIP8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 2/24 DocID5150 Rev 11 TS922, TS922A 1 Pin diagrams Pin diagrams Figure 1. Pinout for Flip-chip package (top view) OUT2 OUT2 -IN2 +IN2 + V GND CC- VVCC+ CC+ + OUT1 OUT1 Figure 2. -IN1 +IN1 Pin connections for MiniSO8, SO8, TSSOP8, and DIP8 (top view) DocID5150 Rev 11 3/24 24 Absolute maximum ratings and operating conditions 2 TS922, TS922A Absolute maximum ratings and operating conditions Table 1. Absolute maximum ratings (AMR) Symbol VCC Vid Parameter Supply voltage(1) Differential input voltage (2) Tstg Storage temperature V ±1 (3) Input voltage VCC- -0.3 to VCC++0.3 Thermal resistance junction to ambient Flip-chip SO8 TSSOP8 -65 to +150 °C 90 125 120 °C/W (4) case(4) Rthjc Thermal resistance junction to SO8 TSSOP8 Tj Maximum junction temperature model(5) ESD Unit 14 Vin Rthja Value HBM: human body MM: machine model(6) CDM: charged device model(7) Output short-circuit duration 40 37 150 °C 2000 120 1500 V See note(8) Latch-up immunity 200 mA Soldering temperature (10 s), leaded version Soldering temperature (10 s), unleaded version 250 260 °C 1. All voltage values, except differential voltage are with respect to network ground terminal. 2. The differential voltage is the non-inverting input terminal with respect to the inverting input terminal. If Vid > ±1 V, the maximum input current must not exceed ±1 mA. In this case (Vid > ±1 V), an input series resistor must be added to limit the input current. 3. Do not exceed 14 V. 4. Short-circuits can cause excessive heating. Destructive dissipation can result from simultaneous shortcircuits on all amplifiers. These values are typical. 5. Human body model: 100 pF discharged through a 1.5 kΩ resistor between two pins of the device, done for all couples of pin combinations with other pins floating. 6. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of pin combinations with other pins floating. 7. Charged device model: all pins and plus package are charged together to the specified voltage and then discharged directly to ground. 8. There is no short-circuit protection inside the device: short-circuits from the output to VCC can cause excessive heating. The maximum output current is approximately 80 mA, independent of the magnitude of VCC. Destructive dissipation can result from simultaneous short-circuits on all amplifiers. 4/24 DocID5150 Rev 11 TS922, TS922A Absolute maximum ratings and operating conditions Table 2. Operating conditions Symbol Parameter VCC Supply voltage Vicm Common mode input voltage range Toper Operating free air temperature range Value 2.7 to 12 DocID5150 Rev 11 VCC- -0.2 to VCC+ +0.2 -40 to +125 Unit V °C 5/24 24 Electrical characteristics 3 TS922, TS922A Electrical characteristics Table 3. Electrical characteristics measured at VCC = +3 V, VCC- = 0 V, Vicm = VCC/2, Tamb = 25 °C, and RL connected to VCC/2 (unless otherwise specified) Symbol Vio Parameter Input offset voltage Test conditions Min. Iib VOH 3 0.9 1.5 Tmin ≤ Tamb ≤ Tmax TS922 TS922A TS922IJ (Flip-chip) 5 1.8 2.5 Vout = VCC/2 Tmin ≤ Tamb ≤ Tmax 1 30 30 Input bias current Vout = VCC/2 Tmin ≤ Tamb ≤ Tmax 15 100 100 RL= 10 kΩ Tmin ≤ Tamb ≤ Tmax 2.90 2.90 RL = 600 Ω Tmin ≤ Tamb ≤ Tmax 2.87 2.87 Low level output voltage Large signal voltage gain nA V 2.63 RL= 10 kΩ Tmin ≤ Tamb ≤ Tmax 50 50 RL = 600 Ω Tmin ≤ Tamb ≤ Tmax 100 100 RL = 32 Ω Avd μV/°C 2 Input offset current High level output voltage Unit mV RL = 32 Ω VOL Max. TS922 TS922A TS922IJ (Flip-chip) ΔVio/ΔT Input offset voltage drift Iio Typ. mV 180 200 RL= 10 kΩ, Vout = 2 Vp-p Tmin ≤ Tamb ≤ Tmax 70 RL = 600 Ω, Vout = 2 Vp-p Tmin ≤ Tamb ≤ Tmax 15 V/mV 35 RL = 32 Ω, Vout = 2 Vp-p 16 Total supply current No load, Vout = VCC/2 Tmin ≤ Tamb ≤ Tmax 2 GBP Gain bandwidth product RL = 600 Ω 4 CMR Common mode rejection ratio Vicm = 0 to 3 V Tmin ≤ Tamb ≤ Tmax 60 56 80 Supply voltage rejection ratio VCC = 2.7 to 3.3 V Tmin ≤ Tamb ≤ Tmax 60 60 85 Output short-circuit current 50 80 mA Slew rate 0.7 1.3 V/μs ICC SVR Io SR 6/24 DocID5150 Rev 11 3 3.2 mA MHz dB TS922, TS922A Electrical characteristics Table 3. Electrical characteristics measured at VCC = +3 V, VCC- = 0 V, Vicm = VCC/2, Tamb = 25 °C, and RL connected to VCC/2 (unless otherwise specified) (continued) Symbol Parameter Test conditions φm Phase margin at unit gain Gm Gain margin en Equivalent input noise voltage f = 1 kHz Total harmonic distortion Vout = 2 Vp-p, f = 1 kHz, Av = 1, RL = 600 Ω THD Cs RL = 600 Ω, CL = 100 pF Channel separation DocID5150 Rev 11 Min. Typ. Max. Unit 68 Degrees 12 dB 9 nV -----------Hz 0.005 % 120 dB 7/24 24 Electrical characteristics TS922, TS922A Table 4. Electrical characteristics measured at VCC = 5 V, VCC- = 0 V, Vicm = VCC/2, Tamb = 25 °C, and RL connected to VCC/2 (unless otherwise specified) Symbol Vio Parameter Input offset voltage Conditions Min. Iib VOH 3 0.9 1.5 Tmin ≤ Tamb ≤ Tmax TS922 TS922A TS922IJ (Flip-chip) 5 1.8 2.5 Vout = VCC/2 Tmin ≤ Tamb ≤ Tmax 1 30 30 Input bias current Vout = VCC/2 Tmin ≤ Tamb ≤ Tmax 15 100 100 RL= 10 kΩ Tmin ≤ Tamb ≤ Tmax 4.9 4.9 RL = 600 Ω Tmin ≤ Tamb ≤ Tmax 4.85 4.85 Low level output voltage Large signal voltage gain nA V 4.4 RL= 10 kΩ Tmin ≤ Tamb ≤ Tmax 50 50 RL = 600 Ω Tmin ≤ Tamb ≤ Tmax 120 120 RL = 32 Ω Avd μV/°C 2 Input offset current High level output voltage Unit mV RL = 32 Ω VOL Max. TS922 TS922A TS922IJ (Flip-chip) ΔVio/ΔT Input offset voltage drift Iio Typ. mV 300 200 RL= 10 kΩ, Vout = 2 Vp-p Tmin ≤ Tamb ≤ Tmax 70 RL = 600 Ω, Vout = 2 Vp-p Tmin ≤ Tamb ≤ Tmax 20 V/mV 35 RL = 32 Ω, Vout = 2 Vp-p 16 Total supply current No load, Vout = VCC/2 Tmin ≤ Tamb ≤ Tmax 2 GBP Gain bandwidth product RL = 600 Ω 4 CMR Common mode rejection ratio Vicm = 0 to 5 V Tmin ≤ Tamb ≤ Tmax 60 56 80 SVR VCC = 4.5 to 5.5 V Supply voltage rejection ratio Tmin ≤ Tamb ≤ Tmax 60 60 85 Output short-circuit current 50 80 mA SR Slew rate 0.7 1.3 V/μs φm Phase margin at unit gain 68 Degrees Gm Gain margin 12 dB en Equivalent input noise voltage 9 nV -----------Hz Icc Io 8/24 RL = 600 Ω, CL =100 pF f = 1 kHz DocID5150 Rev 11 3 3.2 mA MHz dB TS922, TS922A Electrical characteristics Table 4. Electrical characteristics measured at VCC = 5 V, VCC- = 0 V, Vicm = VCC/2, Tamb = 25 °C, and RL connected to VCC/2 (unless otherwise specified) (continued) Symbol THD Cs Parameter Total harmonic distortion Conditions Vout = 2 Vp-p, f = 1 kHz, Av = 1, RL = 600 Ω Channel separation DocID5150 Rev 11 Min. Typ. Max. Unit 0.005 % 120 dB 9/24 24 Electrical characteristics TS922, TS922A Figure 3. Output short-circuit current vs. output voltage Figure 4. Total supply current vs. supply voltage Figure 5. Voltage gain and phase vs. frequency Figure 6. Equivalent input noise voltage vs. frequency Phase Cl = 100 pF Gain (dB) Gain 60 20 Phase (deg.) 120 40 0 0 -20 1E+02 1E+03 1E+04 1E+05 1E+06 1E+07 Equivalent input noise (nV/sqrt(Hz) 180 60 30 25 VCC = ±1.5 V RL = 100 Ω 20 15 10 5 0 0.01 0.1 1 10 100 Frequency (kHz) -60 1E+08 Frequency (Hz) Figure 7. THD + noise vs. frequency (RL = 2 kΩ, Vo = 10 Vpp, VCC = ± 6 V) Figure 8. THD + noise vs. frequency (RL = 32 Ω, Vo = 4 Vpp, VCC = ± 2.5 V) 0.04 0.02 THD + noise (%) THD + noise (%) 0.032 0.015 RL= 2 kΩ, Vo = 10 Vpp VCC = ±6 V, Av = 1 0.01 0.005 0.024 RL = 32 Ω, Vo = 4 Vpp VCC = ±2.5 V, Av = 1 0.016 0.008 0 0 0.01 0.1 1 10 100 0.01 Frequency (kHz) 10/24 0.1 1 Frequency (kHz) DocID5150 Rev 11 10 100 TS922, TS922A Electrical characteristics Figure 9. THD + noise vs. frequency (RL = 32 Ω, Vo = 2 Vpp, VCC = ± 1.5 V) Figure 10. THD + noise vs. output voltage (RL = 600 Ω, f = 1 kHz, VCC = 0/3 V) 10,000 0.7 0.6 THD + noise (%) THD + noise (%) 1,000 0.5 RL = 32 Ω, Vo = 2 Vpp VCC = ±1.5 V, Av = 10 0.4 0.3 0.2 RL = 600 Ω, f = 1 kHz VCC = 0/3 V, Av = -1 0,100 0,010 0.1 0 0.01 0.1 1 10 0,001 100 0 0,2 0,4 0,6 Frequency (kHz) 0,8 1 1,2 Vout (Vrms) Figure 11. THD + noise vs. output voltage (RL = 32 Ω, f = 1 kHz, VCC = ± 1.5 V) Figure 12. THD + noise vs. output voltage (RL = 2 kΩ, f = 1 kHz, VCC = ± 1.5 V) 10 10 THD + noise (%) 0.1 RL = 2 kΩ, f = 1 kHz VCC = ±1.5 V, Av = -1 0.1 0.01 0.01 0.2 0.4 0.6 0. 0.001 Vout (Vrms) 0 0.2 0.4 0.6 0.8 1 1.2 Vout (Vrms) Figure 13. Open loop gain and phase vs. frequency 180 50 40 120 30 CL = 500 pF 20 60 Phase (deg.) 0 Gain (dB) THD + noise (%) 1 RL = 32 Ω, f = 1 kHz VCC = ±1.5 V, Av = -1 1 10 0 0 1E+2 1E+3 1E+4 1E+5 1E+6 1E+7 1E+8 Frequency (Hz) DocID5150 Rev 11 11/24 24 TS922, TS922A macromodel TS922, TS922A 4 TS922, TS922A macromodel 4.1 Important note concerning this macromodel • All models are a trade-off between accuracy and complexity (i.e. simulation time). • Macromodels are not a substitute to breadboarding; rather, they confirm the validity of a design approach and help to select surrounding component values. • A macromodel emulates the nominal performance of a typical device within specified operating conditions (for example, temperature and supply voltage). Thus the macromodel is often not as exhaustive as the datasheet, its purpose is to illustrate the main parameters of the product. Data derived from macromodels used outside of the specified conditions (for example, VCC, temperature) or worse, outside of the device operating conditions (for example, VCC, Vicm), are not reliable in any way. Section 4.2 provides the electrical characteristics resulting from the use of the TS922, TS922A macromodel. 4.2 Electrical characteristics from macromodelization Table 5. Electrical characteristics resulting from macromodel simulation at VCC = 3 V, VCC- = 0 V, RL, CL connected to VCC/2, Tamb = 25 °C (unless otherwise specified) Symbol Conditions Vio Unit 0 mV Avd RL = 10 kΩ 200 V/mV ICC No load, per operator 1.2 mA Vicm -0.2 to 3.2 VOH 2.95 VOL 12/24 Value RL = 10 kΩ Isink VO = 3 V Isource VO = 0 V GBP RL = 600 kΩ V 25 mV 80 mA 4 MHz SR RL = 10 kΩ, CL = 100 pF 1.3 V/μs φm RL = 600 kΩ 68 Degrees DocID5150 Rev 11 TS922, TS922A 4.3 TS922, TS922A macromodel Macromodel code ** Standard Linear Ics Macromodels, 1996. ** CONNECTIONS: * 1 INVERTING INPUT * 2 NON-INVERTING INPUT * 3 OUTPUT * 4 POSITIVE POWER SUPPLY * 5 NEGATIVE POWER SUPPLY * .SUBCKT TS92X 1 2 3 4 5 * .MODEL MDTH D IS=1E-8 KF=2.664234E-16 CJO=10F * * INPUT STAGE CIP 2 5 1.000000E-12 CIN 1 5 1.000000E-12 EIP 10 5 2 5 1 EIN 16 5 1 5 1 RIP 10 11 8.125000E+00 RIN 15 16 8.125000E+00 RIS 11 15 2.238465E+02 DIP 11 12 MDTH 400E-12 DIN 15 14 MDTH 400E-12 VOFP 12 13 DC 153.5u VOFN 13 14 DC 0 IPOL 13 5 3.200000E-05 CPS 11 15 1e-9 DINN 17 13 MDTH 400E-12 VIN 17 5 -0.100000e+00 DINR 15 18 MDTH 400E-12 VIP 4 18 0.400000E+00 FCP 4 5 VOFP 1.865000E+02 FCN 5 4 VOFN 1.865000E+02 FIBP 2 5 VOFP 6.250000E-03 FIBN 5 1 VOFN 6.250000E-03 * GM1 STAGE *************** FGM1P 119 5 VOFP 1.1 FGM1N 119 5 VOFN 1.1 RAP 119 4 2.6E+06 RAN 119 5 2.6E+06 * GM2 STAGE *************** G2P 19 5 119 5 1.92E-02 G2N 19 5 119 4 1.92E-02 R2P 19 4 1E+07 DocID5150 Rev 11 13/24 24 TS922, TS922A macromodel TS922, TS922A R2N 19 5 1E+07 ************************** VINT1 500 0 5 GCONVP 500 501 119 4 19.38 VP 501 0 0 GCONVN 500 502 119 5 19.38 VN 502 0 0 ********* orientation isink isource ******* VINT2 503 0 5 FCOPY 503 504 VOUT 1 DCOPYP 504 505 MDTH 400E-9 VCOPYP 505 0 0 DCOPYN 506 504 MDTH 400E-9 VCOPYN 0 506 0 *************************** F2PP 19 5 poly(2) VCOPYP VP 0 0 0 0 0.5 F2PN 19 5 poly(2) VCOPYP VN 0 0 0 0 0.5 F2NP 19 5 poly(2) VCOPYN VP 0 0 0 0 1.75 F2NN 19 5 poly(2) VCOPYN VN 0 0 0 0 1.75 * COMPENSATION ************ CC 19 119 25p * OUTPUT *********** DOPM 19 22 MDTH 400E-12 DONM 21 19 MDTH 400E-12 HOPM 22 28 VOUT 6.250000E+02 VIPM 28 4 5.000000E+01 HONM 21 27 VOUT 6.250000E+02 VINM 5 27 5.000000E+01 VOUT 3 23 0 ROUT 23 19 6 COUT 3 5 1.300000E-10 DOP 19 25 MDTH 400E-12 VOP 4 25 1.052 DON 24 19 MDTH 400E-12 VON 24 5 1.052 .ENDS;TS92X 14/24 DocID5150 Rev 11 TS922, TS922A 5 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DocID5150 Rev 11 15/24 24 Package information 5.1 TS922, TS922A 8-bump Flip-chip package information Figure 14. 8-bump Flip-chip package dimensions (top view) 1. Die size: 1600 μm x 1600 μm ±30 μm Die height: 350 µm ±20 µm Die height (including bumps): 650 µm Bump diameter: 315 µm ±50 µm Bump height: 250 µm ±40 µm Pitch: 500 µm ±10 µm Backcoating Figure 15. 8-bump Flip-chip footprint recommendation 16/24 DocID5150 Rev 11 TS922, TS922A Package information Figure 16. 8-bump Flip-chip marking (top view) (4) (1) (2) (3) GAMS0306131526CB 1. ST logo 2. Part number 3. Date code: Y = year, WW = week 4. This dot indicates the bump corner 1A Figure 17. 8-bump Flip-chip tape and reel specification (top view) 1 1 A A User direction of feed 1. Device orientation: the devices are oriented in the carrier pocket with bump number A1 adjacent to the sprocket holes. DocID5150 Rev 11 17/24 24 Package information 5.2 TS922, TS922A MiniSO8 package information Figure 18. MiniSO8 package mechanical drawing Table 6. MiniSO8 package mechanical data Dimensions Symbol Millimeters Min. Typ. A Max. Min. Typ. 1.1 A1 0 A2 0.75 b Max. 0.043 0.15 0 0.95 0.030 0.22 0.40 0.009 0.016 c 0.08 0.23 0.003 0.009 D 2.80 3.00 3.20 0.11 0.118 0.126 E 4.65 4.90 5.15 0.183 0.193 0.203 E1 2.80 3.00 3.10 0.11 0.118 0.122 e L 0.85 0.65 0.40 0.60 0.006 0.033 0.80 0.016 0.024 0.95 0.037 L2 0.25 0.010 ccc 0° 0.037 0.026 L1 k 18/24 Inches 8° 0.10 DocID5150 Rev 11 0° 0.031 8° 0.004 TS922, TS922A 5.3 Package information SO8 package information Figure 19. SO8 package mechanical drawing Table 7. SO8 package mechanical data Dimensions Symbol Millimeters Min. Typ. A Inches Max. Min. Typ. 1.75 0.069 A1 0.10 A2 1.25 b 0.28 0.48 0.011 0.019 c 0.17 0.23 0.007 0.010 D 4.80 4.90 5.00 0.189 0.193 0.197 E 5.80 6.00 6.20 0.228 0.236 0.244 E1 3.80 3.90 4.00 0.150 0.154 0.157 e 0.25 Max. 0.004 0.010 0.049 1.27 0.050 h 0.25 0.50 0.010 0.020 L 0.40 1.27 0.016 0.050 L1 k ccc 1.04 0 0.040 8° 0.10 DocID5150 Rev 11 1° 8° 0.004 19/24 24 Package information 5.4 TS922, TS922A TSSOP8 package information Figure 20. TSSOP8 package mechanical drawing Table 8. TSSOP8 package mechanical data Dimensions Symbol Millimeters Min. Typ. A Max. Min. Typ. 1.20 A1 0.05 A2 0.80 b Max. 0.047 0.15 0.002 1.05 0.031 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.008 D 2.90 3.00 3.10 0.114 0.118 0.122 E 6.20 6.40 6.60 0.244 0.252 0.260 E1 4.30 4.40 4.50 0.169 0.173 0.177 e 0° L 0.45 aaa 1.00 0.65 k L1 20/24 Inches 0.60 0.006 0.039 0.041 0.0256 8° 0° 0.75 0.018 1 8° 0.024 0.030 0.039 0.10 DocID5150 Rev 11 0.004 TS922, TS922A 5.5 Package information DIP8 package information Figure 21. DIP8 package mechanical drawing Table 9. DIP8 package mechanical data Dimensions Symbol Millimeters Min. Typ. A Inches Max. Min. Typ. 5.33 Max. 0.210 A1 0.38 0.015 A2 2.92 3.30 4.95 0.115 0.130 0.195 b 0.36 0.46 0.56 0.014 0.018 0.022 b2 1.14 1.52 1.78 0.045 0.060 0.070 c 0.20 0.25 0.36 0.008 0.010 0.014 D 9.02 9.27 10.16 0.355 0.365 0.400 E 7.62 7.87 8.26 0.300 0.310 0.325 E1 6.10 6.35 7.11 0.240 0.250 0.280 e 2.54 0.100 eA 7.62 0.300 eB L 10.92 2.92 3.30 3.81 DocID5150 Rev 11 0.430 0.115 0.130 0.150 21/24 24 Ordering information 6 TS922, TS922A Ordering information Table 10. Order codes Order codes Temperature range TS922ID TS922IDT Package Packaging Marking 922I SO-8 TS922AID TS922AIDT TS922IYDT(1) TS922AIYDT Tube or tape and reel 922AI 922IY SO-8 (automotive grade) (1) TS922IPT TSSOP8 TS922AIPT 922AIY 922I Tape and reel 922AI -40 °C to +125 °C TS922IST TS922AIST TS922IN DIP8 TS922IYPT(2) TS922AIYPT(2) (2) TS922IYST K158 MiniSO8 K159 Tube TS922IN 922IY TSSOP8 (automotive grade) TS922AIYST(2) MiniSO8 (automotive grade) TS922IJT/EIJT Flip-chip with backcoating 922AY Tape and reel K10A K10B 922 1. Qualified and characterized according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 and Q 002 or equivalent. 2. Qualification and characterization according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 and Q 002 or equivalent are ongoing. 22/24 DocID5150 Rev 11 TS922, TS922A 7 Revision history Revision history Table 11. Document revision history Date Revision 01-Feb-2001 1 First release. 01-Jul-2004 2 Flip-chip package inserted in the document. 02-May-2005 3 Modifications in AMR Table 1 on page 4 (explanation of Vid and Vi limits, ESD MM and CDM values added, Rthja added). 01-Aug-2005 4 PPAP references inserted in the datasheet, see Table 6 on page 22. 01-Mar-2006 5 TS922EIJT part number inserted in the datasheet, see Table 6 on page 22. 26-Jan-2007 6 Modifications in AMR Table 1 on page 4 (Rthjc added), parameter limits on full temperature range added in Table 3 on page 6 and Table 4 on page 8. 12-Nov-2007 7 Added notes on ESD in AMR table. Re-formatted package information. Added notes for automotive grade in order codes table. 02-Feb-2010 8 Document reformatted. Added root part number TS922A on cover page. Removed TS922AIYD order code from Table 10. 9 Added MiniSO8 package. Modified test conditions for CMR in Table 3 and Table 4. Replaced VDD by VCC- in title of Table 3, Table 4, and Table 5. Updated titles of Figure 7 to Figure 12 (added conditions to differentiate them). Removed TS922IYD device from Table 10. Minor corrections throughout document. 04-Jun-2013 10 Features: updated package information for Flip-chip Figure 2: Updated title Table 1: updated footnotes 5, 6, and 7 Table 3 and Table 4: replaced DVio with ΔVio/ΔT Figure 14: added backcoating to package information Figure 16: updated footnote 3 Table 10: updated package information for Flip-chip 27-Jun-2013 11 Figure 14: updated to include new height for backcoating 15-Jan-2013 Changes DocID5150 Rev 11 23/24 24 TS922, TS922A Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. ST PRODUCTS ARE NOT AUTHORIZED FOR USE IN WEAPONS. NOR ARE ST PRODUCTS DESIGNED OR AUTHORIZED FOR USE IN: (A) SAFETY CRITICAL APPLICATIONS SUCH AS LIFE SUPPORTING, ACTIVE IMPLANTED DEVICES OR SYSTEMS WITH PRODUCT FUNCTIONAL SAFETY REQUIREMENTS; (B) AERONAUTIC APPLICATIONS; (C) AUTOMOTIVE APPLICATIONS OR ENVIRONMENTS, AND/OR (D) AEROSPACE APPLICATIONS OR ENVIRONMENTS. WHERE ST PRODUCTS ARE NOT DESIGNED FOR SUCH USE, THE PURCHASER SHALL USE PRODUCTS AT PURCHASER’S SOLE RISK, EVEN IF ST HAS BEEN INFORMED IN WRITING OF SUCH USAGE, UNLESS A PRODUCT IS EXPRESSLY DESIGNATED BY ST AS BEING INTENDED FOR “AUTOMOTIVE, AUTOMOTIVE SAFETY OR MEDICAL” INDUSTRY DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2013 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 24/24 DocID5150 Rev 11