SN54LVC06A, SN74LVC06A HEX INVERTER BUFFERS/DRIVERS WITH OPEN-DRAIN OUTPUTS www.ti.com SCAS596N – OCTOBER 1997 – REVISED JULY 2005 FEATURES • • Operate From 1.65 V to 3.6 V Specified From –40°C to 85°C, –40°C to 125°C, and –55°C to 125°C Inputs and Open-Drain Outputs Accept Voltages up to 5.5 V SN54LVC06A . . . J OR W PACKAGE SN74LVC06A . . . D, DB, DGV, NS, OR PW PACKAGE (TOP VIEW) 2 13 3 12 4 11 5 10 6 7 9 8 VCC 6A 6Y 5A 5Y 4A 4Y 1Y 2A 2Y 3A 3Y 1 14 1Y 1A NC VCC 6A VCC 14 2 13 6A 3 12 6Y 4 11 5A 5 6 10 5Y 9 4A 7 8 4Y 1 SN54LVC06A . . . FK PACKAGE (TOP VIEW) SN74LVC06A . . . RGY PACKAGE (TOP VIEW) 1A 1A 1Y 2A 2Y 3A 3Y GND • GND • Max tpd of 3.7 ns at 3.3 V Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 250 mA Per JESD 17 2A NC 2Y NC 3A 4 3 2 1 20 19 18 5 6 17 16 7 8 15 14 9 10 11 12 13 6Y NC 5A NC 5Y 3Y GND NC 4Y 4A • • NC - No internal connection DESCRIPTION/ORDERING INFORMATION These hex inverter buffers/drivers are designed for 1.65-V to 3.6-V VCC operation. The outputs of the 'LVC06A devices are open drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 24 mA. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. ORDERING INFORMATION PACKAGE (1) TA –40°C to 85°C QFN – RGY Tube of 50 SN74LVC06AD Reel of 2500 SN74LVC06ADR Reel of 250 SN74LVC06ADT SOP – NS Reel of 2000 SN74LVC06ANSR LVC06A SSOP – DB Reel of 2000 SN74LVC06ADBR LC06A Tube of 90 SN74LVC06APW Reel of 2000 SN74LVC06APWR TSSOP – PW –55°C to 125°C (1) TOP-SIDE MARKING SN74LVC06ARGYR SOIC – D –40°C to 125°C ORDERABLE PART NUMBER Reel of 1000 LC06A LVC06A LC06A Reel of 250 SN74LVC06APWT TVSOP – DGV Reel of 2000 SN74LVC06ADGVR LC06A CDIP – J Tube of 25 SNJ54LVC06AJ SNJ54LVC06AJ CFP – W Tube of 150 SNJ54LVC06AW SNJ54LVC06AW LCCC – FK Tube of 55 SNJ54LVC06AFK SNJ54LVC06AFK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1997–2005, Texas Instruments Incorporated SN54LVC06A, SN74LVC06A HEX INVERTER BUFFERS/DRIVERS WITH OPEN-DRAIN OUTPUTS www.ti.com SCAS596N – OCTOBER 1997 – REVISED JULY 2005 DESCRIPTION/ORDERING INFORMATION (CONTINUED) These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. FUNCTION TABLE (EACH INVERTER) INPUT A OUTPUT Y H L L H LOGIC DIAGRAM, EACH INVERTER (POSITIVE LOGIC) A Y Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX Supply voltage range –0.5 6.5 V VI Input voltage range (2) –0.5 6.5 V VO Output voltage range –0.5 6.5 V IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA ±100 mA VCC Continuous current through VCC or GND D package (3) 86 DB package (3) θJA Package thermal impedance 96 DGV package (3) 127 NS package (3) 76 PW package (3) 113 RGY package (4) Tstg Ptot (1) (2) (3) (4) (5) (6) 2 Storage temperature range Power dissipation (5) (6) °C/W 47 –65 TA = –40°C to 125°C UNIT 150 °C 500 mW Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. The package thermal impedance is calculated in accordance with JESD 51-7. The package thermal impedance is calculated in accordance with JESD 51-5. For the D package: above 70°C the value of Ptot derates linearly with 8 mW/K. For the DB, DGV, NS, and PW packages: above 60°C the value of Ptot derates linearly with 5.5 mW/K. SN54LVC06A, SN74LVC06A HEX INVERTER BUFFERS/DRIVERS WITH OPEN-DRAIN OUTPUTS www.ti.com SCAS596N – OCTOBER 1997 – REVISED JULY 2005 Recommended Operating Conditions (1) SN54LVC06A (2) –55°C to 125°C Operating VCC Supply voltage VIH High-level input voltage Data retention only MAX 1.65 3.6 1.5 VCC = 2.3 V to 2.7 V 1.7 VCC = 2.7 V to 3.6 V 2 V 0.35 × VCC VCC = 1.65 V to 1.95 V Low-level input voltage V 0.65 × VCC VCC = 1.65 V to 1.95 V VIL UNIT MIN VCC = 2.3 V to 2.7 V 0.7 VCC = 2.7 V to 3.6 V 0.8 V VI Input voltage 0 5.5 V VO Output voltage 0 5.5 V VCC = 1.65 V IOL (1) (2) Low-level output current 4 VCC = 2.3 V 8 VCC = 2.7 V 12 VCC = 3 V 24 mA All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Product preview Recommended Operating Conditions (1) SN74LVC06A TA = 25°C VCC Supply voltage VIH High-level input voltage Operating Data retention only –40°C to 85°C –40°C to 125°C MAX MIN MAX MIN MAX 1.65 3.6 1.65 3.6 1.65 3.6 1.5 1.5 1.5 0.65 × VCC 0.65 × VCC 0.65 × VCC VCC = 2.3 V to 2.7 V 1.7 1.7 1.7 VCC = 2.7 V to 3.6 V 2 VCC = 1.65 V to 1.95 V UNIT MIN VCC = 1.65 V to 1.95 V 2 V V 2 0.35 × VCC 0.35 × VCC 0.35 × VCC 0.7 0.7 0.7 VIL Low-level input voltage VI Input voltage 0 5.5 0 5.5 0 5.5 V VO Output voltage 0 5.5 0 5.5 0 5.5 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 1.65 V IOL (1) Low-level output current 0.8 4 0.8 4 V 0.8 4 VCC = 2.3 V 8 8 8 VCC = 2.7 V 12 12 12 VCC = 3 V 24 24 24 mA All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 3 SN54LVC06A, SN74LVC06A HEX INVERTER BUFFERS/DRIVERS WITH OPEN-DRAIN OUTPUTS www.ti.com SCAS596N – OCTOBER 1997 – REVISED JULY 2005 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) SN54LVC06A (1) PARAMETER TEST CONDITIONS VCC –55°C to 125°C UNIT MIN TYP (2) MAX IOL = 100 µA VOL II ICC ∆ICC Ci (1) (2) 1.65 V to 3.6 V 0.2 IOL = 4 mA 1.65 V 0.45 IOL = 8 mA 2.3 V 0.7 IOL = 12 mA 2.7 V 0.4 IOL = 24 mA 3V 0.55 ±5 µA 3.6 V 10 µA 2.7 V to 3.6 V 500 µA VI = 5.5 V or GND 3.6 V VI = VCC or GND, IO = 0 One input at VCC – 0.6 V, Other inputs at VCC or GND V VI = VCC or GND 3.3 V 5 pF Product preview TA = 25°C Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) SN74LVC06A PARAMETER TEST CONDITIONS VCC TA = 25°C MIN IOL = 100 µA VOL MAX –40°C to 125°C MIN IOL = 4 mA 1.65 V 0.24 0.45 0.6 IOL = 8 mA 2.3 V 0.3 0.7 0.75 IOL = 12 mA 2.7 V 0.4 0.4 0.6 3V VI = 5.5 V or GND ICC VI = VCC or GND, IO = 0 One input at VCC – 0.6 V, Other inputs at VCC or GND VI = VCC or GND UNIT MAX 0.2 VI or VO = 5.5 V Ci MIN 0.1 Ioff ∆ICC –40°C to 85°C MAX 1.65 V to 3.6 V IOL = 24 mA II TYP 0.3 V 0.55 0.55 0.8 3.6 V ±1 ±5 ±20 µA 0 ±1 ±10 ±20 µA 3.6 V 1 10 40 µA 500 500 5000 µA 2.7 V to 3.6 V 3.3 V 5 pF Switching Characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) SN54LVC06A (1) PARAMETER tpd FROM (INPUT) A TO (OUTPUT) Y VCC MIN MAX 1.8 V ± 0.15 V 1.4 5.6 2.5 V ± 0.2 V 1 3.1 2.7 V 3.3 V ± 0.3 V (1) 4 Product preview –55°C to 125°C 3.9 1 3.7 UNIT ns SN54LVC06A, SN74LVC06A HEX INVERTER BUFFERS/DRIVERS WITH OPEN-DRAIN OUTPUTS www.ti.com SCAS596N – OCTOBER 1997 – REVISED JULY 2005 Switching Characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) SN74LVC06A PARAMETER FROM (INPUT) TO (OUTPUT) VCC TA = 25°C MIN tpd A Y –40°C to 85°C TYP MAX MIN MAX –40°C to 125°C MIN MAX 1.8 V ± 0.15 V 1.4 3 5.1 1.4 5.6 1.4 7.6 2.5 V ± 0.2 V 1 1.9 2.8 1 3.1 1 4 2.7 V 1 2.4 3.7 1 3.9 1 5 3.3 V ± 0.3 V 1 2.2 3.5 1 3.7 1 5 UNIT ns Operating Characteristics TA = 25°C PARAMETER Cpd Power dissipation capacitance per buffer/driver TEST CONDITIONS f = 10 MHz VCC TYP 1.8 V 2.1 2.5 V 2.3 3.3 V 2.5 UNIT pF 5 SN54LVC06A, SN74LVC06A HEX INVERTER BUFFERS/DRIVERS WITH OPEN-DRAIN OUTPUTS www.ti.com SCAS596N – OCTOBER 1997 – REVISED JULY 2005 PARAMETER MEASUREMENT INFORMATION (OPEN DRAIN) VLOAD S1 RL From Output Under Test Open TEST GND RL CL (see Note A) S1 tPZL (see Notes E and F) VLOAD tPLZ (see Notes E and G) VLOAD tPHZ/tPZH VLOAD LOAD CIRCUIT INPUT VCC VI 1.8 V ± 0.15 V 2.5 V ± 0.2 V 2.7 V 3.3 V ± 0.3 V VM tr/tf ≤ 2 ns ≤ 2 ns ≤ 2.5 ns ≤ 2.5 ns VCC VCC 2.7 V 2.7 V VLOAD VCC/2 VCC/2 1.5 V 1.5 V 2 × VCC 2 × VCC 6V 6V CL RL V∆ 30 pF 30 pF 50 pF 50 pF 1 kΩ 500 Ω 500 Ω 500 Ω 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input VM 0V tw tsu th VI VM Input VM VM Data Input VM 0V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION VI VM Input VM 0V Output VM VOL tPHL VM VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS tPLZ VLOAD/2 VM tPZH VOH Output VM 0V Output Waveform 1 S1 at VLOAD (see Note B) tPLH VM VM tPZL VOH VM VI Output Control tPHL tPLH VI Output Waveform 2 S1 at VLOAD (see Note B) VOL + V∆ VOL tPHZ VM VLOAD/2 - V∆ VLOAD/2 ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω. D. The outputs are measured one at a time, with one transition per measurement. E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd. F. tPZL is measured at VM. G. tPLZ is measured at VOL + V∆. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms 6 PACKAGE OPTION ADDENDUM www.ti.com 6-Dec-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74LVC06AD ACTIVE SOIC D 14 SN74LVC06ADBR ACTIVE SSOP DB SN74LVC06ADBRE4 ACTIVE SSOP SN74LVC06ADE4 ACTIVE SN74LVC06ADGVR 50 Lead/Ball Finish MSL Peak Temp (3) Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM DB 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SOIC D 14 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM ACTIVE TVSOP DGV 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC06ADGVRE4 ACTIVE TVSOP DGV 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC06ADR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC06ADRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC06ADT ACTIVE SOIC D 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC06ADTE4 ACTIVE SOIC D 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC06ANSR ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC06ANSRE4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC06APW ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC06APWE4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC06APWG4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC06APWLE OBSOLETE TSSOP PW 14 SN74LVC06APWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC06APWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC06APWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC06APWT ACTIVE TSSOP PW 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC06APWTE4 ACTIVE TSSOP PW 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC06APWTG4 ACTIVE TSSOP PW 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC06ARGYR ACTIVE QFN RGY 14 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1YEAR SN74LVC06ARGYRG4 ACTIVE QFN RGY 14 50 TBD (1) TBD The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. Addendum-Page 1 Call TI Call TI Call TI Call TI PACKAGE OPTION ADDENDUM www.ti.com 6-Dec-2006 NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°–8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. Falls within JEDEC: 24/48 Pins – MO-153 14/16/20/56 Pins – MO-194 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-153 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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