ALLEGRO A8438EEJTR-T

A8438
Package EJ:
MLP/TDFN, 3 × 3 mm
0.75 mm nominal height
Photoflash Capacitor
Charger with IGBT Driver
FEATURES
Approximate Scale 1:1
A8438-DS, Rev. 1
APPLICATIONS
Digital camera flash
Film camera flash
Cell phone flash
Emergency strobe light
Two Alkaline/NiMH/NiCAD or one Li+ battery
or 1.5 to 5.5 V
D1
VBATT
VOUT
T1
VBIAS 3.0 to 5.5 V
R5
100 kΩ
+
The A8438 is a highly integrated IC that charges
photoflash capacitors for digital and film cameras. It
also features an integrated IGBT driver that facilitates
the flash discharge function and saves board space.
To charge the photoflash capacitor, the A8438
integrates a 40 V, DMOS switch that drives the transformer in a flyback topology, allowing optimized
design with tight coupling and high efficiency. A proprietary control scheme optimizes the capacitor charging time. Low quiescent current and low shutdown
current further improve system efficiency and extend
battery life.
Three levels of switch current limit are provided:
1.6, 1.8, and 2.0 A. The level is determined by configuring the ILIM pin as grounded, floating, or pulled up
to IC supply voltage, respectively.
The CHARGE pin enables the A8438 and starts the
charging of the output capacitor. When the designated
output voltage is reached, the A8438 stops the charging until the CHARGE pin is toggled again. Pulling
the CHARGE pin low stops charging. The D
¯¯¯O¯¯N¯¯E
¯ pin
is an open-drain indicator of when the designated output voltage is reached.
The A8438 can be used with two Alkaline/NiMH/
NiCAD or one single-cell Li+ battery connected to the
transformer primary. Connect the VIN pin to a 3.0 to
5.5 V supply, which can be either the system rail or the
Li+ battery, if used.
The A8438 is available in a very low profile
(0.75 mm) 10-terminal 3×3 mm MLP/TDFN package,
making it ideal for space-constrained applications. It is
lead (Pb) free, with 100% matte-tin leadframe plating.
Power with 1 Li+ or 2 Alkaline/NiMH/NiCAD batteries
Adjustable output voltage
>75% efficiency
Three levels of switch current limit: 1.6, 1.8, 2.0 A
Fast charge time
Charge complete indication
Integrated IGBT driver with trigger
No primary-side Schottky diode needed
Low-profile package (0.75 mm nominal height)
C1
0.1 μF
R4
C2
4.7 μF
R1
10 kΩ
R2
VIN
2.0 A
1.8 A (N.C.)
SW
ILIM
1.6 A
COUT
FB
CHARGE
R3
A8438
DONE
TRIGGER
IGBTDRV
GND
To IGBT Gate
Figure 1. Typical circuit with separate power supply to transformer
One Li+ battery
VBATT or 3.0 to 5.5 V
R5
100 kΩ
2.0 A
1.8 A (N.C.)
1.6 A
T1
C1
0.1 μF
R4
C2
4.7 μF
10 kΩ
D1
R1
R2
VIN
SW
ILIM
FB
CHARGE
R3
A8438
DONE
TRIGGER
IGBTDRV
GND
To IGBT Gate
Figure 2. Typical circuit with single power supply
VOUT
COUT
A8438
Photoflash Capacitor Charger with IGBT Driver
Functional Block Diagram
SW
DCM
Comparator
VIN
Control Logic
CMP3
18 μs
H→L
Triggered Timer
1.2 V
S SET Q
R
CMP2
40 V
DMOS
Q
CLR Q
ILIM
Comparator
ILIM
Adjustable
Reference
ILIM Decoder
Enable
Q
Q
SET
CLR
S
FB
R
CMP1
CHARGE
1.2 V
DONE
VIN
TRIGGER
One-Shot
IGBTDRV
GND
Device Pin-out Diagram
Terminal List Table
Number
1
Name
NC
Function
No connection
2
IGBTDRV
3
VIN
Power supply input
4
GND
Device ground
5
CHARGE
6
SW
7
TRIGGER
8
¯D¯¯
O
¯¯
N¯¯
E¯
9
FB
10
ILIM
IGBT driver gate drive output
Charging enable; set to low to
power-off the A8438
Switch, internally connected to the
DMOS power FET drain
NC
1
10 ILIM
IGBTDRV
2
9
FB
VIN
3
8
DONE
GND
4
7
TRIGGER
CHARGE
5
6
SW
Package Thermal Characteristics
RθJA = 45 °C/W, on a 4-layer board. Additional information is
available on the Allegro Web site.
Strobe signal input
Absolute Maximum Ratings
Open drain, when pulled low by
internal MOSFET, indicates that
charging target level has been
reached
Input or Output Voltage
SW pin, VSW ............................................................ –0.3 to 40 V
IGBTDRV pin, VIGBTDRV.............................. –0.3 to VIN + 0.3 V
FB pin, VFB ............................................................... –0.3 to VIN
All other pins, Vx ...................................................... –0.3 to 7 V
Operating Ambient Temperature, TA ................................ –40°C to 85°C
Maximum Junction Temperature, TJ(max) ........................................ 150°C
Storage Temperature, TS .............................................. –55°C to 150°C
Output voltage feedback
Switch current limit setting; sets
three discreet levels
2
A8438-DS, Rev. 1
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A8438
Photoflash Capacitor Charger with IGBT Driver
ELECTRICAL CHARACTERISTICS Typical values at TA = 25°C and VIN = 3.3 V (unless otherwise noted)
Characteristics
Supply Voltage*
Supply Current
Primary Side Current Limit
SW On Resistance
SW Leakage Current*
SW Maximum Off-Time
CHARGE Input Current
CHARGE Input Voltage*
Symbol
Test Conditions
VIN
IIN
ISWLIM
RDS(On)SW
ISWLKG
tOFF(Max)
ICHARGE
VCHARGE(H)
VCHARGE(L)
¯D¯¯
O
¯¯
N¯¯
E
¯ Output Leakage Current*
IDONELKG
¯D¯¯
O
¯¯
N¯¯
E
¯ Output Low Voltage*
FB Voltage Threshold*
FB Input Current
UVLO Enable Threshold
UVLO Hysteresis
IGBT Driver
IGBTDRV On Resistance to VIN
IGBTDRV On Resistance to GND
TRIGGER Input Current
VDONE(L)
VFB
IFB
VUVLO
Charging
Charging done
Shutdown (VCHARGE = 0 V, VTRIGGER = 0 V)
VILIM = 0 V
ILIM pin floating
VILIM = VIN
VIN = 3.3 V, ID = 800 mA, TA = 25°C
VSW = 35 V
VCHARGE = VIN
32 μA into ¯D¯¯
O
¯¯
N¯¯
E¯ pin
VFB = 1.205 V
VIN rising
VUVLOHYS
VIN = 3.3 V, VIGBTDRV = 1.5 V
RDS(On)I-V
RDS(On)I-G
VIN = 3.3 V, VIGBTDRV = 1.5 V
ITRIGGER
VTRIGGER = VIN
VTRIGGER(H)
TRIGGER Input Voltage*
VTRIGGER(L)
Propagation Delay, Rising
tDr
Rgate=12 Ω, CLOAD = 6500 pF, VIN = 3.3 V
Rgate=12 Ω, CLOAD = 6500 pF, VIN = 3.3 V
Propagation Delay, Falling
tDf
Output Rise Time
tr
Rgate=12 Ω, CLOAD = 6500 pF, VIN = 3.3 V
Output Fall Time
tf
Rgate=12 Ω, CLOAD = 6500 pF, VIN = 3.3 V
*Guaranteed by design and characterization over operating temperature range, –40°C to 85°C.
Min.
Typ.
3
–
–
–
–
1.6
–
–
–
–
–
2
–
–
5
1
0.01
1.6
1.8
2.0
0.27
0.2
18
–
–
–
5.5
–
10
1
–
2.0
–
–
1
–
1
–
0.8
V
mA
μA
μA
A
A
A
Ω
μA
μs
μA
V
V
–
–
1
μA
–
–
100
mV
1.187
–
2.55
–
–
–
–
2
–
–
–
–
–
Max. Units
1.205 1.223
–120
–
2.65 2.75
150
–
5
6
–
–
–
30
30
70
70
–
–
1
–
0.8
–
–
–
–
V
nA
V
mV
Ω
Ω
μA
V
V
ns
ns
ns
ns
3
A8438-DS, Rev. 1
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A8438
Photoflash Capacitor Charger with IGBT Driver
Performance Characteristics
Tests performed using application circuit shown in figure 6 (unless otherwise noted)
Charging Waveforms: 100 μF photoflash capacitor
VOUT
Symbol
C1
C4
t
Conditions
Parameter
VOUT
IBATT(Avg)
time
Parameter
VBATT
VBIAS
COUT
Units/Division
50 V
200 mA
1s
Value
2.0 V
3.3 V
100 μF
IBATT
C4
C1
t
VOUT
Symbol
C1
C4
t
Conditions
Parameter
VOUT
IBATT(Avg)
time
Parameter
VBATT
VBIAS
COUT
Units/Division
50 V
200 mA
1s
Value
2.5 V
3.3 V
100 μF
IBATT
C4
C1
t
VOUT
Symbol
C1
C4
t
Conditions
Parameter
VOUT
IBATT(Avg)
time
Parameter
VBATT
VBIAS
COUT
Units/Division
50 V
200 mA
1s
Value
3.0 V
3.3 V
100 μF
IBATT
C4
C1
t
4
A8438-DS, Rev. 1
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A8438
Photoflash Capacitor Charger with IGBT Driver
Performance Characteristics
Tests performed using application circuit shown in figure 6 (unless otherwise noted)
VOUT
Symbol
C1
C4
t
Conditions
Parameter
VOUT
IBATT(Avg)
time
Parameter
VBATT
VBIAS
COUT
Units/Division
50 V
200 mA
1s
Value
3.6 V
3.3 V
100 μF
IBATT
C4
C1
t
VOUT
Symbol
C1
C4
t
Conditions
Parameter
VOUT
IBATT(Avg)
time
Parameter
VBATT
VBIAS
COUT
Units/Division
50 V
200 mA
1s
Value
4.5 V
3.3 V
100 μF
IBATT
C4
C1
t
VOUT
Symbol
C1
C4
t
Conditions
Parameter
VOUT
IBATT(Avg)
time
Parameter
VBATT
VBIAS
COUT
Units/Division
50 V
200 mA
1s
Value
5.0 V
3.3 V
100 μF
IBATT
C4
C1
t
5
A8438-DS, Rev. 1
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A8438
Photoflash Capacitor Charger with IGBT Driver
Performance Characteristics
Tests performed using application circuit shown in figure 6 (unless otherwise noted)
Charging Waveforms: 140 μF photoflash capacitor
VOUT
Symbol
C1
C4
t
Conditions
Parameter
VOUT
IBATT(Avg)
time
Parameter
VBATT
VBIAS
IAVG
ILIM
COUT
Units/Division
50 V
200 mA
1s
Value
2.0 V
3.3 V
770 mA
1.8 A
140 μF
IBATT
C4
C1
t
VOUT
Symbol
C1
C4
t
Conditions
Parameter
VOUT
IBATT(Avg)
time
Parameter
VBATT
VBIAS
IAVG
ILIM
COUT
Units/Division
50 V
200 mA
1s
Value
2.0 V
3.3 V
820 mA
2.0 A
140 μF
IBATT
C4
C1
t
6
A8438-DS, Rev. 1
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A8438
Photoflash Capacitor Charger with IGBT Driver
Performance Characteristics, continued
Tests performed using application circuit shown in figure 6 (unless otherwise noted)
Charge Time
Efficiency
VBIAS = 3.3 V, COUT = 100 μF, ILIM = 2 A, VOUT = 300 V
Connect VBATT to a separate power supply
TA = 25°C
6.5
90
5.5
80
Efficiency (%)
Charge Time (s)
VBATT = 3.0 V, VIN = 5.0 V
4.5
3.5
VBATT = VIN = 5.0 V
70
VBATT = VIN = 3.3 V
60
50
2.5
40
100
1.5
2.0
2.5
3.0
3.5
4.0
VBATT (V)
4.5
5.0
5.5
150
200
VOUT (V)
250
300
IGBT Drive Timing Definition
TRIGGER
50%
t Dr
IGBTDRV
10%
50%
tr
t Df
90%
90%
tf
10%
7
A8438-DS, Rev. 1
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A8438
Photoflash Capacitor Charger with IGBT Driver
Performance Characteristics, continued
Tests performed using application circuit shown in figure 6 (unless otherwise noted)
IGBT Drive Performance
tr
Rising Signal
VIGBTDRV
Symbol
C2
C3
t
Conditions
Parameter
VIGBTDRV
VTRIGGER
time
Parameter
tDr
tr
CLOAD
Rgate
Units/Division
1V
1V
50 ns
Value
22.881 ns
63.125 ns
6800 pF
12 Ω
C2
VTRIGGER
C3
t
tf
Falling Signal
Symbol
C2
C3
t
Conditions
Parameter
VIGBTDRV
VTRIGGER
time
Parameter
tDf
tf
CLOAD
Rgate
Units/Division
1V
1V
50 ns
Value
27.427 ns
65.529 ns
6800 pF
12 Ω
C2
VIGBTDRV
C3
VTRIGGER
t
8
A8438-DS, Rev. 1
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A8438
Photoflash Capacitor Charger with IGBT Driver
Functional Description
Overview
The A8438 is a photoflash capacitor charger control IC with
adjustable input current limiting. It also integrates an IGBT
driver for strobe operation of the flash tube, dramatically saving
board space in comparison to discrete solutions for strobe flash
operation. The control logic is shown in the functional block
diagram.
The charging operation of the A8438 is started by a low-to-high
signal on the CHARGE pin. When a charging cycle is initiated,
the transformer primary side current, IPrimary, ramps up linearly at
a rate determined by the combined effect of the battery voltage,
VBATT , and the primary side inductance, LPrimary. When IPrimary
reaches the current limit, ISWLIM , set by configuring the ILIM
pin, the internal MOSFET is turned off immediately, allowing the
energy to be pushed into the photoflash capacitor, COUT, from the
secondary winding. The secondary side current drops linearly as
COUT charges.
While the internal MOSFET switch is turned off, the output
voltage, VOUT, is sensed by a resistor string, R1 through R3, connected between the anode of the output diode, D1, and ground.
This resistor string forms a voltage divider that feeds back to the
FB pin. The resistors must be sized to achieve a desired output
voltage level based on a typical value of 1.205 V at the FB pin.
As soon as VOUT reaches the desired value, the charging process
is terminated. The user may toggle the CHARGE pin to refresh
the photoflash capacitor.
and a sensing circuit tracks the fly-back voltage at the SW node.
As soon as this voltage swings below 1.2 V, the internal MOSFET switch is turned on again, starting the next charging cycle.
The IC operates in the Timer mode when beginning to charge a
completely discharged photoflash capacitor, usually when the
output voltage, VOUT, is less than approximately 10 to 20 V.
Timer mode is a fixed 18 μs off-time control. One advantage of
the A8438 watchdog timer control scheme is that it limits the
initial current surge and thus acts as a “soft-start.” As shown in
figure 3, the timer mode only lasts a small fraction of a second
(usually < 100 ms). It can be recognized by its lower initial input
charging current as a result of a lower duty cycle. As output
voltage rises to more than 10 to 20 V, the adaptive Fast Charging
mode takes over the control, raising the average input current
level.
To understand the Timer mode, it is noted that the secondary
winding charge current, ISecondary, decreases linearly at a rate of:
dISecondary
dt
where:
=
VOUT
LPrimary
N2
(1)
ISecondary is the secondary side current,
LPrimary is the primary side inductance, and
N is the transformer turns ratio (NSecondary / NPrimary).
Timer
Mode
Fast Charging Mode
Switch On-Time and Off-Time Control
The A8438 implements an adaptive on-time/off-time control.
(For circuit details, please refer to the the Control Logic block
in the simplified Functional Block Diagram on page 2.) On-time
duration, tON , is determined by input voltage, VIN, transformer
primary inductance, LPrimary, and the set current limit, ISWLIM .
Off-time duration, tOFF , depends on the operating conditions
during switch off-time. The A8438 applies its two charging
modes, Fast Charging mode and Timer mode, according to those
conditions.
IBATT(Avg)
VOUT
Fast Charging and Timer Modes
The IC operates in the Fast Charging mode when the photoflash
capacitor, COUT, is only partially discharged. In Fast Charging
mode, the converter operates near the discontinuous boundary,
Figure 3. Sequencing of Timer mode and Fast Charging mode (time
axis scale is 1 s per division)
9
A8438-DS, Rev. 1
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A8438
Photoflash Capacitor Charger with IGBT Driver
When the A8438 charges a fully-discharged photoflash capacitor,
ISecondary decreases very slowly due to the low initial VOUT. The
A8438 internal timer (Timer mode) sets a maximum timeframe of
18 μs for the off-time as long as the SW node voltage is greater
than 1.2 V. When the off-time passes 18 μs, the internal MOSFET
switch is turned on, initiating the next charging cycle .
Input Current Limiting
The peak input current, ISWLIM , can be set to three levels by
configuring the ILIM pin:
ISWLIM Setting
(A)
ILIM Pin
Connection
1.6
External ground
1.8
Float
2.0
Pull up to IC supply voltage
with a 1 to 10 kΩ resistor
Lower input current offers the advantage of a longer battery
lifetime. For faster charging time, however, use the highest
current limit. ISWLIM may be adjusted during charging.
10
A8438-DS, Rev. 1
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A8438
Photoflash Capacitor Charger with IGBT Driver
Applications Information
LPrimary (μH), use the following formula:
Transformer Design
Turns Ratio. The minimum transformer turns ratio, N,
(Secondary:Primary) should be chosen based on the following
formula:
N≥
VOUT + VD_Drop
40 − VBATT
(2)
where:
VOUT (V) is the required output voltage level,
VD_Drop (V) is the forward voltage drop of the output diode(s),
VBATT (V) is the transformer battery supply, and
40 (V) is the rated voltage for the internal MOSFET switch,
representing the maximum allowable reflected voltage from the
output to the SW pin.
For example, if VBATT is 3.5 V and VD_Drop is 1.7 V (which could
be the case when two high voltage diodes were in series), and the
desired VOUT is 320 V, then the turns ratio should be at least 8.9.
In a worst case, when VBATT is highest and VD_Drop and VOUT are
at their maximum tolerance limit, N will be higher. Taking VBATT
= 5.5 V, VD_Drop = 2 V, and VOUT = 320 V × 102 % = 326.4 V as
the worst case condition, N can be determined to be 9.5.
In practice, always choose a turns ratio that is higher than the
calculated value to give some safety margin. In the worst case
example, a minimum turns ratio of N = 10 is recommended.
Primary Inductance. The A8438 has a minimum switch off-time,
tOFF(min) , of 300 ns, to ensure correct SW node voltage sensing.
As a loose guideline when choosing the primary inductance,
Two Alkaline/NiMH/NiCAD or one Li +
VBATT 1.5 to 5.5 V
D1
T1
R5
100 kΩ
+
VBIAS 3.0 to 5.5 V
C1
0.1 μF
R4
C2
4.7 μF
10 kΩ
R1
150 kΩ
LPrimary ≥
VIN
former design should minimize the leakage inductance to ensure
the turn-off voltage spike at the SW node does not exceed the
40 V limit. An achievable minimum leakage inductance for this
application, however, is usually compromised by an increase in
parasitic capacitance. Furthermore, the transformer secondary
capacitance should be minimized. Any secondary capacitance is
multiplied by N2 when reflected to the primary, leading to high
initial current swings when the switch turns on, and to reduced
efficiency.
VOUT
COUT
R3
A8436
1.2 kΩ
DONE
TRIGGER
IGBTDRV
GND
Symbol
0.1 μF, X5R or X7R, 10 V
C2
4.7 μF, X5R or X7R, 10 V
D1
Fairchild Semiconductor BAV23S
(dual diode connected in series)
T1
TDK LDT565630T-041,
LPrimary = 4.7 μH, N = 10.2
R1, R2
R3
To IGBT Gate
Rating
C1
303 V
FB
CHARGE
(3)
Leakage Inductance and Secondary Capacitance. The trans-
150 kΩ
SW
.
Ideally, the charging time is not affected by transformer primary
inductance. In practice, however, it is recommended that a
primary inductance be chosen between 10 μH and 20 μH. When
LPrimary is less than 10 μH, parasitic elements associated with
flyback from the transformer lead to lower efficiency and longer
charging time. When LPrimary is greater than 20 μH, the rating
of the transformer must be dramatically increased to handle the
required power density, and the series resistances are usually
higher. A design that is optimized to achieve a small footprint
solution would have an LPrimary of 12 to 14 μH, with minimized
leakage inductance and secondary capacitance, and minimized
primary and secondary series resistance. Please refer to the table
Recommended Components for more information.
R2
ILIM
300 × 10−9 × VOUT
N × ISWLIM
R4, R5
1206 Resistor, 1 %
0603 Resistor, 1 %
Pull-up resistors
Figure 6. Typical circuit for photoflash application. Configured for ISWLIM of 2.0 A.
11
A8438-DS, Rev. 1
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A8438
Photoflash Capacitor Charger with IGBT Driver
Adjusting Output Voltage
The A8438 senses output voltage during switch off-time. This
allows the voltage divider network, R1 through R3 (see figure
6), to be connected at the anode of the high voltage output diode,
D1, eliminating power loss due to the feedback network when
charging is complete. The output voltage can be adjusted by
selecting proper values of the voltage divider resistors. Use the
following equation to calculate values for Rx (Ω):
R1 + R2 VOUT
=
−1 .
R3
VFB
(4)
internal MOSFET switch is closed, and the primary-side current
starts to ramp-up. It can be calculated as:
(5)
VD_ Peak = VOUT + N × VBATT .
The peak current of the rectifying diode, ID_Peak, is calculated
as :
(6)
ID_ Peak = IPrimary_Peak / N .
Input Capacitor Selection
R1 and R2 together need to have a breakdown voltage of at
least 300 V. A typical 1206 surface mount resistor has a 150 V
breakdown voltage rating. It is recommended that R1 and R2
have similar values to ensure an even voltage stress between
them. Recommended values are:
R1 = R2 = 150 kΩ (1206)
R3 = 1.2 kΩ (0603)
which together yield a stop voltage of 303 V.
Using higher resistance ratings for R1, R2, and R3 does not
offer significant efficiency improvement, because the power loss
of the feedback network occurs mainly during switch off-time,
and because the off-time is only a small fraction of each charging
cycle.
Ceramic capacitors with X5R or X7R dielectrics are recommended for the input capacitor, C2. It should be rated at least
4.7 μF / 6.3 V to decouple the battery input, VBATT , at the primary
of the transformer. When using a separate bias, VBIAS , for the
A8438 VIN supply, connect at least a 0.1 μF / 6.3 V bypass
capacitor to the VIN pin.
Output Diode Selection
Output voltage sensing circuit elements must be kept away from
switching nodes such as SW pin. It is important that the ¯D¯¯O¯¯N¯
¯E
¯ signal trace be routed away from the transformer and other
switching traces, in order to minimize noise pickup. In addition,
high voltage isolation rules must be followed carefully to avoid
breakdown failure of the circuit board.
Choose the rectifying diode(s), D1, to have small parasitic
capacitance (short reverse recovery time) while satisfying the
reverse voltage and forward current requirements.
The peak reverse voltage of the diode, VD_Peak , occurs when the
Layout Guidelines
Key to a good layout for the photoflash capacitor charger circuit
is to keep the parasitics minimized on the power switch loop
(transformer primary side) and the rectifier loop (secondary side).
Use short, thick traces for connections to the transformer primary
and SW pin.
Recommended Components Table
Component
Rating
C1 Input Capacitor 0.1 μF, ± 10%, 16 V X7R ceramic capacitor (0603)
C2 Input Capacitor 4.7 μF, ± 10%, 10 V, X5R ceramic capacitor (0805)
COUT Photoflash
20 to 180 μF, 330 V
Capacitor
D1
Output Diode
R1, R2,
FB Resistors
R3
FB Resistors
T1
Transformer
Part Number
GRM188R71C104KA01D
LMK212BJ475KG
Source
Murata
Taiyo Yuden
Chemi-Con
2 x 250 V, 225 mA, 5 pF
BAV23S
2 x 300 V, 225 mA, 5 pF
GSD2004S
Philips Semiconductor,
Fairchild Semiconductor
Vishay
150 kΩ, 1/4 W ± 1% (1206)
9C12063A1503FKHFT
Yageo
1.20 kΩ 1/10 W ± 1% (0603)
9T06031A1201FBHFT
Yageo
1:10, LPrimary = 10.8 μH, for ILIM = 1.6 or 1.8 A
1:10.4, LPrimary = 4.7 μH, for ILIM = 2.0 A
1:10.2, LPrimary = 12 μH, for ILIM = 1.6 A
ST-532517A
LDT565630T-041
T-16-024A
Asatech
TDK
Tokyo Coil Engineering
12
A8438-DS, Rev. 1
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A8438
Photoflash Capacitor Charger with IGBT Driver
Use the following complete part number when ordering:
Part Number
Packaging
A8438EEJTR-T
7-in. reel, 1500 pieces/reel
Package EJ, 10-Contact MLP/TDFN
3.15 .124
2.85 .112
A
B
Preliminary dimensions, for reference only
(reference JEDEC MO-229 WEED)
Dimensions in millimeters
U.S. Customary dimensions (in.) in brackets, for reference only
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
10
3.15 .124
2.85 .112
A Terminal #1 mark area
A
B Exposed thermal pad (reference dimensions only,
terminal #1 identifier appearance at supplier discretion)
1
2
10X
SEATING
PLANE
0.08 [.003] C
10X
0.30 .012
0.18 .007
C
0.80 .031
0.70 .028
0.10 [.004] M C A B
0.05 [.002] M C
0.20 .008
REF
0.50 .020
1
0.05 .002
0.00 .000
2
0.225 x 0.225 .009 x .009
REF
0.50 .020
0.30 .012
B
10
1.64 .065
NOM
2.38 .094
NOM
The products described here are manufactured under one or more U.S. patents or U.S. patents pending.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detailed
specifications as may be required to permit improvements in the performance, reliability, or manufacturability
of its products. Before placing an order, the user is cautioned to verify that the information being relied upon
is current.
Allegro products are not authorized for use as critical components in life-support devices or systems without
express written approval.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc.
assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which
may result from its use.
Copyright©2005 AllegroMicrosystems, Inc.
13
A8438-DS, Rev. 1
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com