SCDS178B − NOVEMBER 2004 − REVISED APRIL 2005 D D D D D D D D D D D D DGG OR DGV PACKAGE (TOP VIEW) Wide Bandwidth (BW = 900 MHz Typ) Low Crosstalk (XTALK = −41 dB Typ) Low Bit-to-Bit Skew [tsk(o) = 0.2 ns Max] Low and Flat ON-State Resistance (ron = 4 Typ, ron(flat) = 0.7 Typ) Low Input/Output Capacitance (CON = 10 pF Typ) Rail-to-Rail Switching on Data I/O Ports (0 to 5 V) VDD Operating Range From 3 V to 3.6 V Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Performance Tested Per JESD 22 − 2000-V Human-Body Model (A114-B, Class II) − 1000-V Charged-Device Model (C101) Suitable for 10/100/1000-Mbit Ethernet Signaling Applications − 10/100/1000 Base-T Signal Switching − Differential (LVDS, LVPECL) Signal Switching − Digital Video Signal Routing − Notebook Docking Signal Routing − Hub and Router Signal Switching VDD A0 GND A1 GND VDD GND A2 GND A3 GND VDD GND NC A4 GND A5 GND VDD GND A6 GND A7 SEL 1 48 2 47 3 46 4 45 5 44 6 43 7 42 8 41 9 40 10 39 11 38 12 37 13 36 14 35 15 34 16 33 17 32 18 31 19 30 20 29 21 28 22 27 23 26 24 25 0B1 1B1 GND 0B2 1B2 GND 2B1 3B1 GND 2B2 3B2 GND VDD 4B1 5B1 GND 4B2 5B2 GND 6B1 7B1 GND 6B2 7B2 NC − No internal connection description/ordering information The TS3L301 is a 16-bit to 8-bit multiplexer/demultiplexer LAN switch with a single select (SEL) input. The SEL input controls the data path of the multiplexer/demultiplexer. The device provides a low and flat on-state resistance (ron) and an excellent on-resistance match. Low input/output capacitance, high-bandwidth, low skew, and low crosstalk among channels make this device suitable for various LAN applications, such as 10/100/1000 Base-T. ORDERING INFORMATION −40°C to 85°C ORDERABLE PART NUMBER PACKAGE† TA TOP-SIDE MARKING TSSOP − DGG Tape and reel TS3L301DGGR TS3L301 TVSOP − DGV Tape and reel TS3L301DGVR TK301 † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2005, Texas Instruments Incorporated ! " #$%! " &$'(#! )!%* )$#!" # ! "&%##!" &% !+% !%" %," "!$%!" "!)) -!.* )$#! &#%""/ )%" ! %#%""(. #($)% !%"!/ (( &%!%"* POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SCDS178B − NOVEMBER 2004 − REVISED APRIL 2005 FUNCTION TABLE INPUT SEL INPUT/OUTPUT An FUNCTION nB1 nB2 An = nB1 An = nB2 L H PIN DESCRIPTIONS DESCRIPTION PIN NAME An nBm Data I/Os SEL Select input Data I/Os logic diagram (positive logic) 2 48 4 47 0B1 A0 1B1 A1 45 0B2 44 1B2 8 42 10 41 2B1 A2 3B1 A3 39 2B2 38 3B2 15 35 17 34 4B1 A4 5B1 A5 32 4B2 31 5B2 21 29 23 28 6B1 A6 7B1 A7 26 6B2 25 7B2 SEL 2 24 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SCDS178B − NOVEMBER 2004 − REVISED APRIL 2005 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V Control input voltage range, VIN (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Switch I/O voltage range, VI/O (see Notes 1, 2, and 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Control input clamp current, IIK (VIN < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA I/O port clamp current, II/OK (VI/O < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA ON-state switch current, II/O (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±128 mA Continuous current through VDD or GND terminals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA Package thermal impedance, θJA (see Note 5): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltages are with respect to ground, unless otherwise specified. 2. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 3. VI and VO are used to denote specific conditions for VI/O. 4. II and IO are used to denote specific conditions for II/O. 5. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 6) MIN MAX VDD VIH Supply voltage 3 3.6 UNIT V High-level control input voltage (SEL) 2 5.5 V VIL VI/O Low-level control input voltage (SEL) 0 0.8 V Input/output voltage 0 5.5 V TA Operating free-air temperature −40 85 °C NOTE 6: All unused control inputs of the device must be held at VDD or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SCDS178B − NOVEMBER 2004 − REVISED APRIL 2005 electrical characteristics for 1000 Base-T ethernet switching over recommended operating free-air temperature range, VDD = 3.3 V + 0.3 V (unless otherwise noted) PARAMETER VIK IIH SEL IIL Ioff SEL SEL TEST CONDITIONS VDD = 3.6 V, VDD = 3.6 V, IIN = −18 mA VIN = VDD VDD = 3.6 V, VDD = 0, VIN = GND VO = 0 to 3.6 V , MIN VI = 0 Switch ON or OFF TYP† MAX UNIT −0.7 −1.2 V ±1 µA ±1 µA 1 µA 250 600 µA 2.5 3 pF ICC CIN SEL VDD = 3.6 V, f = 1 MHz, II/O = 0, VIN = 0 COFF B port VI = 0, f = 1 MHz, Outputs open, Switch OFF 3.5 4 pF CON VI = 0, f = 1 MHz, Outputs open, Switch ON 10 10.9 pF ron VDD = 3 V 1.5 V ≤ VI ≤ VDD, IO = −40 mA 4 8 Ω ron(flat)‡ VDD = 3 V VI = 1.5 V and VDD, IO = −40 mA 0.7 ∆ron§ VDD = 3 V, 1.5 V ≤ VI ≤ VDD, IO = −40 mA 0.2 Ω 1.2 Ω VI, VO, II, and IO refer to I/O pins. VIN refers to the control inputs. † All typical values are at VDD = 3.3 V (unless otherwise noted), TA = 25°C. ‡ ron(flat) is the difference of ron in a given channel at specified voltages. § ∆ron is the difference of ron from center (A4, A5) ports to any other port. electrical characteristics for 10/100 Base-T ethernet switching over recommended operating free-air temperature range, VDD = 3.3 V + 0.3 V (unless otherwise noted) PARAMETER VIK IIH SEL IIL Ioff SEL SEL TEST CONDITIONS VDD = 3.6 V, VDD = 3.6 V, IIN = −18 mA VIN = VDD VDD = 3.6 V, VDD = 0, VIN = GND VO = 0 to 3.6 V, II/O = 0, VIN = 0 TYP† MAX UNIT −0.7 −1.2 V ±1 µA ±1 µA 1 µA 250 600 µA 2.5 3 pF Switch OFF 3.5 4 pF f = 1 MHz, Outputs open, Switch ON 10 10.9 pF VDD = 3 V 1.25 V ≤ VI ≤ VDD, IO = −10 mA to −30 mA 4 8 Ω VDD = 3 V VI = 1.25 V and VDD, IO = −10 mA to −30 mA 0.7 VDD = 3 V, 1.25 V ≤ VI ≤ VDD, IO = −10 mA to −30 mA 0.2 ICC CIN SEL VDD = 3.6 V, f = 1 MHz, COFF B port VI = 0, f = 1 MHz, Outputs open, CON VI = 0, ron ron(flat)‡ ∆ron§ VI = 0 Switch ON or OFF VI, VO, II, and IO refer to I/O pins. VIN refers to the control inputs. † All typical values are at VDD = 3.3 V (unless otherwise noted), TA = 25°C. ‡ ron(flat) is the difference of ron in a given channel at specified voltages. § ∆ron is the difference of ron from center (A4, A5) ports to any other port. 4 MIN POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Ω 1.2 Ω SCDS178B − NOVEMBER 2004 − REVISED APRIL 2005 switching characteristics over recommended operating free-air temperature range, VDD = 3.3 V + 0.3 V, RL = 200 Ω, CL = 10 pF (unless otherwise noted) (see Figures 4 and 5) FROM (INPUT) TO (OUTPUT) A or B B or A tPZH, tPZL SEL A or B 1.5 11.5 ns tPHZ, tPLZ tsk(o)§ SEL A or B 1 8.5 ns A or B B or A 0.1 0.2 ns 0.1 0.2 ns PARAMETER tpd‡ MIN TYP† MAX 0.25 tsk(p)¶ UNIT ns † All typical values are at VDD = 3.3 V (unless otherwise noted), TA = 25°C. ‡ The propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified load capacitance when driven by an ideal voltage source (zero output impedance). § Output skew between center port (A4 to A5) to any other port ¶ Skew between opposite transitions of the same output in a given device |tPHL − tPLH| dynamic characteristics over recommended VDD = 3.3 V + 0.3 V (unless otherwise noted) PARAMETER operating free-air temperature TYP† TEST CONDITIONS range, UNIT XTALK OIRR RL = 100 Ω, f = 250 MHz, See Figure 7 −41 RL = 100 Ω, f = 250 MHz, See Figure 8 −39 dB BW RL = 100 Ω, See Figure 6 900 MHz dB † All typical values are at VDD = 3.3 V (unless otherwise noted), TA = 25°C. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SCDS178B − NOVEMBER 2004 − REVISED APRIL 2005 OPERATING CHARACTERISTICS 0 −1 −2 Gain − dB −3 −4 −5 −6 −7 −8 −9 1 10 100 1,000 10,000 Frequency − MHz Gain at 900 MHz, −3 dB Figure 1. Gain vs Frequency 0 −20 Off-Isolation − dB −40 −60 −80 −100 −120 1 10 100 Frequency − MHz Off-Isolation at 250 MHz, −39 dB Figure 2. Off-Isolation vs Frequency 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1,000 10,000 SCDS178B − NOVEMBER 2004 − REVISED APRIL 2005 OPERATING CHARACTERISTICS (continued) 0 −20 Crosstalk − dB −40 −60 −80 −100 −120 1 10 100 1,000 10,000 Frequency − MHz Crosstalk at 250 MHz, −41 dB Figure 3. Crosstalk vs Frequency POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 SCDS178B − NOVEMBER 2004 − REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION FOR ENABLE AND DISABLE TIMES VDD Input Generator VIN 50 Ω 50 Ω VG1 TEST CIRCUIT DUT Input Generator S1 RL VO VI 2 × VDD Open GND 50 Ω 50 Ω VG2 CL (see Note A) RL TEST VDD S1 RL VI CL V∆ tPLZ/tPZL 3.3 V ± 0.3 V 2 × VDD 200 Ω GND 10 pF 0.3 V tPHZ/tPZH 3.3 V ± 0.3 V GND 200 Ω VDD 10 pF 0.3 V Output Control (VIN) 2.5 V 1.25 V Output Waveform 1 S1 at 2 y VDD tPZL (see Note B) 0V tPLZ VOH VDD/2 tPZH Output Waveform 2 S1 at GND (see Note B) 1.25 V VOL +0.3 V VOL tPHZ VDD/2 VOH −0.3 V VOH VOL VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. Figure 4. Test Circuit and Voltage Waveforms 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SCDS178B − NOVEMBER 2004 − REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION FOR SKEW VDD Input Generator VIN 50 Ω 50 Ω VG1 TEST CIRCUIT DUT Input Generator 2 × VDD S1 RL VO VI Open GND 50 Ω 50 Ω VG2 CL (see Note A) RL TEST VDD S1 RL VI CL tsk(o) 3.3 V ± 0.3 V Open 200 Ω VDD or GND 10 pF tsk(p) 3.3 V ± 0.3 V Open 200 Ω VDD or GND 10 pF V∆ 3.5 V 2.5 V 1.5 V Data In at Ax or Ay tPHLx tPLHx 3.5 V VOH 0.5 V (VOH − VOL) Input VOL Data Out at XB1 or XB2 tsk(o) 2.5 V 1.5 V tPLH tsk(o) VOH 0.5 V (VOH − VOL) VOL Data Out at YB1 or YB2 tPLHy tPHL VOH 0.5 V (VOH − VOL) VOL Output tsk(p) = tPLH − tPLH tPHLy tsk(o) = tPLHy − tPLHx or tPHLy − TPHLx VOLTAGE WAVEFORMS OUTPUT SKEW (tsk(o)) VOLTAGE WAVEFORMS PULSE SKEW (tsk(p)) NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. Figure 5. Test Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 SCDS178B − NOVEMBER 2004 − REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION EXT TRIGGER BIAS Network Analyzer (HP8753ES) VBIAS P1 P2 VDD A0 SEL 0B1 DUT CL = 10 pF (see Note A) VSEL NOTE A: CL includes probe and jig capacitance. Figure 6. Test Circuit for Frequency Response (BW) Frequency response is measured at the output of the ON channel. For example, when VSEL = 0 and A0 is the input, the output is measured at 0B1. All unused analog I/O ports are left open. HP8753ES setup Average = 4 RBW = 3 kHz VBIAS = 0.35 V ST = 2 s P1 = 0 dBM 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SCDS178B − NOVEMBER 2004 − REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION EXT TRIGGER BIAS VBIAS Network Analyzer (HP8753ES) P1 P2 VDD 0B1 A0 RL = 100 Ω A1 1B1 0B2 DUT A2 1B2 2B1 RL = 100 Ω A3 3B1 2B2 3B2 SEL VSEL NOTES: A. CL includes probe and jig capacitance. B. A 50-Ω termination resistor is needed to match the loading of the network analyzer. Figure 7. Test Circuit for Crosstalk (XTALK) Crosstalk is measured at the output of the nonadjacent ON channel. For example, when VSEL = 0 and A1 is the input, the output is measured at A3. All unused analog input (A) ports are connected to GND, and output (B) ports are left open. HP8753ES setup Average = 4 RBW = 3 kHz VBIAS = 0.35 V ST = 2 s P1 = 0 dBM POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 SCDS178B − NOVEMBER 2004 − REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION EXT TRIGGER BIAS VBIAS Network Analyzer (HP8753ES) P1 P2 VDD A0 0B1 RL = 100 Ω A1 1B1 DUT 0B2 1B2 SEL VSEL NOTES: A. CL includes probe and jig capacitance. B. A 50-Ω termination resistor is needed to match the loading of the network analyzer. Figure 8. Test Circuit for Off Isolation (OIRR) OFF isolation is measured at the output of the OFF channel. For example, when VSEL = GND and A1 is the input, the output is measured at 1B2. All unused analog input (A) ports are connected to ground, and output (B) ports are left open. HP8753ES setup Average = 4 RBW = 3 kHz VBIAS = 0.35 V ST = 2 s P1 = 0 dBM 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 13-Apr-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TS3L301DGGR ACTIVE TSSOP DGG 48 2000 Pb-Free (RoHS) CU NIPDAU Level-1-250C-UNLIM TS3L301DGVR ACTIVE TVSOP DGV 48 2000 Pb-Free (RoHS) CU NIPDAU Level-1-250C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°–8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. Falls within JEDEC: 24/48 Pins – MO-153 14/16/20/56 Pins – MO-194 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0,27 0,17 0,50 48 0,08 M 25 6,20 6,00 8,30 7,90 0,15 NOM Gage Plane 1 0,25 24 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 48 56 64 A MAX 12,60 14,10 17,10 A MIN 12,40 13,90 16,90 DIM 4040078 / F 12/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold protrusion not to exceed 0,15. Falls within JEDEC MO-153 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Amplifiers amplifier.ti.com Audio www.ti.com/audio Data Converters dataconverter.ti.com Automotive www.ti.com/automotive DSP dsp.ti.com Broadband www.ti.com/broadband Interface interface.ti.com Digital Control www.ti.com/digitalcontrol Logic logic.ti.com Military www.ti.com/military Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork Microcontrollers microcontroller.ti.com Security www.ti.com/security Telephony www.ti.com/telephony Video & Imaging www.ti.com/video Wireless www.ti.com/wireless Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright 2005, Texas Instruments Incorporated