® OPA654 Wide Bandwidth, High Output Current Difet ® OPERATIONAL AMPLIFIER FEATURES ● ● ● ● ● APPLICATIONS HIGH SLEW RATE: 750V/µs HIGH OUTPUT CURRENT: 200mA WIDE GAIN-BANDWIDTH: 700MHz FAST SETTLING: 150ns to 0.1% FET INPUT: IB = 50pA max ● LINE DRIVERS ● PIN DRIVERS ● HIGH-SPEED DATA ACQUISITION ● WAVEFORM GENERATORS DESCRIPTION The OPA654 is a high-speed monolithic operational amplifier featuring 200mA output current. Fabricated using Burr-Brown’s Complementary-Bipolar, Difet process, it provides an excellent combination of high speed and high output current. The OPA654 is versatile, operating from power supplies ranging from ±5V to ±18V. It can deliver up to ±10V signals into a 50Ω load at slew rates of 750V/µs. Its speed and output current make it useful for line driver and automatic test applications. VOS Trim The OPA654 is externally compensated, allowing openloop gain and phase characteristics to be optimized for the desired closed-loop gain, load and dynamic characteristics. The OPA654 is available in an 8-pin metal TO-3 package that provides excellent thermal characteristics and is specified for the industrial temperature range. VOS Trim V+ +In –In Thermal Limit V– 2Ω Output 2Ω Phase Compensation Difet ®, Burr-Brown Corp. International Airport Industrial Park • Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706 Tel: (520) 746-1111 • Twx: 910-952-1111 • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 © 1990 Burr-Brown Corporation PDS-1098B Printed in U.S.A. October, 1993 SPECIFICATIONS ELECTRICAL TA = +25°C, VS = ±15V unless otherwise noted. OPA654AM PARAMETER CONDITION FREQUENCY RESPONSE Gain-Bandwidth Product (2) Slew Rate (2,3) Settling Time (2) 0.01% 0.1% 1% OFFSET VOLTAGE Input Offset Voltage Average Drift Power Supply Rejection INPUT BIAS CURRENT(1) Input Bias Current Input Offset Current NOISE Input Voltage Noise Noise Density, Voltage Noise, Input Bias Current Noise Current Noise Density, f = 0.1Hz to 20kHz INPUT VOLTAGE RANGE Common-Mode Input Range Common-Mode Rejection MIN OUTPUT Voltage Output Current Output Short Circuit Current Output Resistance, Open-Loop MAX UNITS G = –1, 20V Step G = –1, 10V Step G = –1, 10V Step G = –1, 10V Step See Typical Curve 750 240 150 85 ±3 VS = ±5 to ±15V ±0.1 ±40 82 mV µV/°C dB VCM = 0V VCM = 0V 3 2 50 25 pA pA f = 10Hz f = 100Hz f = 1kHz f = 10kHz fB = 10Hz to 1MHz 115 37 19 14 85 nV/√Hz nV/√Hz nV/√Hz nV/√Hz µVp-p 1 fA/√Hz ±13 76 V dB 1012 || 2.5 1012 || 3.2 Ω || pF Ω || pF 94 82 dB dB ±12.3 200 325 800 V mA mA Ω 72 ±12 70 VCM = ±10V INPUT IMPEDANCE Differential Common-Mode OPEN-LOOP GAIN Open-Loop Voltage Gain TYP VO = ±10V, RL = 1kΩ VO = ±10V, RL = 50Ω 80 ±11 RL = 50Ω VO = ±10V DC POWER SUPPLY Specified Operating Voltage Operating Voltage Range Quiescent Current ±5 TEMPERATURE RANGE Specification Operating Storage Thermal Resistance, θJC θJA ±15 ±38 –25 –55 –55 V/µs ns ns ns ±18 ±43 +85 +125 +150 15 45 V V mA °C °C °C °C/W °C/W NOTES: (1) High-speed test at TJ = 25°C. (2) Varies with external phase compensation, C1. See typical curves for performance with other gains and C1. (3) Slew rate is rate of change from 10% to 90% of output voltage step. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® OPA654 2 PIN CONFIGURATION "M" TO-3 Metal Package PIN LIST 1. VO 2. V+ 3. Compensation 4. VOS Trim 5. –In 6. +In 7. V– 8. VOS Trim BOTTOM VIEW V+ VOS Trim 2 1 –In 3 5 2 4 4 5 8 7 +In 6 6 8 OPA654 1 VO 3 7 C1 Case is connected to IC substrate. Connect case to ground—see text. V– ABSOLUTE MAXIMUM RATINGS PACKAGE INFORMATION(1) Power Supply Voltage ........................................................................ ±18V Input Voltage ................................................................................. ±Vs ±1V Output Short Circuit (to ground) ........................................................... 10s Operating Temperature ................................................... –55°C to +125°C Storage Temperature ...................................................... –55°C to +150°C Junction Temperature .................................................................... +165°C Lead Temperature (soldering, 10s) ................................................ +300°C MODEL OPA654AM PACKAGE PACKAGE DRAWING NUMBER 8-Pin Metal TO-3 030 NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix D of Burr-Brown IC Data Book. ORDERING INFORMATION MODEL OPA654AM PACKAGE TEMPERATURE RANGE 8-Pin Metal TO-3 –25°C to +85°C ® 3 OPA654 TYPICAL PERFORMANCE CURVES TA = +25°C, VS = ±15V unless otherwise noted. 40 20 0 120 C1 = 0.5pF,C 2 = 0pF C1 = 0pF OPA654AM Open-Loop Voltage Gain (dB) Voltage Gain (dB) 60 OPEN-LOOP GAIN vs FREQUENCY CLOSED-LOOP GAIN vs FREQUENCY 80 G = 1000 C 1 = 1pF,C 2 = 0pF G = 100 C 1 = 3pF,C2 = 0pF G = 10 C 1 = 18pF,C2 = 30pF G=1 –20 100k C 1 = 0.5pF 80 C1 = 3pF C 1 = 1pF 60 C1 = 18pF,C 2 = 30pF 40 20 0 1M 10M 100M 100 1k 10k Frequency (Hz) 100k 1M 10M 100M Frequency (Hz) OPEN-LOOP PHASE vs FREQUENCY SLEW RATE vs COMPENSATION CAPACITOR 45 1000 OPA654AM R L = 100Ω 900 0 800 –45 Slew Rate (V/µs) Phase (degrees) OPA654AM 100 C1 = 0.5pF C1 = 1pF C1 = 3pF C1 = 0 –90 C1 = 18pF,C 2 = 30pF –135 700 600 500 400 300 200 –180 100 0 –225 100 1k 10k 100k 1M 10M 100M 0 Frequency (Hz) 5 10 15 OPEN-LOOP OUTPUT RESISTANCE vs FREQUENCY 25 30 SETTLING TIME vs CLOSED-LOOP GAIN 2000 1000 R L = 100Ω 1800 1600 800 Settling Time (ns) Output Resistance ( Ω) 20 C 1 Capacitance (pF) C1 = 0pF 600 400 C1 = 3pF 200 1400 0.05% 1200 1000 800 600 400 1% 200 0 0 100 1k 10k 100k 1M 10M 1 100M ® OPA654 10 100 Gain (V/V) Frequency (Hz) 4 1000 TYPICAL PERFORMANCE CURVES (CONT) TA = +25°C, VS = ±15V unless otherwise noted. OUTPUT VOLTAGE vs OUTPUT CURRENT OUTPUT VOLTAGE vs FREQUENCY Output Voltage (Vp-p) 25 40 VS = ±18V RL = 100 Ω VS = ±15V Output Voltage (Vp-p) 30 20 VS = ±12V 15 C1 = 0pF C1 = 20pF C1 = 5pF 10 5 C1 = 10pF V S = ±5V 35 VS = ±18V 30 VS = ±15V 25 VS = ±12V 20 15 VS = ±5V 10 5 0 0 100k 1M 10M 100M 0 50 Frequency (Hz) 200 250 300 350 400 INPUT BIAS CURRENT vs TEMPERATURE INPUT BIAS CURRENT 1000 Normalized Input Bias Current Normalized Input Bias Current 150 Output Current (mA) 1000 100 10 1 0.1 0.01 0.001 100 10 IB 1 IOS Relative to I B 0.1 0.01 0.001 –15 –10 –5 0 +5 Input Voltage (V) +10 –55 +15 +5 +35 +65 +95 +125 QUIESCENT CURRENT vs POWER SUPPLY VOLTAGE INPUT VOLTAGE NOISE SPECTRAL DENSITY 50 45 Quiescent Current (mA) 10,000 1,000 100 10 40 TA = –25°C 35 TA = +85°C 30 TA = +25°C 25 1 0.1 0.01 –25 Temperature (°C) 100,000 Input Noise Voltage (nV/ Hz) 100 20 0.1 1 10 100 1k ±5 10k 100k 1M 10M 100M ±10 ±15 ±20 Supply Voltage (±V) Frequency (Hz) ® 5 OPA654 TYPICAL PERFORMANCE CURVES (CONT) TA = +25°C, VS = ±15V unless otherwise noted. MAXIMUM POWER DISSIPATION vs TEMPERATURE 7 400 6 Internal Dissipation (W) ± Current Limit (mA) OUTPUT CURRENT LIMIT vs TEMPERATURE 450 350 300 250 OPA654AM Metal TO-3 For case Temp θJC =15°C/W 5 4 3 2 200 For ambient Temp θ JA = 45°C/W 1 150 0 –55 –25 +5 +35 +65 +95 +125 0 25 50 Temperature (°C) 75 100 125 CIRCUIT LAYOUT With any wide-bandwidth circuitry, careful circuit layout will ensure best performance. Make short, direct circuit interconnections and avoid stray wiring capacitance—especially at the inverting input pin. A component-side ground plane will help ensure low ground impedance. Do not place the ground plane under or near the inputs and feedback network. these sensitive nodes, making the type and location of the potentiometer less critical. This also reduces the trim range, providing more adjustment resolution. Do not use an offset voltage adjustment to correct for offsets produced in other circuitry since this can introduce large offset voltage drift. COMPENSATION The OPA654 uses external compensation capacitors. This tailors the open-loop response characteristics to the application. Its effect can be seen in the open-loop gain and phase curves. Power supplies should be bypassed with good high-frequency capacitors positioned close to the op amp pins. In most cases, a 2.2µF solid tantalum capacitor for each power supply is adequate. The OPA654 can deliver load currents up to 200mA. Even if steady-state load currents are lower, signal transients may demand large current transients from the power supplies. It is the power supply bypass capacitors which must supply these current transients. Larger bypass capacitors such as 10µF solid tantalum capacitors may improve dynamic performance in these applications. V+ V+ 50k Ω to 100kΩ 10k Ω to 100kΩ 2.2kΩ CASE CONNECTION The case of the TO-3 metal package should be connected to ground. Failure to connect the case to ground will not damage the device but will degrade its AC performance. The case is internally connected to the substrate of the dielectrically isolated IC. This substrate is DC-neutral—it is not connected to the V– power supply as it would be with most analog ICs. In principle, it could be connected to any AC ground potential such as one of the power supplies, but DC ground is usually most convenient. Do not connect the case to DC potentials which exceed the power supply voltages, ±VS. 4 5 2.2kΩ 4 5 8 1 6 Trim Range ~ ~ ±100mV (a) 8 1 6 Trim Range ~ ±20mV (b) FIGURE 1. Optional Offset Voltage Trim Circuits. Figures 2 shows typical capacitor values for various closedloop gains. This chart should be considered a starting point for optimizing an application. Many variables including circuit layout, source and load characteristics, and desired dynamic behavior will affect the optimum capacitor values. Capacitive loads change op amp behavior and higher compensation capacitor values are generally required. Resistor RS, shown in Figure 3, can improve the ability to drive a capacitive load. Typical values for RS range from 5Ω to 50Ω, depending on the load and how much voltage drop can be tolerated. OFFSET ADJUSTMENT Many applications require no external offset voltage adjustment. Figure 1a shows connection of an optional offset voltage trimming potentiometer. Use a small, non-inductive potentiometer with short connections to the trim pins. Avoid stray capacitance from the input or output nodes. The added resistors in Figure 1b help decouple the potentiometer from ® OPA654 150 Temperature (°C) 6 R1 R2 R2 R1 5 6 OPA654 1 Comp 50 Ω Termination 50 Ω Termination RL 100Ω 3 C2 5 VOUT 6 1 OPA654 Comp 3 C1 C2 VOUT RL 100Ω C1 CLOSED-LOOP GAIN C1 C2 R1 R2 CLOSED-LOOP GAIN C1 C2 R1 R2 +1000 +100 +10 +1 0.5pF 1pF 3pF 18pF 0 0 0 30pF 10Ω 100Ω 100Ω — 10kΩ 10kΩ 900Ω 0 –1000 –100 –10 –1 0.5pF 1pF 3pF 18pF 0 0 0 20pF 10Ω 100Ω 100Ω 1kΩ 10kΩ 10kΩ 1kΩ 1kΩ G = –10 SMALL-SIGNAL RESPONSE, RL =100Ω G = +10 SMALL-SIGNAL RESPONSE, RL =100Ω +200 VOUT (mV) VOUT (mV) +200 0 FPO –200 0 FPO –200 G = +10 LARGE-SIGNAL RESPONSE, RL =100Ω G = –10 LARGE-SIGNAL RESPONSE, RL =100Ω +10 VOUT (V) VOUT (V) +10 0 0 FPO FPO –10 –10 FIGURE 2. Basic Amplifier Circuits. ® 7 OPA654 Figure 3 also demonstrates a compensation technique using an additional network, R3-C3. This allows use of a smaller value for C1, producing a corresponding increase in slew rate. It reduces the high frequency loop gain by placing the op amp in a higher noise gain at high frequency. This technique improves large-signal response at the sacrifice of small-signal behavior. Settling time is increased and high frequency noise performance will be somewhat degraded. 1000pF 470Ω 470Ω 5 6 OPA654 1 Comp 50 Ω R TERM G = +1 10Ω VOUT RL 100Ω 3 C1 7pF 2pF R2 2k Ω R3 680Ω C3 1000pF 5 6 G = +1 LARGE-SIGNAL RESPONSE, RL =100Ω 2k Ω OPA654 3 1 RS G = –1 VOUT +10 RL 100Ω Comp VOUT (V) R1 VI C1 3pF RS = 5Ω to 50Ω (see text) 0 –10 FPO FIGURE 3. High Slew Rate Compensation Circuit. Figure 4 shows an alternative compensation network for unity gain. This technique provides a small amount of positive feedback, reducing the net negative feedback factor. Large signal response and load driving capability is improved with this approach. The compensation for a given application can be evaluated by observing amplifier pulse response. Both small-signal and large-signal response should be checked to assure that both are acceptable. Large overshoot or many cycles of ringing in the small-signal response is a sign of instability and the circuit may require further optimization. Good practice dictates a somewhat conservative approach to allow for device-to-device variation. FIGURE 4. G = +1 Amplifier with Alternative Compensation. The OPA654 may be operated at reduced power supply voltage, thus reducing internal power dissipation. This can eliminate the need for heat sinking in some applications. OUTPUT CURRENT LIMIT Output current is limited by internal circuitry to approximately 325mA at 25°C. The limit current decreases with increasing junction temperature as shown in the typical curves. The combination of current limit and thermal limit protects the device from short circuits to ground. POWER DISSIPATION Many applications do not require an external heat sink. However, with high ambient temperature or heavy load conditions, a heat sink may be required. The heat sink should be electrically connected to ground—see “Connections to Case”. Operate within the power derating curve (Maximum Power Dissipation vs Temperature) shown in the typical performance curve section. Exceeding the maximum die temperature of 165°C may activate the internal thermal limit circuitry, disabling the output stage. This thermal limit is set for a junction temperature of approximately 185°C. INPUT BIAS CURRENT The OPA654 is fabricated with Burr-Brown’s dielectrically isolated Difet process, giving it very low input bias current. Like other FET amplifiers, input bias current doubles for every 10°C increase in junction temperature. This increase can be minimized by providing a heat sink and, if possible, operating with reduced power supply voltage to minimize power dissipation. ® OPA654 8