N-Channel Enhancement Mode MOSFET Switch CORPORATION 3N170 / 3N171 FEATURES • Low Switching Voltages • Fast Switching Times Drain-Source Resistance • Low • Low Reverse Transfer Capacitance PIN CONFIGURATION HANDLING PRECAUTIONS MOS field-effect transistors have extremely high input resistance and can be damaged by the accumulation of excess static charge. To avoid possible damage to the device while wiring, testing, or in actual operation, follow the procedures outlined below. 1. To avoid the build-up of static charge, the leads of the devices should remain shorted together with a metal ring except when being tested or used. 2. Avoid unnecessary handling. Pick up devices by the case instead of the leads. TO-72 3. Do not insert or remove devices from circuits with the power on as transient voltages may cause permanent damage to the devices. ABSOLUTE MAXIMUM RATINGS (TA = 25oC unless otherwise specified) C,B D 1003 G S Drain-Gate Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±35V Drain-Source Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V Gate-Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±35V Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA Storage Temperature Range . . . . . . . . . . . . . -65oC to +200oC Operating Temperature Range . . . . . . . . . . . -55oC to +150oC Lead Temperature (Soldering, 10sec) . . . . . . . . . . . . . +300oC Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300mW Derate above 25oC . . . . . . . . . . . . . . . . . . . . . . . 2.4mW/ oC NOTE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ORDERING INFORMATION Part Package 3N170-71 X3N170-71 Hermetic TO-72 Sorted Chips in Carriers Temperature Range -55oC to +150oC -55oC to +150oC 3N170 / 3N171 CORPORATION ELECTRICAL CHARACTERISTICS (TA = 25oC unless otherwise specified) Substrate connected to source. SYMBOL PARAMETER BVDSS Drain-Source Breakdown Voltage IGSS Gate Leakage Current MIN MAX 25 UNITS V ±10 pA 100 IDSS VGS(th) Zero-Gate-Voltage Drain Current Gate-Source Threshold Voltage 10 nA 1.0 µA 3N170 1.0 2.0 3N171 1.5 3.0 TEST CONDITIONS ID = 10µA, VGS = 0 VGS = ±35V, VDS = 0 VGS = 35V, VDS = 0, TA = 125 oC VDS = 10V, VGS = 0 TA = 125oC V VDS = 10V, ID = 10µA mA VGS = 10V, VDS = 10V ID(on) "ON" Drain Current VDS(on) Drain-Source "ON" Voltage 2.0 V ID = 10mA, VGS = 10V rds(on) Drain-Source ON Resistance 200 Ω VGS = 10V, ID = 0, f = 1kHz | Yfs | Forward Transfer Admittance µS VDS = 10V, ID = 2.0mA, f = 1kHz Crss Reverse Transfer Capacitance (Note 1) 10 1000 Ciss Input Capacitance (Note 1) 5.0 Cd(sub) Drain-Substrate Capacitance (Note 1) 5.0 td(on) Turn-On Delay Time (Note 1) 3.0 tr Rise Time (Note 1) 10 td(off) Turn-Off Delay Time (Note 1) 3.0 tf Fall Time (Note 1) 15 NOTE 1: For design reference only, not 100% tested. VDS = 0, VGS = 0, f = 1MHz 1.3 pF VDS = 10V, VGS = 0, f = 1MHz VD(SUB) = 10V, f = 1MHz ns VDD = 10V, ID(on) = 10mA, VGS(on) = 10V, VGS(off) = 0, RG = 50Ω