SN74LVC07A HEX BUFFERS/DRIVERS WITH OPEN-DRAIN OUTPUTS www.ti.com SCAS595P – OCTOBER 1997 – REVISED JANUARY 2007 FEATURES • • Operate From 1.65 V to 5 V Inputs and Open-Drain Outputs Accept Voltages up to 5.5 V • • Max tpd of 2.6 ns at 5 V Latch-Up Performance Exceeds 250 mA Per JESD 17 DESCRIPTION/ORDERING INFORMATION These hex buffers/drivers are designed for 1.65-V to 5.5-V VCC operation. The outputs of the SN74LVC07A devices are open drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 24 mA. Inputs can be driven from 1.8-V, 2.5-V, 3.3-V (LVTTL), or 5-V (CMOS) devices. This feature allows the use of these devices as translators in a mixed-system environment. ORDERING INFORMATION PACKAGE (1) TA QFN – RGY SOIC – D –40°C to 85°C Reel of 1000 SN74LVC07ARGYR Tube of 50 SN74LVC07AD Reel of 2500 SN74LVC07ADR TOP-SIDE MARKING LC07A LVC07A Reel of 250 SN74LVC07ADT SOP – NS Reel of 2000 SN74LVC07ANSR LVC07A SSOP – DB Reel of 2000 SN74LVC07ADBR LC07A Tube of 90 SN74LVC07APW Reel of 2000 SN74LVC07APWR Reel of 250 SN74LVC07APWT Reel of 2000 SN74LVC07ADGVR TSSOP – PW TVSOP – DGV (1) ORDERABLE PART NUMBER LC07A LC07A Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1997–2007, Texas Instruments Incorporated SN74LVC07A HEX BUFFERS/DRIVERS WITH OPEN-DRAIN OUTPUTS www.ti.com SCAS595P – OCTOBER 1997 – REVISED JANUARY 2007 FUNCTION TABLE (EACH BUFFER/DRIVER) INPUT A OUTPUT Y H H L L LOGIC DIAGRAM, EACH BUFFER/DRIVER (POSITIVE LOGIC) A Y Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC Supply voltage range –0.5 6.5 V VI Input voltage range (2) –0.5 6.5 V VO Output voltage range 6.5 V IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA ±100 mA –0.5 Continuous current through VCC or GND D package (3) DB package θJA Package thermal impedance DGV (1) (2) (3) (4) 2 86 (3) 96 package (3) 127 NS package (3) 76 PW package (3) 113 RGY Tstg UNIT package (4) Storage temperature range °C/W 47 –65 150 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. The package thermal impedance is calculated in accordance with JESD 51-7. The package thermal impedance is calculated in accordance with JESD 51-5. Submit Documentation Feedback SN74LVC07A HEX BUFFERS/DRIVERS WITH OPEN-DRAIN OUTPUTS www.ti.com SCAS595P – OCTOBER 1997 – REVISED JANUARY 2007 Recommended Operating Conditions VCC (1) Supply voltage High-level input voltage MAX 1.65 5.5 VCC = 2.3 V to 2.7 V 1.7 VCC = 2.7 V to 3.6 V 2 VCC = 4.5 V to 5.5 V 0.7 × VCC Low-level input voltage VI Input voltage VO Output voltage Low-level output current TA (1) V VCC = 2.3 V to 2.7 V 0.7 VCC = 2.7 V to 3.6 V 0.8 V 0.3 × VCC VCC = 4.5 V to 5.5 V IOL V 0.35 × VCC VCC = 1.65 V to 1.95 V VIL UNIT 0.65 × VCC VCC = 1.65 V to 1.95 V VIH MIN 0 5.5 V 0 5.5 V VCC = 1.65 V 4 VCC = 2.3 V 12 VCC = 2.7 V 12 VCC = 3 V 24 VCC = 4.5 V 24 Operating free-air temperature –40 85 mA °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOL = 100 µA VCC 1.65 V 0.45 2.3 V 0.7 2.7 V 0.4 3V 0.55 IOL = 24 mA II VI = 5.5 V or GND VI = VCC or GND, ∆ICC Ci (1) UNIT V 3.6 V ±5 µA 3.6 V 10 µA 2.7 V to 3.6 V 500 µA IO = 0 One input at VCC – 0.6 V, Other inputs at VCC or GND MAX 0.2 IOL = 12 mA ICC TYP (1) 1.65 V to 5.5 V IOL = 4 mA VOL MIN VI = VCC or GND 3.3 V 5 pF All typical values are at VCC = 3.3 V, TA = 25°C. Submit Documentation Feedback 3 SN74LVC07A HEX BUFFERS/DRIVERS WITH OPEN-DRAIN OUTPUTS www.ti.com SCAS595P – OCTOBER 1997 – REVISED JANUARY 2007 Switching Characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1 through Figure 4) PARAMETER tpd FROM (INPUT) TO (OUTPUT) A Y VCC = 1.8 V ± 0.15 V VCC = 2.5 V ± 0.2 V MIN MAX MIN MAX 1 5.6 1 3.4 VCC = 2.7 V MIN VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V MAX MIN MAX MIN MAX 3.3 1 3.6 1 2.6 UNIT ns Operating Characteristics TA = 25°C PARAMETER Cpd 4 Power dissipation capacitance per buffer/driver TEST CONDITIONS VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V VCC = 5 V TYP TYP TYP TYP f = 10 MHz 1.8 2 2.5 3.78 Submit Documentation Feedback UNIT pF SN74LVC07A HEX BUFFERS/DRIVERS WITH OPEN-DRAIN OUTPUTS www.ti.com SCAS595P – OCTOBER 1997 – REVISED JANUARY 2007 PARAMETER MEASUREMENT INFORMATION VCC = 1.8 V ± 0.15 V 2 × VCC S1 1 kΩ From Output Under Test Open TEST S1 tPZL (see Note F) 2 × VCC tPLZ (see Note G) 2 × VCC tPHZ/tPZH 2 × VCC GND CL = 30 pF (see Note A) 1 kΩ LOAD CIRCUIT tw VCC Timing Input VCC/2 VCC/2 VCC/2 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VCC/2 Output Control (low-level enabling) VCC VCC/2 VCC/2 0V tPLH Output Waveform 1 S1 at 2 × VCC (see Note B) VCC VCC/2 tPLZ VCC VCC/2 tPZH tPHL VCC/2 VOL Output Waveform 2 S1 at 2 × VCC (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VCC/2 0V tPZL VCC Input VOLTAGE WAVEFORMS PULSE DURATION th VCC Data Input VCC/2 0V 0V tsu Output VCC VCC/2 Input VOL + 0.15 V VOL tPHZ VCC/2 VCC VCC − 0.15 V 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2 ns, tf ≤ 2 ns. D. The outputs are measured one at a time, with one transition per measurement. E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd. F. tPZL is measured at VCC/2. G. tPLZ is measured at VOL + 0.15 V. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms Submit Documentation Feedback 5 SN74LVC07A HEX BUFFERS/DRIVERS WITH OPEN-DRAIN OUTPUTS www.ti.com SCAS595P – OCTOBER 1997 – REVISED JANUARY 2007 PARAMETER MEASUREMENT INFORMATION VCC = 2.5 V ± 0.2 V 2 × VCC S1 500 Ω From Output Under Test Open TEST S1 tPZL (see Note F) 2 × VCC tPLZ (see Note G) 2 × VCC tPHZ/tPZH 2 × VCC GND CL = 30 pF (see Note A) 500 Ω LOAD CIRCUIT tw VCC Timing Input VCC/2 VCC/2 VCC/2 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VCC/2 Output Control (low-level enabling) VCC VCC/2 VCC/2 0V tPLH Output Waveform 1 S1 at 2 × VCC (see Note B) VCC VCC/2 tPLZ VCC VCC/2 tPZH tPHL VCC/2 VOL Output Waveform 2 S1 at 2 × VCC (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VCC/2 0V tPZL VCC Input VOLTAGE WAVEFORMS PULSE DURATION th VCC Data Input VCC/2 0V 0V tsu Output VCC VCC/2 Input VOL + 0.15 V VOL tPHZ VCC/2 VCC VCC − 0.15 V 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2 ns, tf ≤ 2 ns. D. The outputs are measured one at a time, with one transition per measurement. E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd. F. tPZL is measured at VCC/2. G. tPLZ is measured at VOL + 0.15 V. H. All parameters and waveforms are not applicable to all devices. Figure 2. Load Circuit and Voltage Waveforms 6 Submit Documentation Feedback SN74LVC07A HEX BUFFERS/DRIVERS WITH OPEN-DRAIN OUTPUTS www.ti.com SCAS595P – OCTOBER 1997 – REVISED JANUARY 2007 PARAMETER MEASUREMENT INFORMATION VCC = 2.7 and 3.3 V ± 0.3 V 6V S1 500 Ω From Output Under Test Open GND CL = 50 pF (see Note A) 500 Ω TEST S1 tPZL (see Note F) 6V tPLZ (see Note G) 6V tPHZ/tPZH 6V LOAD CIRCUIT tw 2.7 V 2.7 V Timing Input 0V 0V 2.7 V 1.5 V 1.5 V 0V 1.5 V 1.5 V 0V tPLH 2.7 V 1.5 V tPLZ 3V 1.5 V tPZH 1.5 V VOL Output Waveform 2 S1 at 6 V (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES 1.5 V 0V Output Waveform 1 S1 at 6 V (see Note B) tPHL 3V 1.5 V Output Control (low-level enabling) tPZL 2.7 V Output VOLTAGE WAVEFORMS PULSE DURATION th VOLTAGE WAVEFORMS SETUP AND HOLD TIMES Input 1.5 V 1.5 V tsu Data Input 1.5 V Input VOL + 0.3 V VOL tPHZ 3V 1.5 V 2.7 V 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd. F. tPZL is measured at 1.5 V. G. tPLZ is measured at VOL + 0.3 V. H. All parameters and waveforms are not applicable to all devices. Figure 3. Load Circuit and Voltage Waveforms Submit Documentation Feedback 7 SN74LVC07A HEX BUFFERS/DRIVERS WITH OPEN-DRAIN OUTPUTS www.ti.com SCAS595P – OCTOBER 1997 – REVISED JANUARY 2007 PARAMETER MEASUREMENT INFORMATION VCC = 5 V ± 0.5 V 2 × VCC S1 500 Ω From Output Under Test Open GND CL = 50 pF (see Note A) 500 Ω TEST S1 tPZL (see Note F) 2 × VCC tPLZ (see Note G) 2 × VCC tPHZ/tPZH 7V LOAD CIRCUIT tw 3V 3V Timing Input 0V 0V 3V 1.5 V 1.5 V 0V 1.5 V 1.5 V 0V tPLH VCC VCC/2 tPLZ VCC VCC/2 tPZH 1.5 V VOL Output Waveform 2 S1 at 7 V (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VCC/2 0V Output Waveform 1 S1 at 2 × VCC (see Note B) tPHL 3.5 V 1.5 V Output Control (low-level enabling) tPZL 3V Output VOLTAGE WAVEFORMS PULSE DURATION th VOLTAGE WAVEFORMS SETUP AND HOLD TIMES Input 1.5 V 1.5 V tsu Data Input 1.5 V Input VOL + 0.3 V VOL tPHZ 3.5 V 1.5 V 3.2 V 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd. F. tPZL is measured at VCC/2. G. tPLZ is measured at VOL + 0.3 V. H. All parameters and waveforms are not applicable to all devices. Figure 4. Load Circuit and Voltage Waveforms 8 Submit Documentation Feedback PACKAGE OPTION ADDENDUM www.ti.com 3-Jan-2007 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74LVC07AD ACTIVE SOIC D 14 SN74LVC07ADBR ACTIVE SSOP DB SN74LVC07ADBRG4 ACTIVE SSOP SN74LVC07ADE4 ACTIVE SN74LVC07ADGVR 50 Lead/Ball Finish MSL Peak Temp (3) Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM DB 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SOIC D 14 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM ACTIVE TVSOP DGV 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC07ADGVRE4 ACTIVE TVSOP DGV 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC07ADGVRG4 ACTIVE TVSOP DGV 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC07ADR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC07ADRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC07ADRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC07ADT ACTIVE SOIC D 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC07ADTE4 ACTIVE SOIC D 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC07ANSR ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC07ANSRE4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC07APW ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC07APWE4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC07APWG4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC07APWLE OBSOLETE TSSOP PW 14 SN74LVC07APWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC07APWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC07APWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC07APWT ACTIVE TSSOP PW 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC07APWTE4 ACTIVE TSSOP PW 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC07APWTG4 ACTIVE TSSOP PW 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC07ARGYR ACTIVE QFN RGY 14 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1YEAR 50 TBD Addendum-Page 1 Call TI Call TI PACKAGE OPTION ADDENDUM www.ti.com 3-Jan-2007 Orderable Device Status (1) Package Type Package Drawing SN74LVC07ARGYRG4 ACTIVE QFN RGY Pins Package Eco Plan (2) Qty 14 1000 Green (RoHS & no Sb/Br) Lead/Ball Finish CU NIPDAU MSL Peak Temp (3) Level-2-260C-1YEAR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°–8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. Falls within JEDEC: 24/48 Pins – MO-153 14/16/20/56 Pins – MO-194 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-153 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Amplifiers amplifier.ti.com Audio www.ti.com/audio Data Converters dataconverter.ti.com Automotive www.ti.com/automotive DSP dsp.ti.com Broadband www.ti.com/broadband Interface interface.ti.com Digital Control www.ti.com/digitalcontrol Logic logic.ti.com Military www.ti.com/military Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork Microcontrollers microcontroller.ti.com Security www.ti.com/security Low Power Wireless www.ti.com/lpw Telephony www.ti.com/telephony Mailing Address: Video & Imaging www.ti.com/video Wireless www.ti.com/wireless Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright © 2007, Texas Instruments Incorporated