Real time clock module 4-bit REAL TIME CLOCK MODULE RTC-62421/62423 • • • • Builtin crystal unit allows adjustment-free efficient operation. Low standby voltage and current consumption (1.8µA at 2V). Wide range of operating temperature (from -40˚C to +85˚C). 24H/12H changeable and leap year automatically adjustable (gregorian calendar). • Similar mounting method (RTC-62423) to that used for universal type SMD IC. • Pins and functions are compatible with the MSM6242 series. Actual size Specifications (characteristics) Absolute Max. rating Ta=25˚C RTC-62421 RTC-62423 ˚C RTC-62421 RTC-62423 Twice at under 260˚C within 10 sec. or under 230˚C within 3 min. 1 VDD 4.5 to 5.5 V TOPR -40 to +85 ˚C Data holding voltage VDH 2.0 to 5.5 V CS1 data holding time tCDR 2.0 min. µs ∆f/fo Ta=25˚C 62421 B VDD=5V 62423 A Specifications ±10 fa S.R. IDD1 Unit ±20 ppm ±50 +10/-120 -40 to +85˚C (25˚C reference temperature) +10/-220 VDD=5V, Ta=25˚C, ±5 max. ppm/Y ±10 max. ppm first year CS1=0V IDD2 VDD=5V 30 max. VDD=2V 1.8 max. VIH1 “L” input voltage (1) VIL1 Input leak current (1) ILK1 Input leak current (2) ILK2 63 — V1=VDD/0V “L” output voltage (1) VOL1 IOL=2.5mA “H” output voltage VOH IOH=-400µA “L” output voltage (2) VOL2 IOL=2.5mA OFF leak current IOFFLK V1=VDD/0V C1 Input VIH2 VIL2 frequency 1 MHz 0.25 90° to 105° µA RTC-62423 Min. Typ. Max. 2.2 — 0.8 — 1/-1 — 10/-10 Unit Applicable terminal V All inputs other than CS1 µA — 10 5 — 4/5 VDD VDD=2 to 5.5V — — 1/5 VDD RTC62423 A EPSON 9220 V 0.4 — Input other than D0 to D3 D0 to D3 0.4 2.4 16.3 max. µA STD.P 2.5 “H” input voltage (1) RTC62421 A EPSON 6053 C 7.62 Electrical characteristics Symbol Condition (Unit: mm) 23.1 max. ±50 -10 to +70˚C (25˚C reference temperature) Three drops on a hard board from 75 cm or 3000G x 0.3ms x 1/2 sine wave x 3 directions External dimensions RTC-62421 7.9 Aging “L” input voltage (2) 9 62423 STD. P CS 0 NC ALE A0 NC A1 NC A2 A3 RD GND WR D3 D2 D1 NC NC D0 CS1 NC (VDD) (VDD) VDD 12.2 max. Frequency temperature characteristics “H” input voltage (2) 8 ALE A0 A1 A2 A3 RD GND WR D3 D2 D1 D0 CS1 (VDD) (VDD) VDD No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 0.2 min. Condition 62423 Input capacity 7 STD. P CS 0 1 2 3 4 5 6 7 8 9 10 11 12 (VDD) and VDD are to have the same level of voltage. Do not connect it to any external terminals. NC is not connected internally. 6.8 Symbol 62421 A Item 6 62421 3.3 min. Refer to the data holding timing tR Frequency characteristics and current consumption characteristics Current consumption 5 pF V CS1 2.8 max. Operation restoring time Shock resistance 4 Unit Specifications Operating temperature Frequency tolerance 3 24 23 22 21 20 19 18 17 16 15 14 13 Condition Symbol Operating voltage Item 2 RTC-62423 Operating range Item No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 18 17 16 15 14 13 12 11 10 V Under 260˚C within 10 sec. (lead part) (package should be less than 150˚C) TSOL RTC-62421 0° to 10° 1.0 0.2 TSTG Unit 0.05 min. Soldering condition Specifications -0.3 to 7.0 -0.3 to VDD+0.3 -55 to +85 -55 to +125 4.2 max. Storage temperature Condition 0.3 Item Symbol Power source voltage VDD Input and output voltage VI/O Terminal connection Real time clock module Data holding timing VDD 4V 4V 2 to 4V tR VIH2 VIH2 CS1 ≤ 1/5VDD VIL2 VIL2 Data storage mode Interface possible with external terminals Interface possible with external terminals CS0 or WR not occurred Address Register table Name of A3 A2 A1 A0 register D0 0 0 s4 s40 mi4 mi40 h4 s2 s20 mi2 mi20 h2 s1 s10 mi1 mi10 h1 0 to 9 0 to 5 0 to 9 0 to 5 0 to 9 1 - sec. digit register 10 - sec. digit register 1 - min. digit register 10 - min. digit register 1 - hour digit register 0 1 H10 ∗ PM/AM h20 H10 0 to 2 or 0 to 1 10 - hour digit register 1 1 0 d8 d4 1 1 1 1 0 0 0 d2 d20 mo2 1 0 0 1 d1 d10 mo1 mo10 y1 y10 w1 0 to 9 0 to 3 0 to 9 0 to 1 1 - day digit register 10 - day digit register 1 - month digit register 10 - month digit register 0 0 0 1 0 0 0 1 2 0 0 1 0 3 0 0 1 1 4 0 1 5 0 1 6 0 7 0 8 9 A 1 0 1 0 B 1 0 1 1 C 1 1 0 0 D1 D10 MO1 MO10 Y1 Y10 W D 1 1 0 1 CD 1 1 1 1 1 0 1 1 CE CF ∗ mo8 mo4 ∗ y4 y40 w4 y8 y80 ∗ y2 y20 w2 0 to 9 0 to 6 30 sec. IRQ BUSY HOLD ADJ FLAG ITRPT MASK t 0 /STND t1 TEST 24/12 STOP CS1 hold time tCIH 1000 Address setup time tAS 25 Address hold time tAH ALE pulse width tAW ALE before WRITE tALW 10 ALE before READ tALR 10 ALE after WRITE tWAL 20 ALE after READ tRAL 10 WRITE pulse width tWW RD to data tRD DATA hold tDR 0 DATA setup time tDS 100 DATA hold time tDH RD/WR recovery time tRCV __ Note Count s8 ∗ mi8 ∗ h8 0 F D1 D2 S1 S10 MI1 MI10 H1 0 E D3 __ ___ — ns 120 — 120 10 45 — 60 t AS A3 to A0 CS0 1 - year digit register 10 - year digit register Week register VIH2 t CIS t AH VIH1 VIL1 t C1H VIH1 VIL1 t AW VIH1 VIH1 ALE VIH1 t ALW WR Control register D VIH1 t WAL tWW t RCV VIL1 VIL1 VIH1 tDS Control register E tDH D3 to D0 VIL1 VIL1 (Input ) VIH1 VIH1 Control register F RESET Read mode PM/AM 24/12 ITRPT/STND PM 24 ITRPT VIH2 CS 1 AM 40 CL=150pF VIH2 CS 1 Supplement 0 25 — Write mode 0=“L” level. 1=“H” level 1 Symbol Condition Min. Max. Unit tCIS 1000 CS1 setup time t CDR CS1 ( VDD = 5V ± 0.5V, Ta = -40 to + 85˚C ) Switching characteristics ( ALE = While in use ) Item 12 STND t C1S A3 to A0 ALE t CIH t AH VIH1 VIH1 CS 0 Description Bit name Writable. Recognized as 0 while in read mode. ∗ mark Read only (effective only when HOLD=1) BUSY Enter “0” only when clearing interruption. Enter “1” otherwise. IRQ FLAG Set able only when RESET=1 24H/12H For our company's testing. TEST should be “0” in normal use. TEST Note: Do not enter erroneous data for clock. This may result in time keeping error. VIH2 t AS VIH1 VIL1 t AW VIL1 VIH1 VIH1 VIH1 t ALR t RAL RD t RCV VIL1 VIL1 t DR t RD D3 to D0 VOH VOL (output ) “Z” Block diagram COUNTER OCS 32.768 kHz D3 D2 D1 D0 G A T E WR RD G A T E A3 A2 A1 A0 CS 0 G A T E & L A T C H 1 Hz RESET STOP 30s.ADJ bit bit bit HOLD BUSY bit bit 30s.ADJ bit 24 / 12 bit S1 S10 M1 M10 H1 H10 D1 D10 MO1 MO10 Y1 Y10 W VDD D E C O D E R SI to CF CD CE CF 64Hz 1 sec carry 1 minute carry 1 hour carry STD.P ALE CS1 64