EPSON RTC

Real time clock module
4-bit REAL TIME CLOCK MODULE
RTC-72421/72423
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Built-in crystal unit allows adjustment-free efficient operation.
ALE input terminal available for 8048, 8051, and 8085 series.
12/24 h clock switchover function and automatic leap year setting.
Interrupt masking.
30 second adjustment function.
Low current consumption and features a backup function.
Actual size
Specifications (characteristics)
Absolute Max. rating
Symbol
Item
VDD
Power source voltage
VI/O
Input and output voltage
TSTG
Condition
Ta=+25 °C
Ta=+25 °C
RTC-72421
RTC-72423
Specifications
-0.3 to 7.0
GND -0.3 to VDD+0.3
-55 to +85
-55 to +125
RTC-72421
Under +260 °C within 10 s
(lead part) (package should
be less than +150 °C)
RTC-72423
Twice at under +260 °C within 10
s or under +230 °C within 3 min.
TSOL
V
°C
1
9
Unit
4.5 to 5.5
V
RTC-72421
-10 to 70
RTC-72423
-40 to 85
Refer to the data
holding timing
tR
Specifications
°C
2.0 to 5.5
V
2.0 Min.
µs
Condition
72421 A
Frequency temperature
characteristics
Ta=+25 °C 72421 B
±50
VDD=5 V
72423 A
±20
72423
±50
Unit
x 10-6
+10/-120
VDD=5 V, Ta=+25 °C,
±5 Max.
x 10-6/year
S.R.
Three drops on a
hard board from 750 mm
or 29400 m/s2 x 0.3 ms x
1/2 sine wave x 3 directions
±10 Max.
x 10
IDD1
CS1=0 V VDD=5 V
10 Max.
IDD2
Exclude input/
output current
fa
Aging
first year
0.25
5 Max.
VIH1
“L” input voltage
(1)
VIL1
Input leak current (1)
ILK1
Input leak current (2)
ILK2
“L” output voltage (1)
VOL1
“H” output voltage
VOH
“L” output voltage (2)
VOL2
Off leak current
IOFFLK
C1
“H” input voltage
(2)
VIH2
“L” input voltage
(2)
VIL2
90° to
105°
-6
0.65 Max.
µA
RTC-72423
Symbol Condition
(1)
RTC72421 A
EPSON 5053C
7.62
DC characteristics
“H” input voltage
RTC-72421
2.54
VDD=2 V
(Unit: mm)
23.1 Max.
-10 °C to +70 °C
(+25 °C reference temperature)
External dimensions
—
Min. Typ. Max.
2.2
—
0.8
V1=VDD/0 V
±1
—
—
IOL=2.5 mA
IOH=-400 µA
IOL=2.5 mA
V1=VDD/0 V
Input
frequency 1 MHz
VDD=2 to 5.5 V
±10
Unit
V
µA
—
10
10
20
—
4/5 VDD
—
—
1/5 VDD
Input other
than D0 to D3
RTC72423 A
EPSON 6150
V
0.4
—
16.3 Max.
All inputs
other than
CS1
D0 to D3
0.4
2.4
Applicable
terminal
µA
pF
V
STD.P
Input other
than D0 to D3
D0 to D3
CS1
1.27
0.35
0.05 Min.
2.8 Max.
0° to
10°
1.0
0.2
∆f/fo
Specifications
±10
72423
STD. P
CS 0
NC
ALE
A0
NC
A1
NC
A2
A3
RD
GND
WR
D3
D2
D1
NC
NC
D0
CS1
NC
(VDD)
(VDD)
VDD
1 2 3 4 5 6 7 8 9 10 11 12
(VDD) and VDD are to have the same level of voltage. Do not connect it to any external terminals.
NC is not connected internally.
Frequency characteristics and current consumption
characteristics
Symbol
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
0.2 Min.
tCDR
Operation restoring time
77
8
ALE
A0
A1
A2
A3
RD
GND
WR
D3
D2
D1
D0
CS1
(VDD)
(VDD)
VDD
3.3 Min.
CSI data holding time
Input capacity
7
STD. P
CS 0
2.5
VDH
Item
6
0.3
Data holding voltage
Current consumption
5
7.9
TOPR
Shock resistance
4
72421
12.2 Max.
Operating temperature
Frequency tolerance
3
24 23 22 21 20 19 18 17 16 15 14 13
Condition
VDD
Item
2
RTC-72423
Symbol
Operating voltage
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
18 17 16 15 14 13 12 11 10
Operating range
Item
RTC-72421
6.3
Soldering condition
Unit
4.2
Storage temperature
Terminal connection
Real time clock module
Write mode (with ALE)
A3 A2 A1 A0
0
1
2
3
4
0
0
0
0
0
0
0
0
0
1
0
0
1
1
0
Data
Register
Address
Register table
D2
D1
D0
Count
Value
Remarks
D3
0 S1
1 S10
0 MI 1
1 MI10
0 H1
s8
∗
mi8
∗
h8
s4
s40
mi4
mi40
h4
s2
s20
mi2
mi20
h2
s1
s10
mi1
mi10
h1
0 to 9
0 to 5
0 to 9
0 to 5
0 to 9
1- second digit register
10- second digit register
1- minute digit register
10- minute digit register
1- hour digit register
h10
0 to 2
or
0 to 1
H10
∗
PM/AM
h20
d4
∗
mo4
∗
y4
y40
w4
d2
d1
d20
d10
mo2 mo1
∗
mo10
y1
y2
y20
y10
w2
w1
5
0 1 0 1
6
7
8
9
A
B
C
0
0
1
1
1
1
1
D
1 1 0 1 RegD
30 sec. IRQ
ADJ FLAG BUSY HOLD
E
1 1 1 0 RegE
ITRPT
/STND MASK
F
1 1 1 1 RegF
1
1
0
0
0
0
1
1
1
0
0
1
1
0
d8
0 D1
∗
1 D10
0 MO1 mo8
1 MO10 ∗
y8
0 Y1
1 Y10 y80
∗
0 W
t1
t0
TEST 24/12
0 to 9
0 to 6
VIH
VIL
VIH
VIH
tSU
Condition
(A-ALE)
tW (ALE)
(ALE-W)
tSU
(ALE-R)
tSU
(W-ALE)
tSU (R-ALE)
tW (W)
CL=150 pF
tPZV (R-Q)
tPVZ (R-Q)
tSU
VIL
tSU
tSU
(R-ALE)
(W-D)
tH
(D-W)
VIH
VIL
VIH (CS1)
(CS1) tSU (A-ALE) tH (ALE-A)
A0 to A3
VIH
VIL
CS0
ALE
tW
(ALE)
VIH
VIH
tH (CS1)
VIH
VIL
VIL
tSU
VIL
(D-W)
tH (W-D)
tH (CS1)
tREC (R/W)
tSU (R-ALE)
(ALE-R)
RD
tH (ALE-A)
tSU
(W-ALE)
VIH (CS1)
CS1
VIH
VIL
VIH
VIL
trnc (R)
tPVZ (R-Q)
tPZV (R-Q)
(Please connect ALE to VDD if the microprocessor does not have an ALE output.)
( VDD = 5 V ± 0.5 V)
tSU
tSU
(W)
VIH
VIH
Switching characteristics (with ALE)
Symbol
tSU (CS1)
tW
(ALE-W)
VIH
VIL
Control Register F
5) TEST bit should be “O”.
Item
CS1 setup time
Address setup time before ALE
Address hold time after ALE
ALE pulse width
ALE setup time before WRITE
ALE setup time before READ
ALE setup time after WRITE
ALE setup time after READ
WRITE pulse width
DATA delay time after READ
DATA Hold time after READ
DATA setup time before WRITE
DATA hold time after WRITE
CS1 hold time
READ/WRITE recovery time
VIL
tSU
Read mode (with ALE)
24
12
ITRPT
STND
(CS1)
(ALE)
D0 to D3
0=“L” level,1=“H” level, REST = RESET ITRPT/ STND=INTERRUPT/STANDARD
PM
AM
tH
Control Register E
REST
STOP
(A-ALE) tH (ALE-A)
WR
Control Register D
-----
tW
ALE
1- day digit register
10 -day digit register
1- month digit register
10- month digit register
1- year digit register
10- year digit register
Week register
tSU
(CS1)
VIH
VIL
CS0
PM/AM,10- hours digit register
0 to 9
0 to 3
0 to 9
0 to 1
tSU
A0 to A3
1) Bit ∗ does not exist.
2) Please mask AM/PM bit with 10's of hours operations.
3) Busy is read only. IRQ can only. IRQ can only be set low (“O”).
24/12
Data Bit
ITRPT/STND
4)
PM/AM
1
0
VIH (CS1)
VIH (CS1)
CS1
Min. Max.
1000
50
50
80
0
---0
50
50
120
---120
0
70
80
10
---1000
200
VOH
VOL
D0 to D3
VOH
VOL
Unit
Data holding timing
VDD
4V
4V
2 to 4 V
ns
t CDR
CS1
tR
VIH2
VIH2
CS1 ≤ 1/5VDD
VIL2
Data storage mode
Interface possible
with external
terminals
CS0 or WR not occurred
VIL2
Interface possible
with the external
terminals
Block diagram
RD WR CS1 ALE
READ • WRITE
CONTROL
64 HZ
STD•P
4
D0 D1 D2 D3
ADDRESS LATCH
DATA BUS • BUFFER
4
REST
STOP
30ADJ
BUSY
HOLD
DIVIDER
OSC
CS0 A0 A1 A2 A3
4
ADDRESS DECODER
CARRY PER
SEC.
CARRY PER
MIN.
CARRY PER
HOUR
IRQFLAG
4
Seconds
Sec 1
Minutes
Hours
Days
Months
Years
Sec 10 Min 1 Min 10 Hou 1 Hou 10 Day 1 Day 10 Mon 1 Mon 10 Yea 1 Yea 10
24/12
Week
4
Reg D
Reg E
Reg F
78