2SJ319(L), 2SJ319(S) Silicon P-Channel MOS FET Application High speed power switching Features • • • • • Low on-resistance High speed switching Low drive current No secondary breakdown Suitable for switching regulator, DC-DC converter Outline DPAK-1 4 4 1 1 2 3 2 3 D 1. Gate 2. Drain 3. Source 4. Drain G S 2SJ319(L), 2SJ319(S) Absolute Maximum Ratings (Ta = 25°C) Item Symbol Ratings Unit Drain to source voltage VDSS –200 V Gate to source voltage VGSS ±20 V Drain current ID –3 A –12 A –3 A Drain peak current I D(pulse)* Body to drain diode reverse drain current I DR 1 2 Channel dissipation Pch* 20 W Channel temperature Tch 150 °C Storage temperature Tstg –55 to +150 °C Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. Value at TC = 25°C Electrical Characteristics (Ta = 25°C) Item Symbol Min Typ Max Unit Test conditions Drain to source breakdown voltage V(BR)DSS –200 — — V I D = –10 mA, VGS = 0 Gate to source breakdown voltage V(BR)GSS ±20 — — V I G = ±100 µA, VDS = 0 Gate to source leak current I GSS — — ±10 µA VGS = ±16 V, VDS = 0 Zero gate voltage drain current I DSS — — –100 µA VDS = –160 V, VGS = 0 Gate to source cutoff voltage VGS(off) –2.0 — –4.0 V I D = –1 mA, VDS = –10 V Static drain to source on state resistance RDS(on) — 1.7 2.3 Ω I D = –2 A, VGS = –10 V*1 Forward transfer admittance |yfs| 1.0 1.7 — S I D = –2 A, VDS = –10 V*1 Input capacitance Ciss — 330 — pF VDS = –10 V, VGS = 0, Output capacitance Coss — 130 — pF f = 1 MHz Reverse transfer capacitance Crss — 25 — pF Turn-on delay time t d(on) — 10 — ns I D = –2 A, VGS = –10 V, Rise time tr — 30 — ns RL = 15 Ω Turn-off delay time t d(off) — 40 — ns Fall time tf — 30 — ns Body to drain diode forward voltage VDF — –1.15 — V I F = –3 A, VGS = 0 Body to drain diode reverse recovery time t rr — 180 — ns I F = –3 A, VGS = 0, diF/dt = 50 A/µs Note: 2 1. Pulse test 2SJ319(L), 2SJ319(S) Power vs. Temperature Derating Maximum Safe Operation Area –50 –30 I D (A) 15 Drain Current Channel Dissipation Pch (W) 20 10 5 –10 –3 –1 –0.3 –0.1 –0.05 0 50 100 150 Case Temperature 200 –1 Typical Output Characteristics ID (A) –4 V Drain Current I D (A) Drain Current –5 V –2 –4 –4 –8 –12 Drain to Source Voltage ) Ta = 25 °C –3 –10 –30 –100 –300 –500 V DS (V) –16 –20 V DS (V) 25 °C Tc = –25 °C 75 °C –3 –2 –1 VGS = –3.5 V 0 °C Typical Transfer Characteristics –6 V –4 Pulse Test –1 25 –5 –8 V –3 = this area is limited by R DS(on) Drain to Source Voltage Tc (°C) –5 –10 V 1 10 0 µs 0 µs PW 1 m DC = s 10 O pe m s ra (1 tio sh n ( ot Tc Operation in ) 0 V DS = –10 V Pulse Test –2 –4 –6 Gate to Source Voltage –8 –10 V GS (V) 3 2SJ319(L), 2SJ319(S) Pulse Test –16 –12 –8 Static Drain to Source on State Resistance R DS(on) ( Ω) –2 A –4 –1 A 0 4 I D = –5 A –4 –8 12 Gate to Source Voltage –16 –20 V GS (V) Static Drain to Source on State Resistance vs. Temperature 5 4 3 –2 A I D = –5 A Static Drain to Source on State Resistance vs. Drain Current 10 5 VGS = –10 V Pulse Test 2 1 0.5 0.2 0.1 –0.2 –0.5 –1 –2 –5 Drain Current I D (A) 3 2 Tc = –25 °C 1 25 °C 0.5 2 1 0 –40 –1 A VGS = –10 V Pulse Test 0 40 80 120 160 Case Temperature Tc (°C) –10 Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance |y fs | (S) Drain to Source Saturation Voltage V DS(on) (V) –20 Drain to Source On State Resistance R DS(on) ( Ω ) Drain to Source Saturation Voltage vs. Gate to Source Voltage 0.2 75 °C V DS = –10 V Pulse Test 0.1 –0.05 –0.1 –0.2 –0.5 –1 –2 Drain Current I D (A) –5 –10 2SJ319(L), 2SJ319(S) Typical Capacitance vs. Drain to Source Voltage Body–Drain Diode Reverse Recovery Time 1000 500 Capacitance C (pF) Reverse Recovery Time trr (ns) 500 200 100 50 20 di/dt = 50 A/µs, VGS = 0 duty < 1 %, Ta = 25 °C 10 100 Coss 50 VGS = 0 f = 1 MHz 20 Crss 5 –0.05 –0.1 –0.2 –0.5 –1 Reverse Drain Current –2 0 –5 I DR (A) V DS –200 –4 V DD = –150 V –100 V –50 V –300 –400 –12 V GS –500 0 –8 –16 –20 4 8 12 16 Gate Charge Qg (nc) 20 Switching Time t (ns) –100 –30 -40 –50 500 V GS (V) V DD = –50 V –100 V –150 V –20 Switching Characteristics 0 Gate to Source Voltage 0 –10 Drain to Source Voltage V DS (V) Dynamic Input Characteristics V DS (V) 200 10 5 Drain to Source Voltage Ciss 200 V GS = –10 V, V DD = –30 V duty < 1 %, PW = 2 µs 100 t d(off) 50 tf tr 20 t d(on) 10 5 –0.05 –0.1 –0.2 –0.5 –1 Drain Current –2 –5 –10 I D (A) 5 2SJ319(L), 2SJ319(S) Reverse Drain Current vs. Source to Drain Voltage Reverse Drain Current I DR (A) –5 Pulse Test –4 –3 –2 –1 0 –10 V –0.4 V GS = 0, 5 V –0.8 –1.2 Source to Drain Voltage –1.6 –2 V SD (V) Normalized Transient Thermal Impedance vs. Pulse Width Normalized Transient Thermal Impedance γ s (t) 3 Tc = 25°C 1 0.3 0.1 0.03 D=1 0.5 0.2 0.1 0.05 θ ch – c(t) = γ s (t) • θ ch – c θ ch – c = 6.25 °C/W, Tc = 25 °C 0.02 1 0.0 t ho lse PDM Pu 1s D= PW T PW T 0.01 10 µ 100 µ 1m 10 m Pulse Width 6 100 m PW (S) 1 10 2SJ319(L), 2SJ319(S) Switching Time Test Circuit Waveforms Vout Monitor Vin Monitor Vin 10% D.U.T. RL 90% Vin -10 V 50Ω V DD .= –30 V . 90% 90% Vout td(on) 10% 10% tr td(off) tf 7 2.3 ± 0.2 0.55 ± 0.1 5.5 ± 0.5 6.5 ± 0.5 5.4 ± 0.5 1.7 ± 0.5 Unit: mm 2.29 ± 0.5 16.2 ± 0.5 1.15 ± 0.1 0.8 ± 0.1 3.1 ± 0.5 1.2 ± 0.3 2.29 ± 0.5 0.55 ± 0.1 Hitachi Code JEDEC EIAJ Weight (reference value) DPAK (L)-(1) — Conforms 0.42 g Cautions 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. 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Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products. Hitachi, Ltd. Semiconductor & Integrated Circuits. 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Ltd. 16 Collyer Quay #20-00 Hitachi Tower Singapore 049318 Tel: 535-2100 Fax: 535-1533 Hitachi Asia Ltd. Taipei Branch Office 3F, Hung Kuo Building. No.167, Tun-Hwa North Road, Taipei (105) Tel: <886> (2) 2718-3666 Fax: <886> (2) 2718-8180 Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Tsim Sha Tsui, Kowloon, Hong Kong Tel: <852> (2) 735 9218 Fax: <852> (2) 730 0281 Telex: 40815 HITEC HX Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.