HITACHI HD74LV221A

HD74LV221A
Dual Monostable Multivibrators
ADE-205-271A (Z)
2nd Edition
June 1999
Description
The HD74LV221A features output pulse-duration control by three methods. In the first method, the A
input is low and the B input goes high. In the second method, the B input is high and the A input goes low.
In the third method, the A input is low, the B input is high, and the clear (CLR) input goes high.
The basic pulse duration is programmed by selecting external resistance and capacitance values. The
external timing capacitor must be connected between Cext and Rext/Cext (positive) and an external resistor
connected between Rext/Cext and VCC.
To obtain variable pulse durations, connect an external variable resistance between Rext/Cext and VCC.
Pulse duration can be reduced by taking CLR low.
Features
•
•
•
•
VCC = 2.0 V to 5.5 V operation
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)
HD74LV221A
Function Table
Inputs
Outputs
CLR
A
B
Q
Q
L
X
X
L
H
X
H
X
L
H
X
X
L
L
H
H
L
↑
H
↓
H
↑
L
H
Note: H:
L:
X:
↑:
↓:
High level
Low level
Immaterial
Low to high transition
High to low transition
: High level pulse
: Low level pulse
Pin Arrangement
16 VCC
1A 1
1B
2
15 1Rext / Cext
1CLR
3
14 1Cext
1Q 4
13 1Q
2Q
5
12 2Q
2Cext
6
11 2CLR
2Rext / Cext
7
10 2B
GND 8
9 2A
(Top view)
2
HD74LV221A
Absolute Maximum Ratings
Item
Supply voltage range
Input voltage range*
1
Output voltage range*
1, 2
Symbol
Ratings
Unit
VCC
–0.5 to 7.0
V
VI
–0.5 to 7.0
V
VO
–0.5 to VCC + 0.5
V
–0.5 to 7.0
Conditions
Output: H or L
VCC: OFF
Input clamp current
I IK
–20
mA
VI < 0
Output clamp current
I OK
±50
mA
VO < 0 or VO > VCC
Continuous output current
IO
±25
mA
VO = 0 to VCC
Continuous current through
VCC or GND
I CC or IGND
±50
mA
Maximum power dissipation
at Ta = 25°C (in still air)*3
PT
785
mW
500
Storage temperature
Tstg
–65 to 150
SOP
TSSOP
°C
Notes: The absolute maximum ratings are values which must not individually be exceeded, and furthermore,
no two of which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current
ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.
3
HD74LV221A
Recommended Operating Conditions
Item
Symbol
Min
Typ
Max
Unit
Supply voltage range
VCC
2.0
—
5.5
V
Input voltage range
VI
0
—
5.5
V
Output voltage range
VO
0
—
VCC
V
Output current
I OH
—
—
–50
µA
VCC = 2.0 V
—
—
–2
mA
VCC = 2.3 to 2.7 V
—
—
–6
VCC = 3.0 to 3.6 V
—
—
–12
VCC = 4.5 to 5.5 V
—
—
50
µA
VCC = 2.0 V
—
—
2
mA
VCC = 2.3 to 2.7 V
—
—
6
VCC = 3.0 to 3.6 V
—
—
12
VCC = 4.5 to 5.5 V
0
—
200
0
—
100
VCC = 3.0 to 3.6 V
0
—
20
VCC = 4.5 to 5.5 V
5
—
—
1
—
—
unlimited
—
F
85
°C
I OL
Input transition rise or fall rate
External timing registance
∆t /∆v
Rext
External timing capacitance
Cext
—
Operating free-air temperature
Ta
–40
Conditions
ns/V
VCC = 2.3 to 2.7 V
kΩ
VCC = 2.0 V
VCC ≥ 3.0 V
Note: Unused or floating inputs must be held high or low.
Logic Diagram
A
Q
Q
Q
Q
B
CLR
CLR
4
HD74LV221A
DC Electrical Characteristics
• Ta = –40 to 85°C
Item
Symbol
VCC (V)*
Min
Typ
Max
Unit
Input voltage
VIH
2.0
1.5
—
—
V
2.3 to 2.7
VCC × 0.7
—
—
3.0 to 3.6
VCC × 0.7
—
—
4.5 to 5.5
VCC × 0.7
—
—
2.0
—
—
0.5
2.3 to 2.7
—
—
VCC × 0.3
3.0 to 3.6
—
—
VCC × 0.3
4.5 to 5.5
—
—
VCC × 0.3
Min to
Max
VCC – 0.1
—
—
2.3
2.0
—
—
IOL = –2 mA
3.0
2.48
—
—
IOL = –6 mA
4.5
3.8
—
—
IOL = –12 mA
Min to
Max
—
—
0.1
2.3
—
—
0.4
IOL = 2 mA
3.0
—
—
0.44
IOL = 6 mA
4.5
—
—
0.55
IOL = 12 mA
VIL
Output voltage
VOH
VOL
V
V
Test Conditions
IOL = –50 µA
IOL = 50 µA
Input current
IIN
0 to 5.5
—
—
±1
µA
VIN = 5.5 V or GND
Input current
Rext / Cext
IIN
5.5
—
—
±2.5
µA
VIN = VCC or GND
Quiescent
supply current
ICC
5.5
—
—
20
µA
VIN = VCC or GND, IO = 0
Active state
supply
current
(per circuit)
∆ICC
2.3
—
—
220
µA
VIN = VCC or GND
Rext/Cext = 0.5 VCC
3.0
280
4.5
650
5.5
975
Output leakage
current
IOFF
0
—
—
5
µA
VO = 5.5 V
Input
capacitance
CIN
3.3
—
4.0
—
pF
VI = VCC or GND
Note: For conditions shown as Min or Max, use the appropriate values under recommended operating
conditions.
5
HD74LV221A
Switching Characteristics
• VCC = 2.5 ± 0.2 V
Ta = 25°C
Ta = –40 to 85°C
Item
Symbol
Min
Typ
Max
Min
Max
Unit
Test Conditions
FROM
(Input)
TO
(Output)
Propagation
delay time
tPLH
tPHL
—
13.3
31.4
1.0
37.0
ns
CL = 15 pF
A or B
Q or Q
—
15.5
36.0
1.0
42.0
CL = 50 pF
—
10.9
25.0
1.0
29.5
CL = 15 pF
CLR
Q or Q
—
12.5
32.8
1.0
34.5
CL = 50 pF
—
13.5
33.4
1.0
39.0
CL = 15 pF
CLR
Q or Q
—
15.9
38.0
1.0
44.0
CL = 50 pF
(Trigger)
Pulse
width
tw
6.0
—
—
6.5
—
ns
A, B or CLR
Output
pulse
width
twQ
—
170
260
—
320
ns
CL = 50 pF,
Cext = 28 pF, Rext = 2 kΩ
90
100
110
90
110
µs
CL = 50 pF,
Cext = 0.01 µF, Rext = 10 kΩ
0.9
1.0
1.1
0.9
1.1
ms
CL = 50 pF,
Cext = 0.1 µF, Rext = 10 kΩ
∆twQ
6
—
±1
—
—
—
%
CL = 50 pF
HD74LV221A
Switching Characteristics (cont)
• VCC = 3.3 ± 0.3 V
Ta = 25°C
Ta = –40 to 85°C
Item
Symbol
Min
Typ
Max
Min
Max
Unit
Test Conditions
FROM
(Input)
TO
(Output)
Propagation
delay time
tPLH
tPHL
—
9.9
20.6
1.0
24.0
ns
CL = 15 pF
A or B
Q or Q
—
11.6
24.1
1.0
27.5
CL = 50 pF
—
8.3
15.8
1.0
18.5
CL = 15 pF
CLR
Q or Q
—
9.7
19.3
1.0
22.0
CL = 50 pF
—
9.9
22.4
1.0
26.0
CL = 15 pF
CLR
Q or Q
—
11.6
25.9
1.0
29.5
CL = 50 pF
(Trigger)
Pulse
width
tw
5.0
—
—
5.0
—
ns
A, B or CLR
Output
pulse
width
twQ
—
150
240
—
300
ns
CL = 50 pF,
Cext = 28 pF, Rext = 2 kΩ
90
100
110
90
110
µs
CL = 50 pF,
Cext = 0.01 µF, Rext = 10 kΩ
0.9
1.0
1.1
0.9
1.1
ms
CL = 50 pF,
Cext = 0.1 µF, Rext = 10 kΩ
∆twQ
—
±1
—
—
—
%
CL = 50 pF
7
HD74LV221A
Switching Characteristics (cont)
• VCC = 5.0 ± 0.5 V
Ta = 25°C
Ta = –40 to 85°C
Item
Symbol
Min
Typ
Max
Min
Max
Unit
Test Conditions
FROM
(Input)
TO
(Output)
Propagation
delay time
tPLH
tPHL
—
7.3
12.0
1.0
14.0
ns
CL = 15 pF
A or B
Q or Q
—
8.7
14.0
1.0
16.0
CL = 50 pF
—
6.2
9.4
1.0
11.0
CL = 15 pF
CLR
Q or Q
—
7.4
11.4
1.0
13.0
CL = 50 pF
—
7.3
12.9
1.0
15.0
CL = 15 pF
CLR
Q or Q
—
8.6
14.9
1.0
17.0
CL = 50 pF
(Trigger)
Pulse
width
tw
5.0
—
—
5.0
—
ns
A, B or CLR
Output
pulse
width
twQ
—
140
200
—
240
ns
CL = 50 pF,
Cext = 28 pF, Rext = 2 kΩ
90
100
110
90
110
µs
CL = 50 pF,
Cext = 0.01 µF, Rext = 10 kΩ
0.9
1.0
1.1
0.9
1.1
ms
CL = 50 pF,
Cext = 0.1 µF, Rext = 10 kΩ
∆twQ
8
—
±1
—
—
—
%
CL = 50 pF
HD74LV221A
Operating Characteristics
•
CL = 50 pF
Ta = 25°C
Item
Symbol
VCC (V)
Min
Typ
Max
Unit
Test Conditions
Power
dissipation
capacitance
CPD
3.3
—
74.0
—
pF
f = 10 MHz
5.0
—
86.0
—
Test Circuit
VCC
Cext
–
VCC
Input
Refer
to
Function
Table
Rext
Cext = 28 pF or 100 pF or 0.01 µF or 0.1 µF
Rext = 1 kΩ or 2 kΩ or 10 kΩ
+
Cext Rext/
Cext
A
VCC
Output
Q
C L = 15 pF or 50 pF
B
Q
CLR
GND
Output
C L = 15 pF or 50 pF
Note : C L includes the probe and jig capacitance.
9
HD74LV221A
Timing diagram
A
B
CLR
Rext/
Cext
Q
Q
tw
tw
tw
Caution in use
In order to prevent any malfunctions due to noise, connect a high frequency performance capacitor
between Vcc and GND, and keep the wiring between the external components and Cext, Rext/Cext
pins as short as possible.
Large values of Cext may cause problems when powering down the HD74LV221A because of the amount
of energy stored in the capacitoe. When a system containing diodes at pin 7 or pin15.
Current through the input protection diodes must be limited to 10 mA; therefore, the turn-off time of the Vcc
power supply must not be faster than t = Vcc • Cext/(20 mA). for example, if Vcc 5 V and Cext = 22 µF,
the Vcc supply must turn off no faster than t = (5 V) • (22 µF)/20mA = 5.5 ms. This is usually not a problem
because power supplies are heavily filtered and cannot discharge at this rate.
When a more rapid decrease of Vcc to zero volts occurs, the HD74LV221A may sustain damage. To avoid
this possibility, use an external calmping diode.
10
HD74LV221A
• Waveform – 1
Input A
tf
VCC
90%
50%
10%
GND
tr
VCC
90%
50%
Input B
10%
GND
tf
tr
90%
50%
Input CLR
10%
tr
90%
50%
10%
90%
50%
10%
VCC
GND
t w (L)
t PLH (trigger)
t PHL
VOH
Output Q
50% VCC
50% VCC
VOL
t PHL (trigger)
t PLH
VOH
Output Q
50% VCC
50% VCC
VOL
11
HD74LV221A
• Waveform – 2
tf
tr
90%
50%
Input A
10%
tr
90%
50%
10%
90%
50%
10%
t w (H)
tf
Input B
VCC
GND
t w (L)
tr
90%
50%
tf
90%
50%
10%
10%
t w (L)
VCC
90%
50%
10%
t w (H)
GND
VOH
Output Q
50% VCC
50% VCC
VOL
t w (out)
VOH
Output Q
50% VCC
50% VCC
VOL
Note: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, t r ≤ 3 ns, t f ≤ 3 ns
2. The output are measured one at a time with one transition per measurement.
12
HD74LV221A
Application Data
Vcc = 2.5 V
t WQ (µs)
10000.0
1000.0
Output pulse width
100.0
10.0
Rext
1 kΩ
10 kΩ
100 kΩ
1 MΩ
1.0
0.1
10
2
10
3
10
4
Timing capacitance
10
5
10
6
10
7
Cext (pF)
13
HD74LV221A
Vcc = 3.3 V
t WQ (µs)
10000.0
1000.0
Output pulse width
100.0
10.0
Rext
1 kΩ
10 kΩ
100 kΩ
1 MΩ
1.0
0.1
10
2
10
3
10
4
Timing capacitance
10
5
10
6
10
7
Cext (pF)
Vcc = 5.0 V
t WQ (µs)
10000.0
1000.0
Output pulse width
100.0
10.0
Rext
1 kΩ
10 kΩ
100 kΩ
1 MΩ
1.0
0.1
10
2
10
3
10
4
Timing capacitance
14
10
5
Cext (pF)
10
6
10
7
HD74LV221A
Rext = 2 kΩ
1.4
Coefficient of output pulse width
K
Cext
1000 pF
10000 pF
100000 pF
1000000 pF
1.3
1.2
1.1
1.0
0.9
0.8
2.0
2.5
3.0
3.5
4.0
Supply voltage
4.5
5.0
5.5
6.0
VCC (V)
Rext = 10 kΩ
1.4
Coefficient of output pulse width
K
Cext
1000 pF
10000 pF
100000 pF
1000000 pF
1.3
1.2
1.1
1.0
0.9
0.8
2.0
2.5
3.0
3.5
4.0
Supply voltage
4.5
5.0
5.5
6.0
VCC (V)
15
HD74LV221A
Package Dimensions
10.06
10.5 Max
9
1
8
1.27
0.42 ± 0.08
0.40 ± 0.06
0.10 ± 0.10
0.80 Max
0.22 ± 0.05
0.20 ± 0.04
2.20 Max
5.5
16
0.20
7.80 +– 0.30
1.15
0° – 8°
0.70 ± 0.20
0.15
0.12 M
Dimension including the plating thickness
Base material dimension
16
Hitachi Code
JEDEC
EIAJ
Weight (reference value)
FP-16DA
—
Conforms
0.24 g
HD74LV221A
Unit: mm
9.9
10.3 Max
9
1
8
0.635 Max
*0.42 ± 0.08
0.40 ± 0.06
0.15
*0.22 ± 0.03
0.20 ± 0.03
1.27
0.11
0.14 +– 0.04
1.75 Max
3.95
16
0.10
6.10 +– 0.30
1.08
0° – 8°
+ 0.67
0.60 – 0.20
0.25 M
*Dimension including the plating thickness
Base material dimension
Hitachi Code
JEDEC
EIAJ
Weight (reference value)
FP-16DN
Conforms
Conforms
0.15 g
17
HD74LV221A
5.0
5.3 Max
9
1
8
4.40
16
0.65
0.13 M
1.10 Max
0.65 Max
0.10
Dimension including the plating thickness
Base material dimension
18
6.40 ± 0.20
0.07 +0.03
–0.04
0.20 ± 0.06
1.0
0.17 ± 0.05
0.15 ± 0.04
0.08
0.22 +– 0.07
0° – 8°
0.50 ± 0.10
Hitachi Code
JEDEC
EIAJ
Weight (reference value)
TTP-16DA
—
—
0.05 g
HD74LV221A
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as in aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-safe
devices, so that the equipment incorporating the Hitachi product does not cause bodily injury, fire or
other consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
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Copyright © Hitachi, Ltd., 1998. All rights reserved. Printed in Japan.
19