HOLTEK HT1602

HT1602
40 Dot Matrix LCD Segment Driver
Features
•
•
•
Operating voltage: 4.5V~5.5V
LCD driving voltage: 8V~16V
Applicable LCD duty cycle from 1/8 to 1/64
•
•
Suitable for various types of LCD panel
Bias voltage adjustable from an external
source
•
•
Remote controllers
Calculators
Applications
•
•
Electronic dictionaries
Portable computers
General Description
then send them out as LCD driving waveforms
to the LCD panel. The HT1602 can be applied
up to 1/64 duty. Furthermore, the bias voltage
which determines the LCD driving voltage can
be optionally supplied from an external source,
thus the chip is suitable for driving various
types of LCD panel. These special features increase the versatility of the chip.
The HT1602 is a dot matrix LCD segment
driver LSI implemented in CMOS technology. It
is equipped with a 40-bit shift register (two
20-bit shift registers), a 40-bit latch (two 20-bit
latches), a 40-bit level shifter, a 40-bit 4-level
driver, and control circuits.
The HT1602 can convert serial data received
from an LCD controller to parallel data and
Block Diagram
1
28th Aug ’98
HT1602
Pad Assignment
Chip size: 164 × 164 (mil)2
* The IC substrate should be connected to VDD in the PCB layout artwork.
Pad Coordinates
Pad No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
X
–76.23
–76.23
–76.23
–76.23
–76.23
–76.23
–76.23
–76.23
–76.23
–76.23
–76.23
–76.23
–76.23
–66.33
–50.81
–42.26
–33.71
–25.16
Unit: mil
Y
76.23
68.13
60.03
51.93
43.83
35.73
–27.63
–35.73
–43.83
–51.93
–60.03
–68.13
–76.23
–76.23
–76.23
–76.23
–76.23
–76.23
Pad No.
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
X
–16.61
–8.10
0.5
9.10
17.60
26.15
34.70
43.25
51.89
75.78
75.78
75.78
75.78
75.78
75.78
75.78
75.78
75.78
2
Y
–76.23
–76.23
–76.23
–76.23
–76.23
–76.23
–76.23
–76.23
–76.23
–76.23
–67.14
–56.34
–46.62
–35.64
–24.75
–13.32
6.03
33.66
Pad No.
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
X
75.78
75.78
61.20
52.56
43.65
35.10
25.20
15.71
6.66
–3.06
–12.83
–21.60
–32.04
–42.48
–52.92
–62.15
Y
42.66
61.56
76.23
76.23
76.23
76.23
76.23
76.23
76.23
76.23
76.23
76.23
76.23
76.23
76.23
76.23
28th Aug ’98
HT1602
Pad Description
Pad No.
Pad Name
I/O
Description
1~26
Y14~Y39
O
LCD driver outputs for segments*
27
DO39
O
Shift register output for the 40th bit data
28
DI20
I
Input data of shift register 2
29
DO19
O
Shift register output for the 20th bit data
30
VEE
I
LCD power supply
31, 32
V3, V2
I
LCD bias supply voltage
33
VSS
—
Negative power supply
34
VDD
—
Positive power supply
35
CLK
I
Clock pulse input for the shift register
36
DI0
I
Input data of shift register 1
37
LOAD
I
Latching signal to latch shift register data
38
ALT
I
Alternate input signal for LCD driving waveforms
39~52
Y0~Y13
O
LCD driver outputs for segments*
*: For Y0~Y39, any of VDD, V2, V3 or VEE can be selected as a display driving source according
to the combination of latched data level and ALT signal. Refer to the following table:
Latched Data
H
L
ALT
Display Data Output Level
H
VEE
L
VDD
H
V3
L
V2
Absolute Maximum Ratings*
Supply Voltage ................................. –0.3V to 6V
Storage Temperature................. –50°C to 125°C
Input Voltage................. VSS–0.3V to VDD+0.3V
Operating Temperature............... –20°C to 70°C
*Note: These are stress ratings only. Stresses exceeding the range specified under “Absolute Maximum Ratings” may cause substantial damage to the device. Functional operation of this
device at other conditions beyond those listed in the specification is not implied and prolonged
exposure to extreme conditions may affect device reliability.
3
28th Aug ’98
HT1602
Ta=25°C
D.C. Characteristics
Symbol
Parameter
Test Conditions
VDD
Conditions
Min.
Typ.
Max.
Unit
VDD
Operating Voltage
—
—
4.5
—
5.5
V
IDD
Operating Current
5V
No load
—
100
300
µA
ISTB
Standby Current
5V
—
—
1
5
µA
fLCD
Max. Clock Frequency
5V
—
3.3
—
—
MHz
twCLK
Clock Pulse Width
5V
—
125
—
—
ns
VIL
“L” Input Voltage
5V
—
—
—
0.2VDD
V
VIH
“H” Input Voltage
5V
—
0.8VDD
—
—
V
VLCD
LCD Driving Voltage
5V
—
8
—
16
V
4
28th Aug ’98
HT1602
Timing Diagrams
1/64 duty and 1/9 bias (with the ALT changing polarity for every frame, a frame=64 commons)
5
28th Aug ’98
HT1602
Application Circuits
1/32 duty and 1/7 bias
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28th Aug ’98