TI TPS61093DSKT

TPS61093
www.ti.com.......................................................................................................................................................................................... SLVS992 – SEPTEMBER 2009
LOW INPUT BOOST CONVERTER WITH INTEGRATED POWER DIODE AND
INPUT/OUTPUT ISOLATION
FEATURES
1
•
•
•
•
•
•
•
•
•
DESCRIPTION
Input Range: 1.6-V to 6-V
Integrated Power Diode and Isolation FET
20-V Internal Switch FET With 1.1-A Current
Fixed 1.2-MHz Switching Frequency
Efficiency at 15-V Output up to 88%
Over Load and Over Voltage Protection
Programmable Soft Start-up
Load Discharge Path After IC Shutdown
2.5 × 2.5 × 0.8 mm SON Package
The TPS61093 is a 1.2-MHz, fixed-frequency boost
converter designed for high integration and high
reliability. The IC integrates a 20-V power switch,
input/output isolation switch, and power diode. When
the output current exceeds the over load limit, the
IC’s isolation switch opens up to disconnect the
output from the input. This protects the IC and the
input supply. The isolation switch also disconnects
the output from the input during shutdown to minimize
leakage current. When the IC is shutdown, the output
capacitor is discharged to a low voltage level by
internal diodes. Other protection features include
1.1-A peak over-current protection (OCP) at each
cycle, output over voltage protection (OVP), thermal
shutdown, and under voltage lockout (UVLO).
APPLICATIONS
•
•
•
Glucose Meter
OLED Power Supply
3.3-V to 12-V, 5-V to 12-V Boost Converter
With its 1.6-V minimum input voltage, the IC can be
powered by two alkaline batteries, a single Li-ion
battery, or 3.3-V and 5-V regulated supply. The
output can be boosted up to 17-V. The TPS61093 is
available in 2.5 mm × 2.5 mm SON package with
thermal pad.
VI 1.6 V to 6 V
L1
10 mH
C1
4.7 mF
C3
TPS61093
VIN
SW
CP1
VO
CP2
OUT
100 nF
R3
200 kW
EN
FB
SS
GND
C2
0.1 mF
C5
1 mF
VO 15 V/50 mA
R1
294 kW
C4
1 mF
R2
10.2 kW
Figure 1. Typical Application
ORDERING INFORMATION (1)
(1)
(2)
TA
PART NUMBER (2)
PACKAGE MARKING
–40°C to 85°C
TPS61093DSK
OAP
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com
The DSK package is available in tape and reel. Add R suffix (TPS61093DSKR) to order quantities of 3000 parts per reel, or add T suffix
(TPS61093DSKT) to order 250 parts per reel.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009, Texas Instruments Incorporated
TPS61093
SLVS992 – SEPTEMBER 2009.......................................................................................................................................................................................... www.ti.com
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
VALUE / UNITS
Supply voltage on pin VIN (2)
–0.3 V to 7 V
Voltage on pins CP2, EN, and SS (2)
–0.3 V to 7 V
Voltage on pin CP1 and FB
(2)
–0.3 V to 3 V
Voltage on pin SW, VO, and OUT (2)
HBM ESD Rating
–0.3 V to 20 V
(3)
2 kV
Operating temperature range, TA
–40°C to 85°C
Maximum operating junction temperature, TJ
150°C
Storage temperature, Tst
(1)
(2)
(3)
–55°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
The Human body model (HBM) is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin. The testing is done according
JEDECs EIA/JESD22-A114.
DISSIPATION RATINGS
(1)
PACKAGE
THERMAL
RESISTANCE
θJA (1)
THERMAL
RESISTANCE
θJP
THERMAL
RESISTANCE
θJC
POWER RATING
TA ≤ 25°C (1)
DERATING FACTOR ABOVE
TA = 25°C (1)
DSK
60.6°C/W
6.3°C/W
40°C/W
1650 mW
17 mW/°C
Thermal ratings are determined assuming a high K PCB design according to JEDEC standard JESD51-7.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN
Vi
Input voltage range
Vo
Output voltage range at VO pin
L
Inductor (1)
Cin
Input capacitor
NOM
1.6
2.2
MAX
6
4.7
V
10
µH
µF
Output capacitor at OUT pin
Cfly
Flying capacitor at CP1 and CP2 pins
TJ
Operating junction temperature
–40
125
°C
TA
Operating free-air temperature
–40
85
°C
2
10
µF
Co
(1)
1
V
17
4.7
(1)
UNIT
10
nF
These values are recommended values that have been successfully tested in several applications. Other values may be acceptable in
other applications but should be fully tested by the user.
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ELECTRICAL CHARACTERISTICS
VIN = 3.6 V, EN = VIN, TA = –40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY CURRENT
VIN
Input voltage range, VIN
1.6
IQ
Operating quiescent current into VIN
Device PWM switching no load
ISD
Shutdown current
EN = GND, VIN = 6 V
UVLO
Undervoltage lockout threshold
VIN falling
Vhys
Undervoltage lockout hysterisis
6
0.9
1.5
V
1.5
mA
1
µA
1.55
V
50
mV
ENABLE AND PWM CONTROL
VENH
EN logic high voltage
VIN = 1.6 V to 6 V
VENL
EN logic low voltage
VIN = 1.6 V to 6 V
REN
EN pull down resistor
Toff
EN pulse width to shutdown
1.2
V
0.3
400
800
EN high to low
V
1600
kΩ
1
ms
VOLTAGE CONTROL
VREF
Voltage feedback regulation voltage
IFB
Voltage feedback input bias current
fS
Oscillator frequency
Dmax
Maximum duty cycle
Tmin_on
Minimum on pulse width
0.49
VFB = 0.1 V, TA = 85°C
0.5
1.0
1.2
90%
93%
0.51
V
100
nA
1.4
MHz
65
ns
POWER SWITCH, ISOLATION FET
RDS(ON)N
N-channel MOSFET on-resistance
VIN = 3 V
0.25
0.4
Ω
RDS(ON)iso
Isolation FET on-resistance
VO = 5 V
2.5
4
Ω
VO = 3.5 V
4.5
1
µA
1
µA
ILN_N
N-channel leakage current
VDS = 20 V, TA = 25°C
ILN_iso
Isolation FET leakage current
VDS = 20 V, TA = 25°C
VF
Power diode forward voltage
Current = 500 mA
0.8
V
OC, ILIM, OVP SC AND SS
ILIM
N-Channel MOSFET current limit
Vovp
Over voltage protection threshold
Vovp_hys
Over voltage protection hysteresis
IOL
Over load protection
Measured on the VO pin
0.9
1.1
18
19
V
0.6
V
300
mA
200
1.5
A
THERMAL SHUTDOWN
Tshutdown
Thermal shutdown threshold
150
°C
Thysteresis
Thermal shutdown hysteresis
15
°C
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TPS61093
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DEVICE INFORMATION
PIN ASSIGNMENTS
TOP VIEW
GND
1
10
VIN
VO
SW
Thermal
Pad
CP2
OUT
CP1
FB
EN 5
6
SS
10-PIN 2.5mm x 2.5mm QFN
PIN FUNCTIONS
PIN
NAME
NO.
I/O
DESCRIPTION
VIN
2
I
IC Supply voltage input.
VO
10
O
Output of the boost converter. When the output voltage exceeds the over voltage protection (OVP)
threshold, the power switch turns off until VO drops below the over voltage protection hysteresis.
OUT
8
O
Isolation switch is between this pin and VO pin. Connect load to this pin for input/output isolation during
IC shutdown. See WITHOUT ISOLATION FET for the tradeoff between isolation and efficiency.
1
–
Ground of the IC.
GND
CP1, CP2
3, 4
Connect to flying capacitor for internal charge pump.
EN
5
I
Enable pin (HIGH = enable). When the pin is pulled low for 1 ms, the IC turns off and consumes less
than 1-µA current.
SS
6
I
Soft start pin. A RC network connecting to the SS pin programs soft start timing. See START UP.
FB
7
I
Voltage feedback pin for output regulation, 0.5-V regulated voltage. An external resistor divider
connected to this pin programs the regulated output voltage.
SW
9
I
Switching node of the IC where the internal PWM switch operates.
Thermal Pad
–
–
It should be soldered to the ground plane. If possible, use thermal via to connect to ground plane for
ideal power dissipation.
4
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FUNCTIONAL BLOCK DIAGRAM
FB
EN
CP2
CP1
SW
OUT
VO
Soft
Startup
Ref.
C/P
EA
Gate
Driver
PWM Control
Gate
Driver
EN
Precharge
On/off control
Oscillator
Ramp
Generator
+
Current Sensor
SS
GND
VIN
TYPICAL CHARACTERISTICS
TABLE OF GRAPHS
Figure 1, L = TOKO #A915_Y-100M, unless otherwise noted
FIGURE
η
Efficiency
vs Load current at OUT = 15 V
2
η
Efficiency
vs Load current at OUT = 10 V
3
VFB
FB voltage
vs Free-air temperature
4
VFB
FB voltage
vs Input voltage
5
ILIM
Switch current limit
vs Free-air temperature
6
Line transient response
VIN = 3.3 V to 3.6 V; Load = 50 mA
7
Load transient response
VIN = 2.5 V; Load = 10 mA to 50 mA; Cff = 100 pF
8
PWM control in CCM
VIN = 3.6 V; Load = 50 mA
9
PWM control in DCM
VIN = 3.6 V; Load = 1 mA
10
Pulse skip mode
VIN = 4.5 V; OUT = 10 V; No load
11
Soft start-up
VIN = 3.6 V; Load = 50 mA
12
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TPS61093
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EFFICIENCY
vs
LOAD
EFFICIENCY
vs
LOAD
100
100
OUT = 15 V
95
85
85
80
80
75
VI = 2.5 V
70
VI =1.8 V
65
70
55
55
50
50
45
45
100
40
1
1000
VI = 2.5 V
VI =1.8 V
65
60
10
VI = 3.3 V
75
60
40
1
VI = 4.2 V
90
VI = 3.3 V
Efficiency - %
Efficiency - %
90
OUT = 10 V
95
VI = 4.2 V
10
Load - mA
Figure 2.
100
1000
Load - mA
Figure 3.
FB VOLTAGE
vs
FREE-AIR TEMPERATURE
FB VOLTAGE
vs
INPUT VOLTAGE
0.502
502
501.5
0.501
VFB - mV
VFB - V
501
0.5
500.5
500
0.499
499.5
0.498
-40
-20
0
20
40
60
80
TA - Free-Air Temperature - ºC
100
120
499
1.6
Figure 4.
6
2
2.4 2.8 3.2 3.6 4 4.4 4.8 5.2 5.6
VI - Input Voltage - V
6
Figure 5.
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SWITCH CURRENT LIMIT
vs
FREE-AIR TEMPERATURE
3.3V to 3.6V LINE TRANSIENT RESPONSE
1.3
OUT
500 mV/div; AC
ILIM - A
1.2
1.1
Inductor Current
200 mA/div
1
0.9
0.8
-40
-20
0
20
40
60
80
TA - Free-Air Temperature - ºC
100
t - Time = 1 ms/div
120
Figure 6.
Figure 7.
10mA to 50mA LOAD TRANSIENT RESPONSE
PWM CONTROL IN CCM
OUT with Cff
500 mV/div; AC
OUT
100 mV/div; AC
OUT without Cff
500 mV/div; AC
SW
10 V/div
Inductor Current
200 mA/div
Load
20 mA/div
t - Time = 1 ms/div
t - Time = 400 ns/div
Figure 8.
Figure 9.
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TPS61093
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PWM CONTROL IN DCM
PULSE SKIP MODE AT LIGHT LOAD
OUT
50 mV/div; AC
OUT
100 mV/div; AC
SW
10 V/div
SW
10 V/div
Inductor Current
20 mA/div
Inductor Current
100 mA/div
t - Time = 1 ms/div
t - Time = 200 ns/div
Figure 10.
Figure 11.
SOFT START-UP
VO
5 V/div
Inductor Current
100 mA/div
OUT
5 V/div
t - Time = 40 ms/div
Figure 12.
DETAILED DESCRIPTION
OPERATION
The TPS61093 is a highly integrated boost regulator for up to 17-V output. In addition to the on-chip 1-A PWM
switch and power diode, this IC also integrates an output-side isolation switch as shown in the functional block
diagram. One common issue with conventional boost regulators is the conduction path from input to output even
when the PWM switch is turned off. It creates three problems, which are inrush current during start-up, output
leakage current during shutdown, and excessive over load current. In the TPS61093, the isolation switch turns
off under shutdown-mode and over load conditions, thereby opening the current path. However, shorting the VO
and OUT pins bypasses the isolation switch and enhances efficiency.
The TPS61093 adopts current-mode control with constant pulse-width-modulation (PWM) frequency. The
switching frequency is fixed at 1.2-MHz typical. PWM operation turns on the PWM switch at the beginning of
each switching cycle. The input voltage is applied across the inductor and the inductor current ramps up. In this
mode, the output capacitor is discharged by the load current. When the inductor current hits the threshold set by
8
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the error amplifier output, the PWM switch is turned off, and the power diode is forward-biased. The inductor
transfers its stored energy to replenish the output capacitor. This operation repeats in the next switching cycle.
The error amplifier compares the FB-pin voltage with an internal reference, and its output determines the duty
cycle of the PWM switching. This closed-loop system requires frequency compensation for stable operation. The
device has a built-in compensation circuit that can accommodate a wide range of input and output voltages. To
avoid the sub-harmonic oscillation intrinsic to current-mode control, the IC also integrates slope compensation,
which adds an artificial slope to the current ramp.
SHUTDOWN AND LOAD DISCHARGE
When the EN pin is pulled low for 1-ms, the IC stops the PWM switch and turns off the isolation switch, providing
isolation between input and output. The internal current path consisting of the isolation switch’s body diode and
several parasitic diodes quickly discharges the output voltage to less than 3.3-V. Afterwards, the voltage is slowly
discharged to zero by the leakage current. This protects the IC and the external components from high voltage in
shutdown mode.
In shutdown mode, less than 1-µA of input current is consumed by the IC.
OVER LOAD AND OVER VOLTAGE PROTECTION
If the over load current passing through the isolation switch is above the over load limit (IOL) for 3-µs (typ), the
TPS61093 is switched off until the fault is cleared and the EN pin toggles. The function only is triggered 52-ms
after the IC is enabled.
To prevent the PWM switch and the output capacitor from exceeding maximum voltage ratings, an over voltage
protection circuit turns off the boost switch as soon as the output voltage at the VO pin exceeds the OVP
threshold. Simultaneously, the IC opens the isolation switch. The regulator resumes PWM switching after the VO
pin voltage falls 0.6-V below the threshold.
UNDER VOLTAGE LOCKOUT (UVLO)
An under voltage lockout prevents improper operation of the device for input voltages below 1.55-V. When the
input voltage is below the under voltage threshold, the entire device, including the PWM and isolation switches,
remains off.
THERMAL SHUTDOWN
An internal thermal shutdown turns off the isolation and PWM switches when the typical junction temperature of
150°C is exceeded. The thermal shutdown has a hysteresis of 15°C, typical.
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APPLICATION INFORMATION
SWITCH DUTY CYCLE
The maximum switch duty cycle (D) of the TPS61093 is 90% (minimum). The duty cycle of a boost converter
under continuous conduction mode (CCM) is given by:
Vout + 0.8 V - Vin
D=
Vout + 0.8 V
(1)
The duty cycle must be lower than the specification in the application; otherwise the output voltage cannot be
regulated.
The TPS61093 has a minimum ON pulse width once the PWM switch is turned on. As the output current drops,
the device enters discontinuous conduction mode (DCM). If the output current drops extremely low, causing the
ON time to be reduced to the minimum ON time, the TPS61093 enters pulse-skipping mode. In this mode, the
device keeps the power switch off for several switching cycles to keep the output voltage in regulation. See
Figure 11. The output current when the IC enters skipping mode is calculated with Equation 2.
Iout_skip =
2
Vin2 ´ Tmin_on
´ fSW
2 ´ (Vout + 0.8V - Vin) ´ L
(2)
Where
Tmin_on = Minimum ON pulse width specification (typically 65-ns);
L = Selected inductor value;
fSW = Converter switching frequency (typically 1.2-MHz)
OUTPUT PROGRAM
To program the output voltage, select the values of R1 and R2 (see Figure 13) according to Equation 3.
æ R1 ö
Vout = 1.229 V ´ ç
+1÷
è R2 ø
æ Vout
ö
- 1÷
R1 = R2 ´ ç
1.229V
è
ø
(3)
A recommended value for R2 is approximately 10-kΩ which sets the current in the resistor divider chain to
1.229V/10kΩ = 123-µA. The output voltage tolerance depends on the VFB accuracy and the resistor divider.
C2
C2
VO
OUT
TPS61093
VO
Cff
Option
R1
C4
OUT
TPS61093
FB
R1
Cff
Option
FB
R2
R2
(a) With isolation FET
(b) Without isolation FET
Figure 13. Resistor Divider to Program Output Voltage
10
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WITHOUT ISOLATION FET
The efficiency of the TPS61093 can be improved by connecting the load to the VO pin instead of the OUT pin.
The power loss in the isolation FET is then negligible, as shown in Figure 13. The tradeoffs when bypassing the
isolation FET are:
• Leakage path between input and output causes the output to be a diode drop below the input voltage when
the IC is in shutdown
• No overload circuit protection
When the load is connected to the VO pin, the output capacitor on the VO pin should be above 1-µF.
100
VIN = 4.2 V,
Output = 15 V
95
90
Without isolation
85
Efficiency - %
80
With isolation
75
70
65
60
55
50
45
40
0
50
100
150
200
Load - mA
250
300
START UP
The TPS61093 turns on the isolation FET and PWM switch when the EN pin is pulled high. During the soft start
period, the R and C network on the SS pin is charged by an internal bias current of 5-µA (typ). The RC network
sets the reference voltage ramp up slope. Since the output voltage follows the reference voltage via the FB pin,
the output voltage rise time follows the SS pin voltage until the SS pin voltage reaches 0.5-V. The soft start time
is given by Equation 4.
0.5 V ´ C5
tSS =
5 mA
(4)
Where C5 is the capacitor connected to the SS pin.
When the EN pin is pulled low to switch the IC off, the SS pin voltage is discharged to zero by the resistor R3.
The discharge period depends on the RC time constant. Note that if the SS pin voltage is not discharged to zero
before the IC is enabled again, the soft start circuit may not slow the output voltage startup and may not reduce
the startup inrush current.
INDUCTOR SELECTION
Because the selection of the inductor affects steady state operation, transient behavior, and loop stability, the
inductor is the most important component in power regulator design. There are three important inductor
specifications, inductor value, saturation current, and dc resistance. Considering inductor value alone is not
enough.
The saturation current of the inductor should be higher than the peak switch current as calculated in Equation 5.
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IL_peak = IL_DC +
IL_DC =
DIL =
D IL
2
Vout ´ Iout
Vin ´ h
1
1
1 öù
é
æ
+
êL ´ ¦SW ´ ç
÷ú
è Vout + 0.8 V - VIN VIN ø û
ë
(5)
Where
IL_peak = Peak switch current
IL_DC = Inductor average current
ΔIL = Inductor peak to peak current
η = Estimated converter efficiency
Normally, it is advisable to work with an inductor peak-to-peak current of less than 30% of the average inductor
current. A smaller ripple from a larger valued inductor reduces the magnetic hysteresis losses in the inductor and
EMI. But in the same way, load transient response time is increased. Also, the inductor value should not be
outside the 2.2-µH to 10-µH range in the recommended operating conditions table. Otherwise, the internal slope
compensation and loop compensation components are unable to maintain small signal control loop stability over
the entire load range. Table 1 lists the recommended inductor for the TPS61093.
Table 1. Recommended Inductors for the TPS61093
PART NUMBER
L
(µH)
DCR MAX
(mΩ)
SATURATION
CURRENT (A)
SIZE (L×W×H mm)
VENDOR
#A915_Y-4R7M
4.7
#A915_Y-100M
10
45
1.5
5.2x5.2x3.0
Toko
90
1.09
5.2x5.2x3.0
VLS4012-4R7M
Toko
4.7
132
1.1
4.0x4.0x1.2
TDK
VLS4012-100M
10
240
0.82
4.0x4.0x1.2
TDK
CDRH3D23/HP
10
198
1.02
4.0x4.0x2.5
Sumida
LPS5030-103ML
10
127
1.4
5.0x5.0x3.0
Coilcraft
INPUT AND OUTPUT CAPACITOR SELECTION
The output capacitor is mainly selected to meet the requirements for output ripple and loop stability. This ripple
voltage is related to the capacitor’s capacitance and its equivalent series resistance (ESR). Assuming a ceramic
capacitor with zero ESR, the minimum capacitance needed for a given ripple can be calculated by:
D ´ Iout
Cout =
Fs ´ Vripple
(6)
Where Vripple = peak to peak output ripple. The ESR impact on the output ripple must be considered if tantalum
or electrolytic capacitors are used.
Care must be taken when evaluating a ceramic capacitor’s derating under dc bias, aging, and ac signal. For
example, larger form factor capacitors (in 1206 size) have their self resonant frequencies in the range of the
switching frequency. So the effective capacitance is significantly lower. The dc bias can also significantly reduce
capacitance. A ceramic capacitor can lose as much as 50% of its capacitance at its rated voltage. Therefore,
always leave margin on the voltage rating to ensure adequate capacitance at the required output voltage.
A 4.7-µF (minimum) input capacitor is recommended. The output requires a capacitor in the range of 1 µF to 10
µF. The output capacitor affects the small signal control loop stability of the boost regulator. If the output
capacitor is below the range, the boost regulator can potentially become unstable.
The popular vendors for high value ceramic capacitors are:
• TDK (http://www.component.tdk.com/components.php)
• Murata (http://www.murata.com/cap/index.html)
12
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SMALL SIGNAL STABILITY
The TPS61093 integrates slope compensation and the RC compensation network for the internal error amplifier.
Most applications will be control loop stable if the recommended inductor and input/output capacitors are used.
For those few applications that require components outside the recommended values, the internal error
amplifier’s gain and phase are presented in Figure 14.
80
180
VFB
VEA
135
Phase
60
90
Gain - dB
45
20
Gain
0
fzea
0
fp-ea
-45
Phase - deg
40
-90
-20
-135
-40
10
100
1k
10k
f - Frequency - Hz
100k
-180
1M
Figure 14. Bode Plot of Error Amplifier Gain and Phase
The RC compensation network generates a pole fp-ea of 57-kHz and a zero fz-ea of 1.9-kHz, shown in Figure 14.
Use Equation 7 to calculate the output pole, fP, of the boost converter. If fP << fz-ea. due to a large capacitor
beyond 10 µF, for example, a feed forward capacitor on the resistor divider, as shown in Figure 14, is necessary
to generate an additional zero fz-f. to improve the loop phase margin and improve the load transient response.
The low frequency pole fp-f and zero fz-f generated by the feed forward capacitor are given by Equation 8 and
Equation 9:
¦P =
¦ p-f =
¦ z-f =
1
p × Ro × CO
(a)
(7)
1
2 p ´ R2 ´ C ff
(b)
1
2 p ´ R1 ´ C ff
(c)
(8)
(9)
Where Cff = the feed-forward capacitor.
For example, in the typical application circuitry (see Figure 1), the output pole fP is approximately 1-kHz. When
the output capacitor is increased to 100-µF, then the fP is reduced to 10-Hz. Therefore, a feed-forward capacitor
of 10-nF compensates for the low frequency pole.
A feed forward capacitor that sets fz-f near 10-kHz improves the load transient response in most applications, as
shown in Figure 8.
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Product Folder Link(s): TPS61093
13
TPS61093
SLVS992 – SEPTEMBER 2009.......................................................................................................................................................................................... www.ti.com
LAYOUT CONSIDERATIONS
As for all switching power supplies, especially those running at high switching frequency and high currents,
layout is an important design step. If layout is not carefully done, the regulator could suffer from instability as well
as noise problems. To maximize efficiency, switch rise and fall times are very fast. To prevent radiation of high
frequency noise (e.g., EMI), proper layout of the high frequency switching path is essential. Minimize the length
and area of all traces connected to the SW pin and always use a ground plane under the switching regulator to
minimize interplane coupling. The high current path including the switch and output capacitor contains
nanosecond rise and fall times and should be kept as short as possible. The input capacitor needs not only to be
close to the VIN pin, but also to the GND pin in order to reduce input supply ripple.
L1
C1
Vin
C2
VO
GND
P
al
erm
Th
VIN
CP2
C3
CP1
Minimize the
area of SW
trace
SW
Vout
OUT
R1
FB
C4
ad
SS
EN
R2
Place enough
VIAs around
thermal pad to
enhace thermal
performance
GND
R3
C5
ADDITIONAL APPLICATION
15-V Boost Converter with 100-µF Output Capacitor
Vin 1.8V to 6V
L1
10mH
C1
TPS61093
4.7mF
C3 100nF
R3
200kW
14
C5
1 mF
VIN
SW
CP1
VO
CP2
OUT
EN
FB
SS
GND
C2 0.1mF
Vo 15V/50mA
R1
294kW
C6
10nF
C4
100mF
R2
10.2kW
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Product Folder Link(s): TPS61093
TPS61093
www.ti.com.......................................................................................................................................................................................... SLVS992 – SEPTEMBER 2009
10 V, –10 V Dual Output Boost Converter
-10V/50mA
Vin 3.3V
L1
C4
C6
4.7mF
10mH
C1
4.7mF
0.1mF
TPS61093
C2
4.7mF
BAT54S
C3 100nF
R3
200kW
VIN
SW
CP1
VO
CP2
OUT
EN
FB
SS
GND
C5
1 mF
10V/50mA
R1
190kW
R2
10.2kW
+10V OUTPUT
5V/DIV
-10V OUTPUT
5V/DIV
Inductor Current
500mA/DIV
t - Time = 40 ms/div
Figure 15. Soft Startup Waveform, 10 V, -10 V Dual Output Boost Converter
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15
PACKAGE OPTION ADDENDUM
www.ti.com
12-Oct-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TPS61093DSKR
ACTIVE
SON
DSK
10
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS61093DSKT
ACTIVE
SON
DSK
10
250
CU NIPDAU
Level-1-260C-UNLIM
Green (RoHS &
no Sb/Br)
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
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to Customer on an annual basis.
Addendum-Page 1
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