GL6962/GL6962A GL6962/GL6962A Low Voltage Universal Speech Network Description PIN Configuration The GL6962 and GL6962A are bipolar integrated circuits that perform all speech and line interface functions required in fully electronic telephone sets. They perform electronic switching between dialing and speech. The ICs operate at line voltage down to 1.6V DC (with reduced performance) to facilitate the use of more telephone sets connected in parallel. (TOP View) Features Low DC line voltage: operates down to 1.6V (excluding polarity guard) Voltage regulator with adjustable static resistance Provides a supply for external circuits Symmetrical high-impedance inputs (64k¥ Ø ) for dynamic, magnetic or piezo-electric microphones Asymmetrical high-impedance inputs(32k¥ Ø ) for electric microphones DTMF signal input with confidence tone MUTE input for pulse or DTMF dialing (GL6962) MUTE input for pulse or DTMF dialing (GL6962A) Receiving amplifier for dynamic, magnetic or piezo-electric earpieces. Large gain setting ranges on microphone and earpiece amplifiers. Line loss compensation (line current dependent) for microphone and earpiece amplifiers Gain control curve adaptable to exchange supply DC line voltage adjustment facility Packaged in 16 DIP/SOP. LN 1 16 SLPE TGA1 2 15 AGC TGA2 3 14 REG QR 4 13 VCC GL6962 RGA 5 12 MUTE MIC- 6 11 DTMF MIC+ 7 10 IR Iref 8 9 VEE * Pin 12 is active LOW(MUTE) for GL6962A 1 GL6962/GL6962A Block Diagram VCC LN 13 1 RGC 5 RGA IR 10 - 4 QR + TGC MIC 7 + MIC- 6 _ 2 TGA1 - + dB DTMF 11 RM + _ 3 TGA2 (1) MUTE 12 MUTE CONTROL SUPPLY & REFERENCE LOW VOLTAGE CIRCUIT RGC TGC CURRENT REFERENCE * RM Ó CURRENT CONTROL 9 8 15 14 16 VEE Iref AGC REG SLPE Pin 12 is active LOW ( MUTE ) for GL6962A. 2 GL6962/GL6962A Pin Description PIN NUMBER SYMBOL DESCRIPTION 1 LN 2 TGA1 Gain adjustment: transmitting amplifier 3 TGA2 Gain adjustment: transmitting amplifier 4 QR 5 RGA Gain adjustment: receiving amplifier 6 MIC- Inverting microphone input 7 MIC+ Non-Inverting microphone input 8 Iref Current stabilizer 9 VEE Negative line terminal 10 IR Receiving amplifier input 11 DTMF Dual-tone multi-frequency input 12 MUTE Mute input (1) 13 VCC Positive decoupling 14 REG Voltage regulator decoupling 15 AGC Automatic gain control input 16 SLPE Slope (DC resistance) adjustment. Positive line terminal Non-inverting output: receiving amplifier (1) Pin 12 is active LOW ( MUTE ) for GL6962A. 3 GL6962/GL6962A Absolute Maximum Ratings SYMBOL VLN Iline Vi Ptot Tamb Tstg PARAMETER Positive continuous line voltage Line Current R9 = 20 ; Note1 GL6962 ; GL6962A Input voltage on all other pins Positive input voltage Negative input voltage Total power dissipation R9 = 20 ; Note2 GL6962 ; GL6962A Operating ambient temperature Storage temperature MIN - MAX 12 UNIT V - 140 mA - VCC+0.7 -0.7 V V -25 -40 666 +75 +125 mW ¡ É ¡ É Maximum Ratings are those values beyond which damage to the device may occur. Functional Operation should be restricted to the limits in the Electrical Characteristics tables or pin Descriptions section Notes to the Absolute Maximum Ratings 1. 2. Mostly dependent on the maximum required Tamb and on the voltage between LN and SLPE. Calculated for the maximum ambient temperature specified Tamb = 75¡ É and maximum junction temperature of 125¡ É. 4 GL6962/GL6962A Electrical Characteristics Iline = 11 to 140 mA, VEE = 0V, f = 800Hz; Tamb = 25¡ É; unless otherwise specified SYMBOL PARAMETER Supplies LN and VCC (Pin 1 and 13) VLN Voltage drop over circuit Between LN and VEE VLN ICC VCC Voltage drop over circuit between LN and VEE with external resistor RVA Supply current Supply voltage available for peripheral circuitry GL6962 CONDITION MIC inputs open circuit Iline = 1mA Iline = 4mA Iline = 15mA Iline = 100mA Iline = 140mA Iline = 15mA RVA(LN to REG)=68 k§ Ù RVA(REG to SLPE)=39k§ Ù VCC = 2.8V Iline = 15mA MUTE = HIGH IP = 1.2mA IP = 0mA GL6962A MUTE = LOW IP = 1.2mA IP = 0mA Microphone inputs MIC- and MIC+ (pin 6 and 7) | Zi | Input inpedance Between MIC- and MIC+ Differential MIC- or MIC+ to VEE Single-ended CMRR Common mode rejection ratio GV Voltage gain MIC+ or MIC- Iline = 15mA to LN R7 = 68k§ Ù ¥ Ä Gvf Gain variation with f = 300 and 3400 Hz frequency referred to 800Hz 5 MIN TYP MAX UNIT 3.55 4.9 - 1.6 1.9 4.0 5.7 - 4.25 6.5 7.5 V V V V V - 3.5 4.5 0.9 1.35 V V mA 2.2 - 2.7 3.4 - V V 2.2 - 2.7 3.4 - V V - 64 34 82 - k§ Ù k§ Ù 50.5 52.0 53.5 dB - ¡ ¾ 0.2 - dB dB GL6962/GL6962A SYMBOL PARAMETER DTMF input (pin 11) | Zi | Input impedance GV Voltage gain from DTMF to LN CONDITION Iline = 15mA R7 = 68k§ Ù ¥ Ä Gvf Gain variation with frequency referred to 800f = 300 and 3400 Hz Hz Gain adjustment input TGA1 and TGA2 (pin 2 and 3) ¥ Ä Gv Transmitting amplifier gain variation by adjustment of R7 between TGA1 and TGA2 Sending adjustment output LN (pin 1) VLN(RMS) Output voltage (RMS value) THD = 10% Iline = 4mA Iline = 15mA Vno(RMS) Noise output voltage Iline = 15mA (RMS value) R7 = 68 k§ Ù MIN TYP MAX UNIT 24.0 22 25.5 27.0 k§ Ù - ¡ ¾ 0.2 - dB -8 - 0 dB 1.7 - 0.8 2.3 -69 - - dB - V V dBmp 22 - k§ Ù 29.5 4 31.0 32.5 ¥ Ø dB - ¡ ¾ 0.2 - dB 200 § Ù between MICand MIC+; psophometrically weighted Receiving amplifier input IR (pin 10) | Zi | Input impedance Receiving amplifier output QR (pin 4) | Zo | Output impedance GV Voltage gain from IR to QR ¥ Ä Gvf Iline = 15mA RL =300 ¥ Ø (from pin 9 to pin4) Gain variation with frequency referred to f = 300 and 3400 800Hz Hz 6 GL6962/GL6962A SYMBOL Vo(RMS) PARAMETER Output voltage(RMS value) CONDITION THD = 2 % sinewave drive ; R4 = 100k¥ Ø Iline = 15mA ; Ip = 0mA ; RL = 150 ¥ Ø RL= 150 ¥ Ø MIN TYP MAX UNIT 0.22 0.3 0.33 0.48 - V V Vo(RMS) Output voltage(RMS value) THD = 10% ; R4 = 100 k¥ Ø; RL = 150 ¥ Ø Iline = 4mA - 15 - mV Vno(RMS) Noise output voltage (RMS value) Iline = 15mA ; R4 =100 k¥ Ø; IR open-circuit psophometrically weighted RL =300 ¥ Ø - 50 - •V -11 - 0 dB Gain adjustment input RGA (pin 5) ¥ ÄGv Receiving amplifier gain Variation by adjustment of R4 between RGA and QR MUTE input (pin 12) VIH HIGH level input voltage 1.5 - VCC V VIL LOW level input voltage - - 0.3 V Input current - 8 15 µA - -19 -19 - dB dB IMUTE Reduction of gain Gv Voltage gain from DTMF to QR GL6962 GL6962A R4 =100 k¥ Ø; RL = 300 ¥ Ø MUTE = HIGH MUTE = LOW Automatic gain control input AGC (pin 15) ¥ ÄGv Controlling the gain from IR to QR and the gain from MIC+, MIC- to LN Gain control range R6 =100 K¥ ø (between AGC and VEE) Iline = 70mA 7 - - -5.8 - dB GL6962/GL6962A Test Circuit Iline R1 620¥ Ø 1 100•F + 10 VO 13 LN IR VCC 4 QR R4 100k¥ Ø 11 C4 100pF RL 600¥ Ø DTMF 5 RGA GL6962A C7 1 nF 12 C1 + 100•F MUTE MIC+ 7 10 to 140mA + Vi 10•F MIC6 SLPE R9 20¥ Ø TGA1 TGA2 16 2 3 C6 100pF R7 68k¥ Ø REG 14 C3 4.7•F C8 1 nF AGC Iref 15 VEE 8 9 Vi + R6 R5 3. 6k ¥ Ø For measuring gain from MIC+ and MIC-, the MUTE input should be LOW or open-circuit. For measuring the DTMF input, the MUTE input should be HIGH. Inputs not being tested should be open-circuit. Fig. 1 Test circuit for defining GL6962 voltage gain of MIC+, MIC- and DTMF inputs. (Voltage gain is defined as GV = 20log |Vo/Vi| 8 GL6962/GL6962A Iline R1 620¥ Ø 1 100•F + 10 VO 13 LN IR VCC 4 QR R4 100k¥ Ø 11 C4 100pF RL 600¥ Ø DTMF 5 RGA GL6962A C7 1 nF 12 C1 + 100•F MUTE MIC+ 7 10 to 140mA + Vi 10•F MIC6 SLPE R9 20¥ Ø TGA1 TGA2 16 2 3 C6 100pF R7 68k¥ Ø C8 1 nF REG 14 C3 4.7•F AGC Iref 15 VEE 8 9 + R6 R5 3. 6k ¥ Ø For measuring gain from MIC+ and MIC-, the MUTE input should be HIGH. For measuring the DTMF input, the MUTE input should be LOW or open-circuit. Inputs not being tested should be open-circuit. Fig. 2 Test circuit for defining GL6962A voltage gain of MIC+, MIC- and DTMF inputs. (Voltage gain is defined as GV = 20log |Vo/Vi| 9 GL6962/GL6962A line R1 + 620¥ Ø 1 100•F 13 10 V ¥ Ø CC IR 10µ ZL 11 DTMF C2 4 QR R4 100k¥ Ø C4 100pF GL6962 5 C7 1 nF 140mA MIC+ Vi 6 + MICSLPE TGA1 REG 2 100pF 3 R7 ¥ Ø 15 C3 4.7•F C8 1 nF R9 ¥ Ø Fig. 3 Test circuit for defining GL696 (Voltage gain is defined as G = 20log | 10 AGC ref EE 8 + R5 3. 6k ¥ Ø o/V | C1 100• GL6962/GL6962A Iline R1 + 620¥ Ø 1 100•F 10 VO 600¥ Ø + LN IR 10µF 13 VCC ZL 11 DTMF C2 4 QR 100k C4 100pF GL6962A 12 MUTE 5 RGA C7 10 to 140mA 7 MIC+ Vi 6 + MICSLPE TGA1 TGA2 16 2 3 C6 100pF R7 68k¥ Ø R9 20¥ Ø 1 nF REG 14 4.7•F AGC Iref 15 VEE 8 9 + R6 R5 ¥ Ø Fig. 4 Test circuit for defining GL6962A voltage gain of receiving amplifier. (Voltage gain is defined as GV = 20log |Vo/Vi| 11 C1 100•F GL6962/GL6962A Application Circuit R1 620¥ Ø R2 130K R 10 13µ 1 12V C5 C2 C1 100µF 10 LN IR VCC 100nF 11 4 DTMF QR Telephone Line R4 + 13 from dial and control circuit C4 100pF GL6962 5 R3 3.92k RGA 12 (1) C7 1 nF 7 6 MIC+ MICSLPE TGA1 TGA2 2 3 16 C6 R8 MUTE REG 14 AGC Iref 15 VEE 8 9 R7 390 RVA(R16-14) R6 Zbal R9 20¥ Ø (1) C8 1 nF + R5 3. 6k ¥ Ø C3 4.7•F Pin 12 is active LOW ( MUTE ) for GL6962A. Fig. 5 Typical application of GL6962, shown there with piezo-electric earpiece and DTMF dialing. (The diode bridge, the zener diode and R10 limit current into, and the voltage across, the circuit during line transients. A different protection requirement is required for pulse dialing or register recall.) 12