GL6965 GL6965 Telephone Speech Network with Dialer Interface Pin Configurations Description The GL6965 is a bipolar integrated circuit for use in electronic telephones. The GL6965 has low operating voltage, it provides an excellent branch performance. It has line voltage increasing circuit by the exter-nal terminal. Transmitting and receiving gains automatically vary according to the line current. VL 1 20 VCC TO1 2 19 RO 1 TO0 3 18 RO 2 AC BIAS 4 17 BT 1 MFI 5 16 RPO TPO 6 15 RPI 1 TPI 1 7 14 RPI 2 8 13 REF 9 12 PADC GND 10 11 UP TPI 2 MUTE Features • Gain is automatically controlled according to the line current (Auto-PAD function). • The line voltage can be increased by the external terminal (Up function). • PKG is 20 pin DIP. • Externally adjustable transmitting, receiving and Sidetone gains. • Switching between transmitting output and DTMF output is possible. • Direct interface with light and compact ceramic transmitter-receiver is possible. • Receiver follow impedance type can also be used. 1 GL6965 Absolute Maximum Ratings ( Ta = 25°C ) Parameter Line Voltage Line Current Power Dissipation Operating Temperature Storage Temperature Symbol Value 15 150 1300 −30 ~ 70 −55 ~ 150 VL IL PD Topr Tstg Unit V mA mW °C °C Block Diagram UP VCC 20 VL TOl AC Bias 11 1 4 AC Bias AMP VCC Vref 10K 2 4K TRANSMIT SW/BUFFER + 5.5K 3 LINE DRIVER BTI 17 RECEIVING RPO 16 TPO 7 TPI1 8 TPI2 + TRANSMIT GAIN CONTROLLER SW/BUFFER + 9.3K Vref 6 Vref + Iup MFI 27.4K + + TOO 5 TRANSMIT INPUT AMP VCC VCC 17.7K 17.7K RPI1 15 18 RO2 19 RO1 + RPI2 14 + RECEIVING INPUT AMP INTERNAL REFERENCE CIRCUIT RECEIVING DRIVE AMP RECEIVING GAIN CONTROLLER VCC 13 12 REF 9 PADC 10 MUTE GND Electrical Characteristics ( Ta = 25°C ) Parameter Line Voltage Internal Power Supply Voltage Symbol Test Circuit VL 1 V CC 1 Test Condition Min. Typ. Max. Unit IL=20mA 2.9 3.2 3.6 V IL=120mA 9 11 14 V IL=20mA 1.75 1.90 2.20 V IL=120mA 5.8 6.1 6.6 V 2 GL6965 Line Voltage Amount ∆VL Test Circuit 2 GT 4 GR 5 G MF 6 G BP 8 D RT 4 D RR 5 ZI(MF) ZI(BP) ZI(AB) — — — VIH ( MU ) — Sym -bol Parameter Rise up Transmit Gain Receiving Gain MF Gain Beep Gain Transmit Dynamic Range Receiving Dynamic Range MFI Input Resistance BTI Input Resistance AC BIAS Input Resistance MUTE Terminal High Level Input Voltage MUTE Terminal Low Level Input Voltage Test Conditon IL=20mA IL=20mA IL=120mA IL=20mA IL=120mA IL=20mA IL=120mA IL=20mA IL=120mA IL=20mA IL=120mA f = 1KHz Vin = −55dBV f = 1KHz Vin = −55dBV f = 1KHz Vin = −30dBV f = 1KHz Vin = −30dBV IL=20mA IL=120mA Distortion Ratio 10% Distortion Ratio 4% IL=20mA-120mA Min,. Typ. Max. Unit 1.1 1.5 2.1 V 43 40 40 34.5 24 21.5 21 21.5 2.0 4.0 3.0 6.0 21 7 46 43.2 43.5 38 26.8 24 24 24.5 — — — — 30 10 48 45 46 40.5 28 25.5 27 27.5 — — — — — — dB dB dB dB dB dB dB dB Vp.p Vp.p Vp.p Vp.p 21 30 — kΩ — VCC V — 0.2 V VCC - 0.5 kΩ kΩ — VIL ( MU ) IL=20mA-120mA 0 Reference data Parameter Symbol Internal Reference Voltage VREF RO1, RO2 Output Impedance Total Receiving Gain Z RO GR Test Circuit 3 — 11 (Total) MUTE Terminal Input Current UP Terminal Input Current AC Impedance Phase I IL ( MU ) I IL ( MP ) |Z|TEL θ 9 10 — — 3 Test Condition Typ Unit IL=20mA IL=120mA IL=30mA f=1KHz IL=20mA (Balancing Network circuit included.) IL=120mA IL=20mA VIL=0.2V IL=20mA at GND connection IL=50mA f=1KHZ IL=50mA f=1KHZ 0.66 2.8 200 14.5 9.0 -50 -35 580 3 V V dB dB µA µA DEG GL6965 Pin Descriptions Pin No. Symbol Function Explanation 1 VL Line Current flow-in and Line Voltage terminal 2 TOI Current flow-in terminal of transmit output 3 TOO Current output terminal of transmit output 4 AC Bias AC signal reference Voltage terminal 5 MFI Input terminal of DTMF or external input signal 6 TPO 7 TPI1 8 TPI2 Output terminal of transmit input Amp. Inversion input terminal of transmit input Amp. Non-inversion input terminal of transmit input Amp. Connected to positive output of diode bridge circuit. DC potential of this terminal determines line voltage and if AC signal is not input, the highest DC potential appears. Transmit output signal and output signal of opposite transfer side are intermingled and output at this terminal in actual use. Connected to VL terminal ( 1 pin) through 43 Ω . Since almost all the line currents flow in from this terminal, set allowable power of resistance 43 Ω to be connected to VL terminal from this terminal considering the maximum line cur-rent expected to be used. Connected to GND terminal (10 pin) through 15 Ω . Since almost all the line currents flow out from this terminal, set allowable power of resistance 15 Ω to be connected to GND terminal from this terminal considering the maximum line cur-rent expected to be used. Transmit signal is sent from this terminal. Signal of this terminal varies current which is input from line through connected resistance 15 Ω , and makes it be output at VL terminal ( 1 pin) When AC signal is input to this terminal through capacitor (for blocking DC), signal is sent to line, Input from this terminal is output to line without any relation to gain control (PAD) or MUTE since this input does not pass through gain control circuit or MUTE function Signal which is input to this terminal is output at VL terminal ( 1 pin) only when MUTE terminal ( 9 pin) is in “L” state. Since this terminal is biased to almost the same potential as REF terminal ( 13 pin), avoid direct impressing external DC potential by using capacitor at inputting external terminal. Makes negative feedback to TPI1 terminal (7 pin) Receives negative feedback from TPO terminal (6 pin) Applies DC bias to this terminal from REF terminal13 ( pin) through resistance 4 GL6965 Pin No. 9 Symbo l MUTE Function 10 11 GND UP Ground terminal DC impedance control terminal 12 PADC Pad control terminal 13 REF Internal reference voltage Output terminal 14 RPI2 15 RPI1 16 RPO 17 BTI Non-inversion input terminal of receiving Input Amp. Inversion Input terminal of receiving input Amp. Output terminal of Receiving input Amp. Dial confirmation sound (Beep Tone, DTMF), monitor sound input terminal 18 RO2 19 RO1 20 VCC MUTE terminal Receiving output terminal Inversion output Receiving output terminal Non-inversion output Internal power supply voltage terminal Explanation Switching terminal of transmit signal with MFI input signal in transmitting system. Switching terminal of receiving signal with BTI input signal in receiving system. “L” State—Signal which is input from MFI is output to VL terminal ( 1 pin) Signal which is input from BTI is output to terminals RO1 and RO2. “H” or “ OPEN” state Transmitting input signal is output to VL terminal ( 1 pin). Receiving input signal is output to terminals RO1 and RO2 19 ( pin,18 pin) This terminal is pulled up by constant-current circuit Connected to negative output of diode bridge circuit. When this terminal is connected to GND terminal 10 ( pin) directly or through resistance. DC potential of VL terminal ( 1 pin) can be in-creased up to max. 1.5V (TYP.) in the same line current. This function has no relation to the state of MUTE terminal. When this terminal is connected to GND terminal 10 ( pin) or VCC terminal ( 20 pin) through resistance, operation current of gain control (Auto-PAD) performed by line current can be controlled. Voltage of this terminal is used as a reference voltage of internal amplifiers. Never used this terminal for an external power supply. Apply DC bias to this terminal from REF terminal ( 13 pin) through resistance. Receives negative feedback from RPO terminal (16 pin). Makes negative feedback to RPI1 terminal 15 ( pin). Signal which is input to this terminal is output to terminals RO1 and RO2 ( 19 pin and 18 pin) only when MUTE terminal ( 9 pin) is in “L” state. Since this terminal is biased to about the same potentialas REF terminal ( 3 pin), avoid direct impressing external DC voltage through capacitor at in-putting external signal Output terminal to receiver. Signal of which phase is negative to RO1 terminal (19 pin), is output. Output terminal to receiver, Signal of which phase is negative to RO2 terminal ( 18 pin), is output Power supply of internal amplifiers 5 GL6965 Test Circuit R + 2.2KΩ 1µF C8 µF + C5 330pF + R8 2.2K R9 22K + R2 260 100µF Beep 1µF R2 C6 R1 VL + 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 ~ ~ L1 – L2 R1 R7 R5 43 2.2K µF C2 330pF 22KΩ + GND R6 15Ω R4 µF 22K + DTMF Telephone line Simulation Equivalent circuit 2µF T1 Line 1 + Trunk Power – Line 2 T2 2ì F 6 T(+) GL6965 Test Circuit (continued) 1. VL , VCC R1 A R2 VL L1 55nF R VL V L2 VCC VCC V GND T(+) 2. VL , VCC (UP) R1 A L1 VL V VCC VCC V T(+) GND A R1 R2 VL L1 I L R L2 55nF R L2 3. VREF R2 VL VREF VREF V T(+) UP SWUP 7 55nF GL6965 Test Circuit (continued) 4. G T , DR T A T1 L1 IL 600Ù VOUT V T2 L1 L R1 VL T(+) R2 55nF VIN GND Vcc 10K L2 20K L2 PADC 25K 100K SWPADC l Transmit Gain, G T = 20 log | VOUT / VIN | (dB) l Transmit Dynamic Range: DR T = VOUT (Vp-p) at VOUT : DIST= 4% 5. G R , DR R A T1 L1 L1 I L R1 V VOUT R2 600Ù R VIN T2 Vcc L2 10K L2 PADC 20K 25K 100K SWPADC l Receiving Gain, G R = 20 log | VOUT / VIN | (dB) l Receiving Dynamic Range: DRR = VOUT (Vp-p) at VOUT : DIST= 10% 6. G MF , DR MF A T1 L1 600Ù IL L1 L R1 VL MF R2 VOUT 55nF VIN V GND T2 NUTE Vcc 10K L2 L2 PADC 20K 25K 100K SWPADC l MF Gain, G MF = 20 log | VOUT / VIN | (dB) l MF Dynamic Range: DR MF = VOUT (Vp-p) at VOUT : DIST= 4% 8 GL6965 Test Circuit (continued) 7. G R , DR R (at RL=150Ω; Low Impedance Type Receiver) A T1 L1 L1 IL R 600Ù R2 GND L2 510Ω 150Ω VIN T2 4.7µF R1 V VOUT 0.022µF L2 Insertion is required at oscillation l Receiving Gain, l Receiving Dynamic Range: at VOUT : DIST= 10% (dB) -p) 8. G BP , DR BP A T1 R1 L1 L1 I L V VOUT R2 600Ù Beep VIN MUTE L2 T2 L2 l Beep Gain, G BP = 20 log | VOUT / VIN | (dB) l Beep Dynamic Range: DR BP = VOUT (Vp-p) at VOUT : DIST= 10% 9. G IL (MU) L1 A L1 IL R1 R2 55nF R IN TIN L2 L2 MUTE A 0.2V I IL (MU) 9 GL6965 Test Circuit (continued) 10. I IL (UP) L1 IL A R1 R2 L1 55nF R IN TIN L2 L2 A I (UP) IL UP L1 T1 IL A R1 L1 R2 VIN T2 L2 55nF 11. G R (Total) V VOUT L2 l Total Receiving Gain, G R (Total) = 20 log | VOUT / VIN | (dB) *Balancing circuit included 10 LINE *** UNITS *** C: µF R: Ohm PKG: 20 DIP BEEP TONE R103 6.2K C6 0.47 C101 0.01 11 R10 2.2K 22K RPI1 RPO BTI RPI2 R8 2.2K R4 15/1W TOO R1 TOI 43/1W VL R3 150 R102 11K R101 1.5K C5 330P NETWORK BALANCING 14 17 3 2 1 + 20 INTERNAL REFERENCE CIRCUIT RECEIVING INPUT AMP 17.7K C4 100/25V REF RECEIVING GAIN CONTROLLER 9.3K lup 11 VCC + 4 Vref AC Bias 12 PADC TRANSMIT GAIN CONTROLLER 4K AC Bias AMP SW(UP) 17.7K SW/BUFFER 5.5K VCC RECEIVING S 10K VCC LINE DRIVER R2 620 VCC 9 VCC SW (MUTE) 10 + 27.4K RECEIVING DRIVER AMP SW/BUFFER MUTE + TRANSMIT GL6965 Block Diagram & Application Circuit GND TRANSMIT INPUT AMP 19 18 8 7 6 5 I2 R7 2..2K 22K R5 TPO R C3 0.47 DTMF RECEIVER R6 2.2K C3 330P C1 0.1 T GL6965 TRANSMITTER R5 15 AC Bias + + 12 2.2K R7 2.2K IL=120mA IL=20mA - 29 dB (Externally Adjustable) + 20 dB (Externally Adjustable) Receiving Input Amp. -5.5 dB 0 dB Receiving PAD 0.1 BEEP TONE -3 dB 0 dB R2 2.2K 2.2K R3 0 dB Receiving SW/Buffer 0 dB R1 T Transmit Input Amp. 0.47 * * * Units * * * C: uF 20 dB (Externally Adjustable) Receiving Input Amp. R 20 dB (Externally Adjustable) 2.2K Transmit SW/Buffer TPI2 TPI1 + Balancing Network The Gain value is the one roughly determined BALANGING NETWORK R: Ohm 0 dB TPO Transmit PAD 0.1 + L1, L2 LINE * * * Unit * * * C: UF R9 26 dB (At line 600 Ohm termination) *** Receiving Path Gain Distribution *** IL=120mA IL=20mA + AC Bias Amp. 27.4K MF + Line Drive Amp. + The Gain value is the one roughly determined R5 620 R5 43 VL *** Transmit Path Gain Distribution *** GL6965 Gain Distribution GL6965 Description Functions 1. Line voltage increasing circuit (up) The voltage of VL,VCC or VREF can be increased by connecting UP terminal to GND directly or through the resistance. The internal equivalent circuit is as shown in the figure. (1) The voltage increased most up to about 1.5V in VL when UP terminal is directly connected to GND. when the resistance is inserted the voltage increases according to the resistance value. (See graph) (2) In case of usage with MUTE terminal connected, the line voltage can be increased only at muting. (3) Avoid impressing the voltage over VCC or under GND. (4) When not in use, make the circuit opened or connected to VCC. Internal equivalent circuit PIN20 (VCC) 10k 5k 1.5 PIN20 (UP) lUP 2. Side tone protection circuit (Balancing circuit) The time constant (hereafter referred to as BN constant) of the side tone protection circuit in the example of application circuit is adjusted nearly to 0.4φ 7dB. Since the side tone characteristic varies according to this BN time constant, adjust the time constant confirming to the function of the telephone set. EXAMPLE OF BN TIME CONSTANT 6.2 k§ Ù 10 kΩ 2.0 k§ Ù 0.015µF 13 In case of 0.5 φ 7dB is determined to be the center. GL6965 3. Gain control circuit (PADC) 1) PADC terminal open state. Transmiting and receiving gains vary automatically according to the line current amount (Auto-PAD). With the increase of line current amount; the gain attenuates by about - 3dB at transmiting and about - 5.5dB at receiving. 2) In case PADC terminal is connected to GND by resistance. The gain begins to attenuate with the line current amount less than that when PADC terminal is open. Set the value of resistance to be connected at 25k§ Ùor over. 3) In case PADC terminal is connected to VCC by resistance. The gain begins to attenuate with the line current amount more than that when PADC terminal is open. Set the value of resistance to be connected at 10k§ Ùor over. * Internal equivalent circuit. PIN20(VCC) 5 k§ Ù PIN12 (PADC) IPAD 20 k§ Ù 4. MUTE circuit (MUTE) The internal equivalent circuit in the MUTE terminal is a shown in the figure below. Since the protective diode is connected between VCC and GND, avoid impressing the voltage over that of VCC or below GND. This is most suitable for input from the output of open drain or open collector type. * Internal equivalent circuit. PIN 20 (VCC) Dialing Mode (High) PIN9 (MUTE) + - VREF Speech Mode (High) 14 GL6965 Application 1. Transmitter As the transmitter, ¨ çthe condenser microphone. ¨ èthe ceramic type and ¨ éthe dynamic type (speaker type) are available. However, since ¨ çand ¨ èof FET or transistor built-in require the bias circuit. Externally provide the bias circuit. For example, refer to the example of the application circuit. 2. Receiver As the receiver, ¨ çthe ceramic type ¨ èthe low-impedance (dynamic type) are available. (1) Ceramic type; The receiver of equivalent capacity of about 55nF is assumed. In case of the ceramic type, since the large voltage amplitude is generally required at driving, make the receiver function in BTL mode. (2) Low-impedance type; The receiver of equivalent resistance of about 150§ Ùis assumed. For the connections, refer to the example of application circuit. 3. Example of Application circuit. (1) EXAMPLE OF POWER SUPPLY CIRCUIT FOR CONDENSER MICROPHONE (2) EXAMPLE OF CONNECTION CIRCUIT OF LOW-IMPEDANCE TYPE RECEIVER. 560Ω VCC 19 + 4.7µF 510Ω 0.47µF 18 * T LOWIMPEDANCE TYPE RECEIVER (150Ω) 0.022µF - + TO MICROPHONE INPUT 1µF §Ù R * Insert at oscillation (3) In case of using transmit input amplifier as non-inversion input. 330pF 6 2.2k§ Ù _ + (4) In case of using transmit input amplifier as inversion input. 6 2.2k§ Ù 7 _ 2.2k§ Ù 1mF 8 + T 2.2k§ Ù0.47mFTRANSMITER 7 330pF 2.2k§ 0.47mF Ù TRANSMITER 8 2.2k§ Ù TRANSMIT INPUT AMP TRANSMIT INPUT AMP TO 13 PIN TO 13 PIN Note : In test circuit and application circuit, transmit input amplifier is set at inversion input. 15 T GL6965 4. Side Tone Gain Control. (1) Alternative application for side tone gin control 0.47µF 2.2kΩ 330pF 220µF VL 620Ω ~ 16 20 + ~ B/L Circuit L1 0.47µF 2.2kΩ 15 10 RS2 5.6kΩ GL6965 RSD RS1 1 kΩ - 1 2 3 7 19 18 L2 43 Ω 2.2kΩ 15Ω 150Ω 0.47µF TIN V VRD - The side tone gain is externally controlled by the resistor RSD (RS1+RS2) The maximum available control range of side tone gain is 0dB to 14 dB. (2) Side tone gain, GSD to Resistor, RSD RSD (RS1+RS2) GSD 1k§ Ù 2k§ Ù 3k§ Ù 3.5k§ Ù 4k§ Ù 5k§ Ù 6k§ Ù 14.2dB 11.1dB 2.5dB 0.2dB 1.6 dB 5.4 dB 7.5 dB (3) The side tone gain is GSD= 20 log( VRO ) VL (dB) 16 GL6965 5. AC Impedance UP control. VL R2 620¥ Ø 1 20 + C8 220 µF R1 43¥ Ø 2 RA1 (100k¥Ø-500k¥Ø) (1) Application for AC impedance up control C 4 -1 ZAC 0.1µF 3 RA2 R4 15¥ Ø - The AC Impedance (ZAC) can be increased by using AC Bias terminal (Pin ¨ ê ). The AC Impedance up amount is determined by the external resistors R1, R2 value. : (2) The AC impedance is Z AC ¡Ö VL ¡Ö 1 IL R2 1 1 RA 2 ( ) R 4 RA1 + RA 2 17 GL6965 DC Characteristic (UP) DC Characteristic (Normal) Test Circuit 2 16 16 14 14 12 12 10 10 DC Voltage DC Voltage Test Circuit 1 VL 8 6 VCC 8 VCC 6 4 4 2 2 0 140 20 40 60 80 100 120 0 140 Line Current, IL (mA) 3.5 47 3 46 Transmit Gain(dB) 48 Up 2 Normal 1.5 (A) 100 120 120 open 10k§ Ù(PADC-VCC) 20k§ Ù(PADC-VCC) 25k§ Ù(PADC-GND) 100k§ Ù(PADC-GND) (D) 43 41 100 (C) (E) 44 0.5 80 (A) (B) (C) (D) (E) 45 42 60 80 (B) 1 40 60 Test Circuit 4 4 20 40 Transmit Gain to Current Characteristic Test Circuit 3 0 20 Line Current, IL (mA) VREF Voltage to Current Characteristic 2.5 VL 140 0 Line Current, IL (mA) 20 40 60 80 100 120 Line Current, IL (mA) 18 140 GL6965 Receiving Gain to Current Characteristic Input=pin 15, -55dBV Output=pin 18, pin 19 50 29 Test Circuit 5 Input Level=-55dBV (K) open (L) 10k§ Ù(PADC-VCC) (M) 20k§ Ù(PADC-VCC) (N) 25k§ Ù(PADC-GND) (O) 100k§ Ù(PADC-GND) 46 44 (A) (C) (B) 40 26 36 22 40 60 80 100 120 0 140 20 26 Test Circuit 8 Receiving Gain (dB) Beep Gain (dB) 26 24 22 20 16 12 80 100 120 140 18 16 60 120 20 14 40 100 0 140 Line Current, IL (mA) Input Level = 55dBV RL=150§ Ù 22 18 20 80 Test Circuit 7 24 Input Level = 30dBV 0 60 Receiving Gain to Current Characteristic (at using Low-impedance type receiver ; RL=150§ Ù) Beep Gain to Current Characteristic 28 40 Line Current, IL (mA) Line Current, IL (mA) 30 (E) (A) (C) (B) 24 23 20 (D) 25 38 0 Input Level=-30dBV (F) open (G) 10k§ Ù(PADC-VCC) (H) 20k§ Ù(PADC-VCC) (I) 25k§ Ù(PADC-GND) (J) 100k§ Ù(PADC-GND) 27 42 (D) (E) Test Circuit 6 28 MF Gain (dB) 48 Receiving Gain(dB) MF Gain to Current Characteristic Input=pin 15, -30dBVrms Output=pin 1 20 40 60 80 100 120 Line Current, IL (mA) 19 140 GL6965 Transmit Dynamic Range to Current Characteristic Receiving Range to Current Characteristic Test Circuit 4 Receiving Dynamic Range (Vp-p) Transmit Dynamic Range (Vp-p) 16 14 12 10 THD 4% 8 THD 2% 6 4 2 16 Test Circuit 5 14 THD10% 12 THD 5% 10 8 6 4 2 0 20 40 60 80 100 120 140 0 20 Line Current, IL (mA) 16 Beep Dynamic Range (Vp-p) MF Dynamic Range (Vp-p) 14 12 10 THD 4% 6 80 100 120 140 Beep Dynamic Range to Current Charcteristic Test Circuit 6 8 60 Line Current, IL (mA) DTMF Dynamic Range to Current Characteristic 16 40 THD 2% 4 2 Test Circuit 8 14 12 10 THD10% 8 THD 5% 6 4 2 0 20 40 60 Line (mA) 80 100 Current, 120 140 IL 0 20 40 60 80 100 120 Line Current, IL (mA) 20 140 GL6965 Receiving Dynamic Range to Current Characteristic At using Low-Impedance type Receiver ; RL=150§ Ù Total Receiving Gain to Current Characteristic (Balancing circuit included) 19 Test Circuit 11 Test Circuit 7 17 Total Receiving Gain 1.4 1.2 1.0 THD10% 0.8 0.6 THD 5% 15 13 11 9 7 0.4 5 0.2 0 140 20 40 60 80 100 0 140 120 20 40 60 80 100 Line Current, IL (mA) Line Current, IL (mA) AC Impedance to Frequency Characteristic (IL = 120 mA) 700 AC Impedance Dynamic Range (Vp- 1.6 600 500 100 5k Frequency (Hz) 21 120 GL6965 Mute Terminal pull-up current characteristic Test Circuit 9 at VIL= 0.2V Current Value (ìA) 14 0 12 0 10 0 80 60 40 20 0 20 40 60 80 100 120 140 Line Current, IL (mA) Line Voltage Rise up Characteristic Test Circuit 2 Line Voltage VL (V) 5.0 IL=20mA 4.6 4.2 3.8 3.4 3.0 Resistance between up terminal and GND terminal (§ Ù ) 22 GL6965 Transmit Gain to Frequency Characteristic Transmit Gain (dB) Test Circuit 4 50 Input Level=-55dBV IL=120mA 45 IL=120mA 40 35 100 1k 5k Frequency (Hz) Gain Receiving gain to Frequency Characteristic Test Circuit 5 Input Level=-55dBV IL=120mA IL=120mA 100 1k 5k Frequency (Hz) Line Voltage to Temperature Characteristic 16 Internal Power Supply Voltage to Temperature Characteristic Test Circuit 1 16 -35¡ É 75¡ É 100¡ É 14 14 12 12 DC Voltage (V) DC Voltage (V) Test Circuit 1 10 8 6 10 6 4 4 2 2 0 140 20 40 60 80 100 120 -35¡ É 75¡ É 100¡ É 8 0 140 Line Current, IL (mA) 20 40 60 80 100 Line Current, IL (mA) 23 120