TI SN65HVD233MDREP

SN65HVD233-EP
www.ti.com............................................................................................................................................................................................ SLLS944 – NOVEMBER 2008
3.3-V CAN TRANSCEIVER
FEATURES
APPLICATIONS
•
•
•
•
•
•
•
•
•
•
1
2
•
•
•
•
•
•
(1)
Bus-Pin Fault Protection Exceeds ±36 V
Bus-Pin ESD Protection Exceeds 16-kV HBM
Compatible With ISO 11898
Signaling Rates(1) up to 1 Mbps
Extended –7-V to 12-V Common-Mode Range
High-Input Impedance Allows for 120 Nodes
LVTTL I/Os Are 5-V Tolerant
Adjustable Driver Transition Times for
Improved Signal Quality
Unpowered Node Does Not Disturb the Bus
Low-Current Standby Mode . . . 200-µA Typical
Thermal Shutdown Protection
Power-Up/Down Glitch-Free Bus Inputs and
Outputs
– High Input Impedance With Low VCC
– Monolithic Output During Power Cycling
Loopback for Diagnostic Functions Available
DeviceNet Vendor ID #806
The signaling rate of a line is the number of voltage
transitions that are made per second expressed in the units
bps (bits per second).
SUPPORTS DEFENSE, AEROSPACE,
AND MEDICAL APPLICATIONS
•
•
•
•
•
•
•
(1)
Controlled Baseline
One Assembly/Test Site
One Fabrication Site
Available in Military (–55°C/125°C)
Temperature Range (1)
Extended Product Life Cycle
Extended Product-Change Notification
Product Traceability
•
•
•
CAN Data Bus
Industrial Automation
– DeviceNet™ Data Buses
– Smart Distributed Systems (SDS™)
SAE J1939 Standard Data Bus Interface
NMEA 2000 Standard Data Bus Interface
ISO 11783 Standard Data Bus Interface
DESCRIPTION
The SN65HVD233 is used in applications employing
the
controller
area
network
(CAN)
serial
communication physical layer in accordance with the
ISO 11898 standard. As a CAN transceiver, it
provides transmit and receive capability between the
differential CAN bus and a CAN controller, with
signaling rates up to 1 Mbps.
Designed for operation in especially harsh
environments, the device features cross-wire,
overvoltage and loss of ground protection to ±36 V,
with overtemperature protection and common-mode
transient protection of ±100 V. This device operates
over a –7-V to 12-V common-mode range with a
maximum of 60 nodes on a bus.
FUNCTIONAL BLOCK DIAGRAM
RS 8
D
R
7
1
6
CANH
CANL
4
5
LBK
Additional temperature ranges available - contact factory
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
DeviceNet is a trademark of Open DeviceNet Vendor Association.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008, Texas Instruments Incorporated
SN65HVD233-EP
SLLS944 – NOVEMBER 2008............................................................................................................................................................................................ www.ti.com
This device has limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
DESCRIPTION (CONTINUED)
If the common-mode range is restricted to the ISO-11898 Standard range of –2 V to 7 V, up to 120 nodes may
be connected on a bus. This transceiver interfaces the single-ended CAN controller with the differential CAN bus
found in industrial, building automation, and automotive applications.
The RS (pin 8) of the SN65HVD233 provides for three modes of operation: high-speed, slope control, or
low-power standby mode. The high-speed mode of operation is selected by connecting RS directly to ground,
allowing the driver output transistors to switch on and off as fast as possible with no limitation on the rise and fall
slope. The rise and fall slope can be adjusted by connecting a resistor to ground at RS, since the slope is
proportional to the pin's output current. Slope control is implemented with a resistor value of 10 kΩ to achieve a
slew rate of ≈ 15 V/µs and a value of 100 kΩ to achieve ≈ 2.0 V/µs slew rate. For more information about slope
control, refer to the application information section.
The SN65HVD233 enters a low-current standby mode during which the driver is switched off and the receiver
remains active if a high logic level is applied to RS. The local protocol controller reverses this low-current standby
mode when it needs to transmit to the bus.
A logic high on the loopback LBK (pin 5) of the SN65HVD233 places the bus output and bus input in a
high-impedance state. The remaining circuit remains active and available for driver to receiver loopback,
self-diagnostic node functions without disturbing the bus.
AVAILABLE OPTIONS
PART NUMBER
LOW POWER MODE
SLOPE
CONTROL
DIAGNOSTIC
LOOPBACK
AUTOBAUD
LOOPBACK
SN65HVD233
200-µA standby mode
Adjustable
Yes
No
ORDERING INFORMATION (1)
TA
–55°C to 125°C
(1)
(2)
2
PACKAGE (2)
SOIC – D
Reel of 2500
ORDERABLE PART NUMBER
TOP-SIDE MARKING
SN65HVD233MDREP
H233EP
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
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POWER DISSIPATION RATINGS
PACKAGE
(1)
TA ≤ 25°C
POWER RATING
CIRCUIT
BOARD
DERATING FACTOR (1)
ABOVE TA = 25°C
TA = 85°C
POWER RATING
TA = 125°C
POWER RATING
D
Low-K
596.6 mW
5.7 mW/°C
255.7 mW
28.4 mW
D
High-K
1076.9 mW
10.3 mW/°C
461.5 mW
51.3 mW
This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow.
ABSOLUTE MAXIMUM RATINGS (1)
(2)
over operating free-air temperature range (unless otherwise noted)
VCC
VALUE
UNIT
Supply voltage range
–0.3 to 7
V
Voltage range at any bus terminal (CANH or CANL)
–36 to 36
V
–100 to 100
V
Voltage input range, transient pulse, CANH and CANL, through 100 Ω (see Figure 7)
VI
Input voltage range, (D, R, RS, LBK)
–0.5 to 7
V
IO
Receiver output current
–10 to 10
mA
CANH, CANL and GND
16
kV
All pins
3
kV
All pins
1
kV
Electrostatic discharge
Electrostatic discharge
Human Body Model (3)
Human Body Model
(3)
Charged-Device Mode (4)
See Dissipation Rating
Table
Continuous total power dissipation
TJ
(1)
(2)
(3)
(4)
Operating junction temperature
150
°C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.
Tested in accordance with JEDEC Standard 22, Test Method A114-A.
Tested in accordance with JEDEC Standard 22, Test Method C101.
RECOMMENDED OPERATING CONDITIONS
MIN
VCC
Supply voltage
Voltage at any bus terminal (separately or common mode)
TYP
MAX
3
3.6
–7
12
UNIT
VIH
High-level input voltage
D, LBK
2
5.5
VIL
Low-level input voltage
D, LBK
0
0.8
VID
Differential input voltage
–6
6
0
100
kΩ
0.75 VCC
5.5
V
Resistance from RS to ground
VI(Rs) Input Voltage at RS for standby
IOH
High-level output current
IOL
Low-level output current
TJ
Operating junction temperature
TA
(1)
Operating free-air temperature
Driver
–50
Receiver
–10
mA
Driver
50
Receiver
10
(1)
-55
V
mA
150
°C
125
°C
Maximum free-air temperature operation is allowed as long as the device maximum junction temperature is not exceeded.
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DRIVER ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
MIN TYP (1)
TEST CONDITIONS
VO(D)
Bus output voltage
(Dominant)
CANH
VO
Bus output voltage
(Recessive)
CANH
VOD(D)
Differential output voltage (Dominant)
VOD
Differential output voltage (Recessive)
VOC(pp)
Peak-to-peak common-mode output voltage
See Figure 9
IIH
High-level input current
D,LBK
D=2V
IIL
Low-level input current
D, LBK
D = 0.8 V
D = 0 V, RS = 0 V, See Figure 1 and Figure 2
CANL
Short-circuit output current
0.5
1.25
2.3
Output capacitance
IIRs(s)
RS input current for standby
ICC
(1)
4
Supply current
V
V
2.3
1.5
2
3
D = 0 V, RS = 0 V, See Figure 2 and Figure 3
1.2
2
3
D = 3 V, RS = 0 V, See Figure 1 and Figure 2
–120
12
D = 3 V, RS = 0 V, No load
–0.5
0.05
V
–30
30
µA
–30
30
µA
1
VCANH = 12 V, CANL Open, See Figure 12
VCANL = –7 V, CANH Open, See Figure 12
V
mV
V
–250
1
–1
VCANL = 12 V, CANH Open, See Figure 12
CO
UNIT
D = 0 V, RS = 0 V, See Figure 1 and Figure 2
VCANH = –7 V, CANL Open, See Figure 12
IOS
VCC
D = 3 V, RS = 0 V, See Figure 1 and Figure 2
CANL
MAX
2.45
mA
250
See receiver input capacitance
RS = 0.75 VCC
µA
–10
Standby
RS = VCC, D = VCC, LBK = 0 V
200
600
Dominant
D = 0 V, No load, LBK = 0 V,
RS = 0 V
6
Recessive
D = VCC, No load, LBK = 0 V,
RS = 0 V
6
µA
mA
All typical values are at 25°C and with a 3.3 V supply.
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DRIVER SWITCHING CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
TYP (1)
MAX
RS = 0 V, See Figure 4
35
95
RS with 10 kΩ to ground, See Figure 4
70
125
RS with 100 kΩ to ground, See Figure 4
500
870
70
120
RS with 10 kΩ to ground, See Figure 4
130
180
RS with 100 kΩ to ground, SeeFigure 4
870
1200
PARAMETER
Propagation delay time,
low-to-high-level output
tPLH
TEST CONDITIONS
MIN
RS = 0 V, See Figure 4
Propagation delay time,
high-to-low-level output
tPHL
tsk(p)
Pulse skew (|tPHL – tPLH|)
tr
Differential output signal rise time
tf
Differential output signal fall time
tr
Differential output signal rise time
tf
Differential output signal fall time
tr
Differential output signal rise time
tf
Differential output signal fall time
ten(s)
Enable time from standby to dominant
RS = 0 V, See Figure 4
35
RS with 10 kΩ to ground, See Figure 4
60
RS with 100 kΩ to ground, SeeFigure 4
(1)
RS = 0 V, See Figure 4
RS with 10 kΩ to ground, See Figure 4
RS with 100 kΩ to ground, See Figure 4
See Figure 8
UNIT
ns
ns
ns
370
20
70
20
70
30
135
30
135
300
1400
300
1400
0.6
1.5
ns
ns
ns
µs
All typical values are at 25°C and with a 3.3 V supply. Timing parameters are characterized but not production tested.
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RECEIVER ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
VIT+
Positive-going input threshold voltage
VIT–
Negative-going input threshold
voltage (2)
Vhys
Hysteresis voltage (VIT+ – VIT–)
VOH
VOL
TEST CONDITIONS
MAX
750
900
LBK = 0 V, See Table 1
500
High-level output voltage
IO = –4 mA, See Figure 6
2.4
Low-level output voltage
IO = 4 mA, See Figure 6
CANH or CANL = 12 V,
VCC = 0 V
Bus input current
650
CANH or CANL = –7 V
Other bus pin = 0 V,
D = 3 V, LBK = 0 V,
RS = 0 V
150
500
200
600
–610
–150
–450
–130
CI
Input capacitance (CANH or CANL)
Pin-to-ground, VI = 0.4 sin (4E6πt) + 0.5V, D = 3 V,
LBK = 0 V
40
CID
Differential input capacitance
Pin-to-pin, VI = 0.4 sin (4E6πt) + 0.5V, D = 3 V,
LBK = 0 V
20
RID
Differential input resistance
RIN
Input resistance (CANH or CANL)
(1)
(2)
6
Supply current
mV
0.4
CANH or CANL = –7 V,
VCC = 0 V
ICC
UNIT
100
CANH or CANL = 12 V
II
MIN TYP (1)
(2)
D = 3 V, LBK = 0 V
V
µA
pF
40
100
20
50
Sleep
D = VCC, RS = 0 V or VCC
0.05
2
Standby
RS = VCC, D = VCC, LBK = 0 V
200
600
Dominant
D = 0 V, No load, RS = 0 V, LBK = 0 V
6
Recessive
D = VCC, No load, RS = 0 V, LBK = 0 V
6
kΩ
µA
mA
All typical values are at 25°C and with a 3.3 V supply.
Characterized but not production tested.
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RECEIVER SWITCHING CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP (1)
MAX
tPLH
Propagation delay time, low-to-high-level output
35
60
tPHL
Propagation delay time, high-to-low-level output
35
60
tsk(p)
Pulse skew (|tPHL – tPLH|)
tr
Output signal rise time
2
6.5
tf
Output signal fall time
2
6.5
(1)
See Figure 6
7
UNIT
ns
All typical values are at 25°C and with a 3.3 V supply. Timing parameters are characterized but not production tested.
DEVICE SWITCHING CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
t(LBK)
Loopback delay, driver input to
receiver output
t(loop1)
Total loop delay, driver input to receiver output,
recessive to dominant
HVD233
See Figure 11
RS = 0 V, See Figure 10
(1)
Total loop delay, driver input to receiver output,
dominant to recessive
MAX
7.5
13
70
135
RS with 10 kΩ to ground, See Figure 10
105
190
RS with 100 kΩ to ground, See Figure 10
535
1000
70
135
RS = 0 V, See Figure 10
t(loop2)
MIN TYP (1)
RS with 10 kΩ to ground, See Figure 10
105
190
RS with 100 kΩ to ground, See Figure 10
535
1100
UNIT
ns
ns
ns
All typical values are at 25°C and with a 3.3 V supply. Timing parameters are characterized but not production tested.
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PARAMETER MEASUREMENT INFORMATION
IO(CANH)
II
D
60 Ω ±1%
VO(CANH)
VOD
VI
VO(CANH) + VO(CANL)
IIRs
RS
2
VOC
IO(CANL)
+
VO(CANL)
VI(Rs)
-
Figure 1. Driver Voltage, Current, and Test Definition
Dominant
Recessive
≈3V
VO(CANH)
≈ 2.3 V
≈1V
VO(CANL)
Figure 2. Bus Logic State Voltage Definitions
VI
D
CANH
330 Ω ±1%
VOD
60 Ω ±1%
+
_
RS
CANL
-7 V ≤ VTEST ≤ 12 V
330 Ω ±1%
Figure 3. Driver VOD
CANH
CL = 50 pF ±20%
(see Note B)
D
VI
RL = 60 Ω ±1%
VCC/2
VI
VO
0V
tPLH
tPHL
RS +
(see Note A)
VI(Rs)
-
VCC
VCC/2
VO
0.9 V
VO(D)
90%
0.5 V
10%
CANL
tr
VO(R)
tf
A.
The input pulse is supplied by a generator having the following characteristics: Pulse repetition rate (PRR) ≤ 125 kHz,
50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω.
B.
CL includes fixture and instrumentation capacitance.
Figure 4. Driver Test Circuit and Voltage Waveforms
8
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PARAMETER MEASUREMENT INFORMATION (continued)
CANH
R
VIC =
VI(CANH)
VI(CANH + VI(CANL)
IO
VID
2
VO
CANL
VI(CANL)
Figure 5. Receiver Voltage and Current Definitions
2.9 V
CANH
2.2 V
VI
R
IO
1.5 V
VI
(see Note A)
1.5 V
tPLH
CL = 15 pF ±20%
(see Note B)
CANL
2.2 V
tPHL
VO
50%
10%
VO
90%
90%
tr
VOH
50%
10%
VOL
tf
A.
The input pulse is supplied by a generator having the following characteristics: Pulse repetition rate (PRR) ≤ 125 kHz,
50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω.
B.
CL includes fixture and instrumentation capacitance.
Figure 6. Receiver Test Circuit and Voltage Waveforms
Table 1. Differential Input Voltage Threshold Test
INPUT
OUTPUT
VCANH
VCANL
–6.1 V
–7 V
L
12 V
11.1 V
L
–1 V
–7 V
L
MEASURED
R
|VID|
900 mV
900 mV
VOL
6V
12 V
6V
L
6V
–6.5 V
–7 V
H
500 mV
12 V
11.5 V
H
500 mV
–7 V
–1 V
H
6V
12 V
H
6V
Open
Open
H
X
VOH
6V
CANH
R
100 Ω
Pulse Generator
15 µs Duration
1% Duty Cycle
tr, tf ≤ 100 ns
CANL
D at 0 V or VCC
Rs, AB, EN, LBK, at 0 V or VCC
NOTE: This test is conducted to test survivability only. Data stability at the R output is not specified.
Figure 7. Test Circuit, Transient Over Voltage Test
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VCC
RS
VI
CANH
D
50%
VI
0V
60 Ω ±1%
0V
AB or LBK
VOH
CANL
50%
VO
+
-
VOL
ten(s)
R
VO
15 pF ±20%
NOTE: All VI input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 6 ns, pulse repetition rate
(PRR) = 125 kHz, 50% duty cycle.
Figure 8. ten(s) Test Circuit and Voltage Waveforms
27 Ω ±1%
CANH
VI
VOC(PP)
D
VOC
RS
CANL
27 Ω ±1%
VOC
50 pF ±20%
NOTE: All VI input pulses are supplied by a generator having the following characteristics:
tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 125 kHz, 50% duty cycle.
Figure 9. VOC(pp) Test Circuit and Voltage Waveforms
0Ω, 10 kΩ,
or 100 kΩ ±5%
DUT
CANH
D
VI
60 Ω ±1%
LBK or AB
HVD233/235
EN
HVD234
R
VCC
VO
RS
+
-
VCC
50%
VI
50%
0V
t(loop2)
CANL
VO
t(loop1)
50%
VOH
50%
VOL
15 pF ±20%
NOTE: All VI input pulses are supplied by a generator having the following characteristics:
tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 125 kHz, 50% duty cycle.
Figure 10. t(loop) Test Circuit and Voltage Waveforms
10
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RS
+
VOD
-
D
VI
LBK
VCC
VCC
CANH
50%
VI
50%
0V
60 Ω ±1%
t(LBK1)
CANL
t(LBK2)
50%
VO
VOH
50%
R
VO
+
-
VOL
t(LBK) = t(LBK1) = t(LBK2)
VOD
≈ 2.3 V
15 pF ±20%
NOTE: All VI input pulses are supplied by agenerator having the following characteristics:
tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 125 kHz, 50% duty cycle.
Figure 11. t(LBK) Test Circuit and Voltage Waveforms
 IOS 
IOS
D
0 V or VCC
15 s
CANH
+
_
IOS
0V
VI
12 V
CANL
0V
0V
VI
10 µs
and
VI
-7 V
Figure 12. IOS Test Circuit and Waveforms
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3.3 V
R2 ± 1%
CANH
R
CANL
R1 ± 1%
TA = 25°C
VCC = 3.3 V
+
VID
-
R2 ± 1%
Vac
R1 ± 1%
VI
The R Output State Does Not Change During
Application of the Input Waveform.
VID
500 mV
900 mV
R1
50 Ω
50 Ω
R2
280 Ω
130 Ω
12 V
VI
-7 V
NOTE: All input pulses are supplied by a generator with f ≤ 1.5 MHz.
Figure 13. Common-Mode Voltage Rejection
12
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DEVICE INFORMATION
SN65HVD233D
(TOP VIEW)
D
GND
VCC
R
1
8
2
7
3
6
4
5
RS
CANH
CANL
LBK
EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS
RS INPUT
D INPUT
CANH INPUT
VCC
VCC
VCC
110 kΩ
100 kΩ
1 kΩ
45 kΩ
INPUT
INPUT
9V
9 kΩ
INPUT
CANH and CANL OUTPUTS
VCC
VCC
110 kΩ
40 V
+
_
CANL INPUT
R OUTPUT
VCC
9 kΩ
5Ω
45 kΩ
INPUT
40 V
9 kΩ
OUTPUT
OUTPUT
9 kΩ
9V
40 V
LBK
VCC
1 kΩ
INPUT
9V
100 kΩ
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Table 2. Thermal Characteristics
PARAMETERS
TEST CONDITIONS
θJA
Junction-to-ambient thermal resistance (1)
θJB
Junction-to-board thermal resistance
θJC
Junction-to-case thermal resistance
P(AVG)
Average power dissipation
T(SD)
Thermal shutdown junction temperature
(1)
(2)
(3)
Low-K
(2)
VALUE
UNIT
board, no air flow
185
High-K (3) board, no air flow
101
High-K (3) board, no air flow
82.8
°C/W
26.5
°C/W
36.4
mW
170
°C
RL = 60 Ω, RS at 0 V, input to D a 1-MHz 50% duty
cycle square wave VCC at 3.3 V, TA = 25°C
°C/W
See TI literature number SZZA003 for an explanation of this parameter.
JESD51-3 low effective thermal conductivity test board for leaded surface mount packages.
JESD51-7 high effective thermal conductivity test board for leaded surface mount packages.
FUNCTION TABLES
DRIVER (1)
INPUTS
(1)
OUTPUTS
D
LBK/AB
Rs
CANH
CANL
BUS STATE
X
X
> 0.75 VCC
Z
Z
Recessive
L
L or open
H or open
X
X
H
≤ 0.33 VCC
≤ 0.33 VCC
H
L
Dominant
Z
Z
Recessive
Z
Z
Recessive
H = high level; L = low level; Z = high impedance; X = irrelevant; ? = indeterminate
RECEIVER (1)
INPUTS
(1)
14
OUTPUT
BUS STATE
VID = V(CANH)–V(CANL)
LBK
D
R
Dominant
VID ≥ 0.9 V
L or open
X
L
Recessive
VID ≤ 0.5 V or open
L or open
H or open
H
?
0.5 V < VID <0.9 V
L or open
H or open
?
X
X
L
L
X
X
H
H
H
H = high level; L = low level; Z = high impedance; X = irrelevant; ? = indeterminate
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TYPICAL CHARACTERISTICS
DOMINANT-TO-RECESSIVE LOOP TIME
vs
FREE-AIR TEMPERATURE
t (LOOPL1)- Ressive-T o-Dominant Loop Time - ns
90
Rs, LBK = 0 V
85
VCC = 3 V
80
VCC = 3.3 V
VCC = 3.6 V
75
70
65
60
-40
45
80
TA - Free-Air Temperature - °C
5
125
t (LOOPL2)- Dominant-T o-Recessive Loop Time - ns
RECESSIVE-TO-DOMINANT LOOP TIME
vs
FREE-AIR TEMPERATURE
90
85
VCC = 3.6 V
80
VCC = 3.3 V
75
70
VCC = 3 V
65
-40
45
5
80
TA - Free-Air Temperature - °C
Figure 15.
SUPPLY CURRENT
vs
FREQUENCY
DRIVER LOW-LEVEL OUTPUT CURRENT
vs
LOW-LEVEL OUTPUT VOLTAGE
125
160
VCC = 3.3 V,
Rs, LBK = 0 V,
TA = 25°C,
60-W Load
VCC = 3.3 V,
Rs, LBK = 0 V,
TA = 25°C
140
I OL - Driver Output Current - mA
I CC - Suppl y Current - mA
Rs, LBK = 0 V
Figure 14.
20
19
95
18
17
16
120
100
80
60
40
20
15
200
300
500
700
1000
0
0
f - Frequenc y - kbps
Figure 16.
1
2
3
VOL - Lo w-Level Output Voltage - V
Figure 17.
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15
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TYPICAL CHARACTERISTICS (continued)
DRIVER HIGH-LEVEL OUTPUT CURRENT
vs
HIGH-LEVEL OUTPUT VOLTAGE
2.2
VCC = 3.3 V,
Rs, LBK = 0 V,
TA = 25°C
0.1
VCC = 3.6 V
VOD - Diff erential Output Voltage - V
I OH - Driver High-Le vel Output Current - mA
0.12
DIFFERENTIAL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
0.08
0.06
0.04
0.02
2
VCC = 3.3 V
1.8
VCC = 3 V
1.6
1.4
1.2
RL = 60 Ω
Rs, LBK = 0 V
0
0
0.5
1
1.5
2
2.5
3
VOH - High-Le vel Output Voltage - V
1
-40
3.5
45
5
RECEIVER LOW-TO-HIGH PROPAGATION DELAY
vs
FREE-AIR TEMPERATURE
45
Rs, LBK = 0 V
See Figure 6
44
42
VCC = 3.3 V
VCC = 3 V
41
40
39
38
VCC = 3.6 V
37
36
35
-40
5
45
80
TA - Free-Air Temperature - °C
125
RECEIVER HIGH-TO-LOW PROPAGATION DELAY
vs
FREE-AIR TEMPERATURE
38
Rs, LBK = 0 V
See Figure 6
37
36
35
VCC = 3 V
34
VCC = 3.3 V
33
VCC = 3.6 V
32
-40
Figure 20.
16
125
Figure 19.
t PHL- Receiver High-To-Low Propagation Delay - ns
t PLH - Receiver Lo w-To-High Propagation Delay - ns
Figure 18.
43
80
TA - Free-Air Temperature - °C
5
45
80
TA - Free-Air Temperature - °C
125
Figure 21.
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TYPICAL CHARACTERISTICS (continued)
DRIVER HIGH-TO-LOW PROPAGATION DELAY
vs
FREE-AIR TEMPERATURE
55
t PHL- Driver High-To-Low Proragation Delay - ns
t PLH - Driver Lo w-To-High Propagation Delay - ns
DRIVER LOW-TO-HIGH PROPAGATION DELAY
vs
FREE-AIR TEMPERATURE
Rs, LBK = 0 V
See Figure 4
50
VCC = 3.3 V
VCC = 3 V
45
40
35
VCC = 3.6 V
30
25
-40
5
45
80
125
65
60
VCC = 3 V
55
50
VCC = 3.3 V
45
40
VCC = 3.6 V
35
Rs, LBK = 0 V
See Figure 4
30
-40
5
45
80
TA - Free-Air Temperature - °C
TA - Free-Air Temperature - °C
Figure 22.
125
Figure 23.
DRIVER OUTPUT CURRENT
vs
SUPPLY VOLTAGE
35
Rs, LBK = 0 V,
TA = 25°C,
RL = 60 Ω
I O - Driver Output Current - mA
30
25
20
15
10
5
0
-5
0
0.6
1.2
1.8
2.4
VCC - Supply Voltage - V
Figure 24.
3
3.6
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APPLICATION INFORMATION
DIAGNOSTIC LOOPBACK (SN65HVD233)
The loopback function of the SN65HVD233 is enabled with a high-level input to LBK. This forces the driver into a
recessive state and redirects the data (D) input at pin 1 to the received-data output (R) at pin 4. This allows the
host controller to input and read back a bit sequence to perform diagnostic routines without disturbing the CAN
bus. A typical CAN bus application is displayed in Figure 25.
If the LBK pin is not used it may be tied to ground (GND). However, it is pulled low internally (defaults to a
low-level input) and may be left open if not in use.
CANH
Bus Lines -- 40 m max
120 Ω
120 Ω
Stub Lines -- 0.3 m max
CANL
5V
Vref
Vcc
0.1µ F
SN65HVD251
Rs
3.3 V
Vcc
Rs
D
CANTX
R
CANRX
0.1µ F
SN65HVD233
GND
3.3 V
Vref
GND
D
LBK
GPIO
CANTX
Vcc
SN65HVD230
Rs
R
CANRX
0.1µ F
GND
D
CANTX
R
CANRX
TMS320LF243
TMS320F2812
TMS320LF2407A
Sensor, Actuator, or Control
Equipment
Sensor, Actuator, or Control
Equipment
Sensor, Actuator, or Control
Equipment
Figure 25. Typical HVD233 Application
ISO 11898 COMPLIANCE OF SN65HVD230 FAMILY OF 3.3-V CAN TRANSCEIVERS
Introduction
Many users value the low power consumption of operating their CAN transceivers from a 3.3 V supply. However,
some are concerned about the interoperability with 5-V supplied transceivers on the same bus. This report
analyzes this situation to address those concerns.
Differential Signal
CAN is a differential bus where complementary signals are sent over two wires and the voltage difference
between the two wires defines the logical state of the bus. The differential CAN receiver monitors this voltage
difference and outputs the bus state with a single-ended output signal.
18
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NOISE MARGIN
900 mV Threshold
RECEIVER DETECTION WINDOW
75% SAMPLE POINT
500 mV Threshold
NOISE MARGIN
Figure 26. Typical SN65HVD230 Differential Output Voltage Waveform
The CAN driver creates the difference voltage between CANH and CANL in the dominant state. The dominant
differential output of the SN65HVD230 is greater than 1.5 V and less than 3 V across a 60-ohm load. The
minimum required by ISO 11898 is 1.5 V and maximum is 3 V. These are the same limiting values for 5-V
supplied CAN transceivers. The bus termination resistors drive the recessive bus state and not the CAN driver.
A CAN receiver is required to output a recessive state with less than 500 mV and a dominant state with more
than 900 mV difference voltage on its bus inputs. The CAN receiver must do this with common-mode input
voltages from -2 V to 7 V. The SN65HVD230 family receivers meet these same input specifications as 5-V
supplied receivers.
Common-Mode Signal
A common-mode signal is an average voltage of the two signal wires that the differential receiver rejects. The
common-mode signal comes from the CAN driver, ground noise, and coupled bus noise. Obviously, the supply
voltage of the CAN transceiver has nothing to do with noise. The SN65HVD230 family driver lowers the
common-mode output in a dominant bit by a couple hundred millivolts from that of most 5-V drivers. While this
does not fully comply with ISO 11898, this small variation in the driver common-mode output is rejected by
differential receivers and does not effect data, signal noise margins or error rates.
Interoperability of 3.3-V CAN in 5-V CAN Systems
The 3.3-V supplied SN65HVD23x family of CAN transceivers are electrically interchangeable with 5-V CAN
transceivers. The differential output is the same. The recessive common-mode output is the same. The dominant
common-mode output voltage is a couple hundred millivolts lower than 5-V supplied drivers, while the receivers
exhibit identical specifications as 5-V devices.
Electrical interoperability does not assure interchangeability however. Most implementers of CAN buses
recognize that ISO 11898 does not sufficiently specify the electrical layer and that strict standard compliance
alone does not ensure interchangeability. This comes only with thorough equipment testing.
BUS CABLE
The ISO-11898 Standard specifies a maximum bus length of 40 m and maximum stub length of 0.3 m with a
maximum of 30 nodes. However, with careful design, users can have longer cables, longer stub lengths, and
many more nodes to a bus. A large number of nodes requires a transceiver with high input impedance such as
the SN65HVD233.
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The standard specifies the interconnect to be a single twisted-pair cable (shielded or unshielded) with 120-Ω
characteristic impedance (ZO). Resistors equal to the characteristic impedance of the line terminate both ends of
the cable to prevent signal reflections. Unterminated drop-lines (stubs) connecting nodes to the bus should be
kept as short as possible to minimize signal reflections.
SLOPE CONTROL
The rise and fall slope of the SN65HVD233 driver output can be adjusted by connecting a resistor from Rs (pin 8)
to ground (GND), or to a low-level input voltage as shown in Figure 27.
The slope of the driver output signal is proportional to the pin's output current. This slope control is implemented
with an external resistor value of 10 kΩ to achieve a ≈15 V/µs slew rate, and up to 100 kΩ to achieve a ≈2.0 V/µs
slew rate as displayed in Figure 28. Typical driver output waveforms with slope control are displayed in
Figure 29.
10 kΩ
to
100 kΩ
D
GND
Vcc
R
1
2
3
4
8
Rs
7
6
5
CANH
CANL
LBK
IOPF6
TMS320LF2407
Figure 27. Slope Control/Standby Connection to a DSP
25
Slope (V/us)
20
15
10
5
0
0
4.7 6.8
10
15
22
33
47
68
100
Slope Control Resistance - kΩ
Figure 28. SN65HVD233 Driver Output Signal Slope vs Slope Control Resistance Value
20
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Rs = 0 Ω
Rs = 10 k Ω
Rs = 100 k Ω
Figure 29. Typical SN65HVD233 250-kbps Output Pulse Waveforms With Slope Control
STANDBY
If a high-level input (> 0.75 VCC) is applied to Rs (pin 8), the circuit enters a low-current, listen only standby mode
during which the driver is switched off and the receiver remains active. The local controller can reverse this
low-power standby mode when the rising edge of a dominant state (bus differential voltage >900 mV typical)
occurs on the bus.
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PACKAGE OPTION ADDENDUM
www.ti.com
8-Dec-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
SN65HVD233MDREP
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
V62/09611-01XE
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN65HVD233-EP :
• Catalog: SN65HVD233
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
Addendum-Page 1
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