ETC STD4A60S

STD4A60S
SemiWell Semiconductor
Sensitive Gate Triacs
Symbol
○
Features
2.T2
▼▲
Repetitive Peak Off-State Voltage : 600V
R.M.S On-State Current ( IT(RMS)= 4 A )
◆ High Commutation dv/dt
◆ Sensitive Gate Triggering 4 Mode
◆
○
◆
1.T1
3.Gate
○
D-PAK(TO-252)
General Description
2
This device is sensitive gate triac suitable for direct coupling
to TTL, HTL, CMOS and application such as various logic
functions, low power AC switching applications, such as fan
speed, small light controllers and home appliance equipment.
1
3
Absolute Maximum Ratings
Symbol
( TJ = 25°C unless otherwise specified )
Parameter
Condition
Ratings
Units
600
V
4.0
A
30/33
A
I2 t
4.5
A2 s
Peak Gate Power Dissipation
1.5
W
Average Gate Power Dissipation
0.1
W
IGM
Peak Gate Current
1.0
A
VGM
Peak Gate Voltage
7.0
V
Operating Junction Temperature
- 40 ~ 125
°C
Storage Temperature
- 40 ~ 150
°C
VDRM
Repetitive Peak Off-State Voltage
IT(RMS)
R.M.S On-State Current
TC = 109 °C
ITSM
Surge On-State Current
One Cycle, 50Hz/60Hz, Peak,
Non-Repetitive
I2 t
PGM
PG(AV)
TJ
TSTG
Jul, 2003. Rev. 3
1/5
copyright@SemiWell Semiconductor Co., LTd., All rights reserved.
STD4A60S
Electrical Characteristics
Symbol
Items
Ratings
Min.
Typ.
Max.
Unit
IDRM
Repetitive Peak Off-State
Current
VD = VDRM, Single Phase, Half Wave
TJ = 125 °C
─
─
1.0
mA
VTM
Peak On-State Voltage
IT = 6 A, Inst. Measurement
─
─
1.6
V
─
─
5
─
─
5
I+GT1
Ⅰ
I -GT1
Ⅱ
Gate Trigger Current
VD = 6 V, RL=10 Ω
mA
I -GT3
Ⅲ
─
─
5
I+GT3
Ⅳ
─
8
12
V+GT1
Ⅰ
─
─
1.4
V-GT1
Ⅱ
─
─
1.4
Gate Trigger Voltage
VD = 6 V, RL=10 Ω
V
V-GT3
Ⅲ
─
─
1.4
V+GT3
Ⅳ
─
1.6
2.0
0.2
─
─
V
5
─
─
V/㎲
─
─
10
mA
─
─
2.6
°C/W
VGD
(dv/dt)c
IH
Rth(j-c)
2/5
Conditions
Non-Trigger Gate Voltage
TJ = 125 °C, VD = 1/2 VDRM
Critical Rate of Rise Off-State
Voltage at Commutation
TJ = 125 °C, [di/dt]c = -2.0 A/ms,
VD=2/3 VDRM
Holding Current
Thermal Impedance
Junction to case
STD4A60S
Fig 1. Gate Characteristics
Fig 2. On-State Voltage
2
10
1
10
VGM (7V)
On-State Current [A]
PG(AV) (0.1W)
0
25 ℃
I+GT3
25 ℃
I+GT1
I -GT1
I -GT3
10
IGM (1A)
Gate Voltage [V]
PGM (1.5W)
1
10
o
125 C
0
10
o
25 C
VGD(0.2V)
-1
10
-1
10
0
1
10
10
2
3
10
0.5
Power Dissipation [W]
4.5
2π
θ
4.0
360°
3.5
θ
3.0
: Conduction Angle
2.5
Allowable Case Temperature [ oC]
θ
θ
θ
θ
5.5
θ
2.0
2.5
3.0
3.5
4.0
4.5
Fig 4. On State Current vs.
Allowable Case Temperature
6.0
π
1.5
On-State Voltage [V]
Fig 3. On State Current vs.
Maximum Power Dissipation
5.0
1.0
10
Gate Current [mA]
o
= 180
o
= 150
o
= 120
o
= 90
θ = 60
o
θ = 30
o
2.0
1.5
1.0
130
125
120
115
o
θ
π
110
θ = 30o
θ = 60 o
θ = 90 o
θ = 120
o
θ = 150
o
θ = 180
2π
θ
105
360°
θ
100
: Conduction Angle
0.5
0.0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
95
0.0
5.0
0.5
1.0
1.5
RMS On-State Current [A]
2.0
2.5
3.0
3.5
4.0
4.5
5.0
RMS On-State Current [A]
Fig 6. Gate Trigger Voltage vs.
Junction Temperature
Fig 5. Surge On-State Current Rating
( Non-Repetitive )
3
35
10
50Hz
o
15
10
-
V GT3
2
10
V
5
0
0
10
+
GT1
-
V GT1
o
20
V
VGT (25 C)
X 100 (%)
60Hz
25
VGT (t C)
Surge On-State Current [A]
30
+
GT3
1
10
1
10
Time (cycles)
2
10
-50
0
50
100
150
o
Junction Temperature [ C]
3/5
STD4A60S
Fig 7. Gate Trigger Current vs.
Junction Temperature
Fig 8. Transient Thermal Impedance
3
10
o
I
+
I
-
I
GT1
GT1
GT3
o
IGT (t C)
2
10
IGT (25 C)
X 100 (%)
o
Transient Thermal Impedance [ C/W]
10
I
+
GT3
1
1
10
-50
0
50
100
150
-2
-1
10
0
10
o
1
10
2
10
10
Time (sec)
Junction Temperature [ C]
Fig 9. Gate Trigger Characteristics Test Circuit
10Ω
10Ω
▼▲
6V
▼▲
●
A
V
4/5
10Ω
▼▲
●
6V
RG
10Ω
A
V
●
6V
RG
▼▲
A
V
RG
6V
●
A
V
●
●
●
●
Test Procedure Ⅰ
Test Procedure Ⅱ
Test Procedure Ⅲ
Test Procedure Ⅳ
RG
STD4A60S
TO-252(D-PAK) Package Dimension
mm
Dim.
Min.
Typ.
A
6.48
6.604
B
5.0
5.08
C
7.42
7.8
D
2.184
E
F
Inch
Max.
Min.
Typ.
6.73
0.255
0.26
0.265
5.21
0.197
0.2
0.205
8.18
0.292
0.307
0.322
2.286
2.388
0.086
0.09
0.094
0.762
0.813
0.864
0.03
0.032
0.034
1.016
1.067
1.118
0.04
0.042
0.044
G
2.286
0.09
H
2.286
0.09
Max.
I
0.534
0.61
0.686
0.021
0.024
0.027
J
1.016
1.067
1.118
0.04
0.042
0.044
K
0.508
0.02
L
0.762
0.03
φ
1.57
0.06
A
D
E
B
φ
F
C
I
2
1
G
3
K
H
L
1. T1
2. T2
3. Gate
J
5/5