TI TPIC2322LD

SLIS036A − JUNE 1994 − REVISED OCTOBER 1994
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Low rDS(on) . . . 0.6 Ω Typ
High-Voltage Outputs . . . 60 V
Pulsed Current . . . 2.25 A Per Channel
Fast Commutation Speed
Direct Logic-Level Interface
D PACKAGE
(TOP VIEW)
DRAIN1
GATE2
DRAIN2
DRAIN3
1
8
2
7
3
6
4
5
GATE1
SOURCE/GND
SOURCE/GND
GATE3
description
The TPIC2322L is a monolithic logic-level power DMOS array that consists of three electrically isolated
N-channel enhancement-mode DMOS transistors configured with a common source and open drains.
The TPIC2322L is offered in a standard eight-pin small-outline surface-mount (D) package and is characterized
for operation over the case temperature range of − 40°C to 125°C.
schematic
DRAIN2
DRAIN1
1
Q1
GATE1
8
DRAIN3
3
4
Q2
Z1
GATE2
Q3
2
Z2
GATE3
5
Z3
6, 7
SOURCE, GND
absolute maximum ratings over operating case temperature range (unless otherwise noted)†
Drain-to-source voltage, VDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 V
Gate-to-GND voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 V
Drain-to-GND voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 V
Gate-to-source voltage, VGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 V
Continuous drain current, each output, all outputs on, TC = 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.75 A
Continuous source-to-drain diode current, TC = 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.75 A
Pulsed drain current, each output, Imax, TC = 25°C (see Note 1 and Figure 15) . . . . . . . . . . . . . . . . . . 2.25 A
Single-pulse avalanche energy, EAS, TC = 25°C (see Figure 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30.4 mJ
Continuous total power dissipation at (or below) TC = 25°C (see Figure 15) . . . . . . . . . . . . . . . . . . . . 0.95 W
Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 150°C
Operating case temperature range, TC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 125°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: Pulse duration = 10 ms and duty cycle = 2%.
Copyright  1994, Texas Instruments Incorporated
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2−1
SLIS036A − JUNE 1994 − REVISED OCTOBER 1994
electrical characteristics, TC = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
ID = 250 µA,
ID = 1 mA,
See Figure 5
TYP
MAX
V(BR)DSX
Drain-to-source breakdown voltage
VGS(th)
Gate-to-source threshold voltage
V(BR)
Reverse drain to GND breakdown voltage
Drain to GND current = 250 µA
VDS(on)
Drain-to-source on-state voltage
ID = 0.75 A,
See Notes 2 and 3
VF(SD)
Forward on-state voltage, source-to-drain
IS = 0.75 A,
VGS = 0
See Notes 2 and 3 and Figure 12
IDSS
Zero-gate-voltage drain current
VDS = 48 V,
VGS = 0
TC = 25°C
TC = 125°C
IGSSF
IGSSR
Forward gate current, drain short circuited to source
VGS = 16 V,
VSG = 16 V,
VDS = 0
VDS = 0
Leakage current, drain-to-GND
VDGND = 48 V
TC = 25°C
TC = 125°C
0.5
10
TC = 25°C
0.6
0.7
Static drain-to-source on-state resistance
VGS = 5 V,
ID = 0.75 A,
See Notes 2 and 3
and Figures 6 and 7
TC = 125°C
0.94
1
Ilkg
rDS(on)
Reverse gate current, drain short circuited to source
VGS = 0
VDS = VGS,
MIN
Forward transconductance
Ciss
Short-circuit input capacitance, common source
Coss
Short-circuit output capacitance, common source
Crss
Short-circuit reverse transfer capacitance,
common source
VDS = 25 V,
f = 1 MHz,
1.5
V
1.85
2.2
100
VGS = 5 V,
V
V
0.45
0.53
V
0.85
1
V
0.05
1
0.5
10
10
100
nA
10
100
nA
0.05
1
µA
A
µA
A
Ω
VDS = 15 V,
ID = 0.5 A,
See Notes 2 and 3 and Figure 9
gfs
60
UNIT
0.75
VGS = 0,
See Figure 11
0.9
S
115
145
60
75
30
40
pF
NOTES: 2. Technique should limit TJ − TC to 10°C maximum.
3. These parameters are measured with voltage-sensing contacts separate from the current-carrying contacts.
source-to-drain diode characteristics, TC = 25°C (see schematic diagram)
PARAMETER
trr
QRR
2−2
Reverse-recovery time
Total diode charge
TEST CONDITIONS
IF = 0.375 A,
di/dt = 100 A /µs,
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VDS = 48 V,
See Figures 1 and 14
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MIN
TYP
MAX
UNIT
85
ns
0.19
µC
SLIS036A − JUNE 1994 − REVISED OCTOBER 1994
resistive-load switching characteristics, TC = 25°C
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
21
42
26
52
14
28
td(on)
td(off)
Turn-on delay time
tr
tf
Rise time
Fall time
13
26
Qg
Total gate charge
1.8
2.3
Qgs(th)
Threshold gate-to-source charge
0.4
0.5
Qgd
Gate-to-drain charge
1.1
1.4
LD
Internal drain inductance
5
LS
Internal source inductance
5
Rg
Internal gate resistance
Turn-off delay time
VDD = 25 V,
tdis = 10 ns,
VDS = 48 V,
See Figure 3
RL = 67 Ω,
See Figure 2
ID = 0.375 A,
ten = 10 ns,
VGS = 5 V,
UNIT
ns
nC
nH
Ω
0.25
thermal resistance
PARAMETER
TEST CONDITIONS
RθJA
Junction-to-ambient thermal resistance,
See Note 4
RθJP
Junction-to-pin thermal resistance
MIN
All outputs with equal power
TYP
MAX
UNIT
130
°C/ W
44
°C/ W
NOTE 4: Package mounted on an FR4 printed-circuit board with no heat sink.
PARAMETER MEASUREMENT INFORMATION
1.5
VDS = 48 V
VGS = 0 V
TJ = 25°C
Z1, Z2, and Z3
I S − Source-to-Drain Diode Current − A
1
Reverse di/dt = 100 A/µs
0.5
0
− 0.5
25% of IRM†
−1
Shaded Area = QRR
− 1.5
−2
trr(SD)
IRM†
− 2.5
0
50
100
150
200 250 300
t −Time − ns
† IRM = maximum recovery current
350
400
450
500
Figure 1. Reverse-Recovery-Current Waveform of Source-to-Drain Diode
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2−3
SLIS036A − JUNE 1994 − REVISED OCTOBER 1994
PARAMETER MEASUREMENT INFORMATION
VDD = 25 V
RL
ten
VDS
tdis
5V
VGS
Pulse Generator
VGS
0V
DUT
Rgen
td(off)
td(on)
50 Ω
CL = 30 pF
(see Note A)
50 Ω
tr
tf
VDD
VDS
VDS(on)
VOLTAGE WAVEFORMS
TEST CIRCUIT
NOTE A: CL includes probe and jig capacitance.
Figure 2. Resistive-Switching Test Circuit and Voltage Waveforms
Current
Regulator
12-V
Battery
0.2 µF
Same Type
as DUT
50 kΩ
Qg
5V
0.3 µF
Qgs(th)
VDD
VDS
0
VGS
DUT
IG = 1 µA
Qgd
Gate Voltage
Time
IG CurrentSampling Resistor
ID CurrentSampling Resistor
VOLTAGE WAVEFORM
TEST CIRCUIT
Figure 3. Gate-Charge Test Circuit and Voltage Waveform
2−4
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PARAMETER MEASUREMENT INFORMATION
VDD = 25 V
tav
tw
7 mH
Pulse Generator
(see Note A)
ID
5V
VDS
VGS
0V
IAS
(see Note B)
VGS
50 Ω
DUT
ID
0V
Rgen
50 Ω
V(BR)DSX = 60 V Min
VDS
0V
VOLTAGE AND CURRENT WAVEFORMS
TEST CIRCUIT
NOTES: A. The pulse generator has the following characteristics: tr ≤ 10 ns, tf ≤ 10 ns, ZO = 50 Ω.
B. Input pulse duration (tw) is increased until peak current IAS = 2.25 A.
I
V
t av
AS
(BR)DSX
Energy test level is defined as E
+
+ 30.4 mJ.
AS
2
Figure 4. Single-Pulse Avalanche Energy Test Circuit and Waveforms
TYPICAL CHARACTERISTICS
STATIC DRAIN-TO-SOURCE ON-STATE RESISTANCE
vs
JUNCTION TEMPERATURE
2.5
1.5
VDS = VGS
ID = 0.75 A
2
ID = 1 mA
1.5
ID = 100 µA
1
0.5
0
−40 −20
1.2
On-State Resistance − Ω
r DS(on) − Static Drain-to-Source
VGS(th) − Gate-to-Source Threshold Voltage − V
GATE-TO-SOURCE THRESHOLD VOLTAGE
vs
JUNCTION TEMPERATURE
0.9
VGS = 5 V
0.6
0.3
0
−40 −20
0
20 40 60 80 100 120 140 160
TJ − Junction Temperature − °C
VGS = 4.5 V
Figure 5
0
20 40 60 80 100 120 140 160
TJ − Junction Temperature − °C
Figure 6
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SLIS036A − JUNE 1994 − REVISED OCTOBER 1994
TYPICAL CHARACTERISTICS
DRAIN CURRENT
vs
DRAIN-TO-SOURCE VOLTAGE
STATIC DRAIN-TO-SOURCE ON-STATE RESISTANCE
vs
DRAIN CURRENT
1
2.25
TJ = 25°C
nVGS = 0.2 V
TJ = 25°C
2
1.75 V
GS = 5 V
0.7
I D − Drain Current − A
0.8
On-State Resistance − Ω
r DS(on) − Static Drain-to-Source
0.9
VGS = 4.5 V
0.6
VGS = 5 V
VGS = 4 V
1.5
1.25
1
0.75
VGS = 3 V
0.5
0.5
0.25
0.4
0.01
1
0.1
0
10
1
0
Figure 7
TJ = 25°C
TJ = 75°C
2
TJ = 125°C
I D − Drain Current − A
1.75
35
30
25
20
15
1.5
1.25
1
0.75
TJ = 150°C
10
0.5
5
0.25
0
0
0.92
0.915
0.91
0.905
0.9
0.895
0.89
TJ = − 40°C
0.885
Percentage of Units − %
5
2.25
Total Number of Units = 639
VDS = 15 V
ID = 0.5 A
TJ = 25°C
0
gfs − Forward Transconductance − S
2
3
4
1
VGS − Gate-to-Source Voltage − V
Figure 10
Figure 9
2−6
4
DRAIN CURRENT
vs
GATE-TO-SOURCE VOLTAGE
50
40
3
Figure 8
DISTRIBUTION OF
FORWARD TRANSCONDUCTANCE
45
2
VDS − Drain-to-Source Voltage − V
ID − Drain Current − A
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SLIS036A − JUNE 1994 − REVISED OCTOBER 1994
TYPICAL CHARACTERISTICS
SOURCE-TO-DRAIN DIODE CURRENT
vs
SOURCE-TO-DRAIN VOLTAGE
CAPACITANCE
vs
DRAIN-TO-SOURCE VOLTAGE
10
400
180
I SD − Source-to-Drain Diode Current − A
360
Capacitance − pF
VGS = 0
VGS = 0
f = 1 MHz
TJ = 25°C
Ciss(0) = 158 pF
Coss(0) = 400 pF
Crss(0) = 78 pF
160
Ciss
120
80
Coss
40
Crss
4
8
12 16 20 24 28 32 36
VDS − Drain-to-Source Voltage − V
40
TJ = 25°C
TJ = 125°C
REVERSE-RECOVERY TIME
vs
REVERSE di/dt
100
12
50
10
VDD = 20 V
8
VDD = 30 V
30
6
20
4
VDD = 48 V
10
t rr − Reverse-Recovery Time − ns
ID = 0.375 A
TJ = 25°C
See Figure 3
VGS − Gate-to-Source Voltage − V
14
70
VDS − Drain-to-Source Voltage − V
10
Figure 12
DRAIN-TO-SOURCE VOLTAGE AND
GATE-TO-SOURCE VOLTAGE
vs
GATE CHARGE
40
TJ = 75°C
1
VSD − Source-to-Drain Voltage − V
Figure 11
60
TJ = − 40°C
TJ = 150°C
0.1
0.01
0.1
0
0
1
VDS = 48 V
VGS = 0
IS = 0.375 A
TJ = 25°C
See Figure 1
75
50
Z1, Z2, and Z3
25
2
VDD = 20 V
0
0
0
0
0.5
1
1.5
Qg − Gate Charge − nC
2
0
100
200
300
400
500
600
Reverse di/dt − A/µs
Figure 13
Figure 14
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SLIS036A − JUNE 1994 − REVISED OCTOBER 1994
THERMAL INFORMATION
MAXIMUM PEAK AVALANCHE CURRENT
vs
TIME DURATION OF AVALANCHE
MAXIMUM DRAIN CURRENT
vs
DRAIN-TO-SOURCE VOLTAGE
4
10
I AS − Maximum Peak Avalanche Current − A
I D − Maximum Drain Current − A
TC = 25°C
1 µs†
10 ms†
1
1 ms†
500 µs†
DC Conditions
0.1
0.1
10
1
VDS − Drain-to-Source Voltage − V
See Figure 4
3
2
TC = 25°C
TC = 125°C
1
0.01
100
0.1
Figure 16
† Less than 2% duty cycle
Figure 15
2−8
1
tav − Time Duration of Avalanche − ms
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THERMAL INFORMATION
D PACKAGE†
NORMALIZED JUNCTION - TO -AMBIENT THERMAL RESISTANCE
vs
PULSE DURATION
R θJA − Normalized Junction-to-Ambient Thermal Resistance − °C/W
10
1
DC Conditions
d = 0.5
d = 0.2
d = 0.1
0.1
d = 0.05
d = 0.02
d = 0.01
0.01
Single Pulse
0.001
tc
tw
ID
0
0.0001
0.0001
0.001
0.01
0.1
1
10
tw − Pulse Duration − s
† Device mounted on FR4 printed-circuit board with no heat sink.
NOTES: ZθA(t) = r(t) RθJA
tw = pulse duration
tc = cycle time
d = duty cycle = tw/tc
Figure 17
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77251−1443
2−9
2−10
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PACKAGE OPTION ADDENDUM
www.ti.com
8-Apr-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
TPIC2322LD
OBSOLETE
SOIC
D
Pins Package Eco Plan (2)
Qty
8
TBD
Lead/Ball Finish
Call TI
MSL Peak Temp (3)
Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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