U2895B Modulation PLL for GSM, DCS and PCS Systems Description The U2895B is a monolithic integrated circuit. It is realized using TEMIC’s advanced silicon bipolar UHF5S technology. The device integrates a mixer, an I/Q modulator, a phase-frequency detector (PFD) with two synchronous programmable dividers, and a charge pump. The U2895B is designed for cellular phones such as GSM900, DCS1800, and PCS1900, applying a transmitter architecture at which the VCO operates at the TX output frequency. No duplexer is needed since the out-of- band noise is very low. The U2895B exhibits low power consumption. Broadband operation gives high flexibility for multi-band frequency mappings. The IC is available in a shrinked small-outline 28-pin package (SSO28). Features Benefits D D D D D D D Supply voltage range 2.7 V to 5.5 V D Novel TX architecture saves filter costs Current consumption 50 mA D Extended battery operating time without duplexer Power-down functions D Less board space (few external components) High-speed PFD and charge pump (CP) D VCO control without voltage doubler Small CP saturation voltages (0.5/0.6 V) D Small SSO28 package Programmable dividers and CP polarity D One device for all GSM bands Electrostatic sensitive device. Observe precautions for handling. Low-current standby mode Block Diagram I NI 1 MDO NMDO ND NND RD NRD 2 3 28 27 12 19 25 20 Voltage reference 90° 2 5 6 MDLO Q NQ PUMIX PU MIXO MIXLO 22 23 Mixer NRF + I/Q modulator 8 16 17 N 1 divider MUX 13 14 PFD 9 Charge pump R 1 divider 7 21 MC RF 15 Mode control 26 4 18 24 GND 11 CPC VSP CPO VS1 VS2 VS3 10 GNDP 15048 Figure 1. Block diagram Rev. A3, 30-Sep-98 1 (16) U2895B Ordering Information Extended Type Number U2895B-AFSG3 Package SSO28 Pin Description I 1 28 Q NI 2 27 NQ MDLO 3 26 VS3 GND 4 25 MIXO MDO 5 24 GND NMDO 6 23 NRF VS1 7 22 RF VSP 8 21 CPO 9 VS2 20 MIXLO 19 PU 11 18 GND PUMIX 12 17 NND 13 16 ND NRD 14 15 MC GNDP 10 CPC RD 12495 Figure 2. Pinning 2 (16) Remarks Taped and reeled ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ Pin 1 2 3 4 5 6 7 8 9 10 11 Symbol I NI MDLO GND 1) MDO NMDO VS1 3) VSP CPO GNDP 2) CPC 12 13 14 15 16 17 18 19 PUMIX RD NRD MC ND NND GND 1) PU 20 21 22 23 24 25 26 27 28 MIXLO VS2 3) RF NRF GND 1) MIXO VS3 3) NQ Q Function In-phase baseband input Complementary to I I/Q-modulator LO input Negative supply I/Q-modulator output Complementary to MDO Positive supply (I/Q MOD) Pos. supply charge-pump Charge-pump output Neg. supply charge pump Charge-pump current control (input) Power-up, mixer only R-divider input Complementary to RD Mode control N-divider input Complementary to ND Negative supply Power-up, whole chip except mixer Mixer LO input Positive supply (MISC.) Mixer RF-input Complementary to RF Negative supply Mixer output Positive supply (mixer) Complementary to Q Quad.-phase baseband input 1) All GND pins must be connected to GND potential. No DC voltage between GND pins! 2) Max. voltage between GNDP and GND pins 200 mV 3) The maximum permissible voltage difference between pins VS1, VS2 and VS3 is 200 mV. v v Rev. A3, 30-Sep-98 U2895B Absolute Maximum Ratings ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ v ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ v v ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ Parameters Supply voltage VS1, VS2, VS3 Supply voltage charge pump VSP Voltage at any input Current at any input / output pin except CPC CPC output currents Ambient temperature Storage temperature Symbol VVS# VVSP VVi# | II# | | IO# | –0.5 | ICPC | Tamb Tstg Value VVSP 5.5 VVS +0.5 2 5.5 5 –20 to +85 –40 to +125 Unit V V V mA mA °C °C Operating Range ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ Thermal Resistance ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ Parameters Supply voltage Ambient temperature Symbol VVS#, VVSP Tamb Value 2.7 to 5.5 –20 to +85 Unit V °C Parameters Junction ambient SSO28 Symbol RthJA Value 130 Unit K/W Electrical Characteristics VS = 2.7 to 5.5 V, Tamb = –20°C to +85°C, final test at 25°C ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ m ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ m ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ m ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ m ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ W ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ W ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ W ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁ ÁÁÁÁ Parameters DC supply Supply voltages VS# Supply voltage VSP Supply pp y current IVS1 Test Conditions / Pin VVS1 = VVS2 = VVS3 Active (VPU = VS) Standby (VPU = 0) Supply pp y current IVS2 Active (VPU = VS) Standby (VPU = 0) Supply pp y current IVS3 Active (VPUMIX = VS) Standby (VPUMIX = 0) 1) Supply current IVSP Active (VPU = VS, CPC open) Standby (VPU = 0) N & R divider inputs ND, NND & RD, NRD N:1 divider frequency 50- source R:1 divider frequency 50- source Input impedance Active & standby Input sensitivity 50- source 1) Symbol Min. VVS# VVSP 2.7 VVS# – 0.3 IVS1A IVS1Y IVS2A IVS2Y IVS3A IVS3Y IVSPA 17 17 13 1.4 IVSPY fND fRD ZRD, ZND VRD, VND Typ. 100 100 1 kΩ 20 Max. Unit 5.5 5.5 V V 22 20 22 20 17 30 1.8 mA A mA A mA A mA 20 A 600 600 2 pF 200 MHz MHz – mVrms Mean value, measured with FND = 151 MHz, FRD = 150 MHz, current vs. time, see page 6, figure 3. Rev. A3, 30-Sep-98 3 (16) U2895B Electrical Characteristics (continued) VS = 2.7 to 5.5 V, Tamb = –20°C to +85°C, final test at 25°C ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ W ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ W ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ W ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ W ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ Parameters Test Conditions / Pin Phase-frequency detector (PFD) PFD operation fND = 450 MHz, N = 2 fRD = 450 MHz, R = 2 Frequency comparison fND = 600 MHz, N = 2 only 3) fRD = 450 MHz, R = 2 I/Q modulator baseband inputs I, NI & Q, NQ DC voltage Referred to GND MD_IQ AC voltage 4) Min. fPFD 50 Typ. fFD VI, VNI, VQ, VNQ 1.35 fIO ACI, ACNI, ACQ, ACNQ ACDI, ACDQ DC fMDLO ZMDLO PMDLO 100 Frequency range Referred to GND Differential (preferres) I/Q modulator LO input MDLO MDLO Frequency range Input impedance Active & standby Input level 50- source I/Q modulator outputs MDO, NMDO DC current VMDO, VNMDO = VS Voltage compliance VMDO, VNMDO = VC MDO output level 500 to VS 5) (differential) Carrier suppression 5) Sideband suppression 5) IF spurious 5) fLO ± 3 fmod 5) Noise @ 400 kHz off carrier Frequency range Mixer (900 MHz) RF input level 900 MHz LO-spurious at @ P9MIXLO = –10 dBm RF/NRF port @ P9RF = –15 dBm MIXLO input level 0.05 to 2 GHz MIXO (100- load) Frequency range Output level 6) @ P9MIXLO = –15 dBm Carrier suppression @ P9MIXLO = –15 dBm Symbol VS1/2 –20 IMDO, INMDO VCMDO, VCNMDO VS – 0.7 PMDO 120 Max. Unit 225 MHz 300 MHz VS1/2 + 0.1 1 V 200 MHz mVpp 400 mVpp 250 –15 850 MHz –10 dBm 5.5 150 mA V mVrms –45 –115 450 dBc dBc dBc dBc/Hz MHz 2.4 CSMDO SSMDO SPMDO NMDO fMDO –32 –35 –35 –40 –50 P9RF SP9RF –23 –17 –40 dBm dBm P9MIXLO fMIXO P9MIXO CS9MIXO –22 50 –12 450 dBm MHz mVrms dBc 100 70 –20 3) PFD can be used as a frequency comparator until 300 MHz for loop acquisition 4) Single-ended operation (complementary baseband input is AC-grounded) leads to reduced linearity (degrading suppression of odd harmonics) 5) With typical drive levels at MDLO- & I/Q-inputs 6) –1 dB compression point (CP-1) 4 (16) Rev. A3, 30-Sep-98 U2895B Electrical Characteristics (continued) VS = 2.7 to 5.5 V, Tamb = –20°C to +85°C, final test at 25°C ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ Á ÁÁÁ Á ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ m ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ Á ÁÁÁ ÁÁÁÁ Á ÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ m ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ m ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ m ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ Á ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ m ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ m ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁ m ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ Parameters Test Conditions / Pin Symbol Mixer (1900 MHz) RF input level 0.5 to 2 GHz P19RF LO-spurious at @ P19MIXLO = –10 dBm SP19RF RF/NRF ports @ P19RF = –15 dBm MIXLO input level 0.05 to 2 GHz P19MIXLO MIXO (100 W load) Output level 6) @ P19MIXLO = –17 dBm P19MIXO Carrier suppression @ P19MIXLO = –17 dBm CS19MIXO Charge-pump output CPO (VVSP = 5 V; VCPO = 2.5 V) Pump-current CPC open for DC | ICPO | p ppulse RCPC = 2.2 kΩ 7) | ICPO 2 | PCPC = 680 Ω 7) | ICPO_4 | TK pump current Tk_| ICPC | Mismatch source / sink (ICPOSI – ICPOSO)/ICPOSI MICPO current ICPOSO = Isourc ICPOSI = Isink Sensivity to VSP SICPO DI | CPO | | DVSP | VSP I CPO Min. VCPO voltage range VCPO Charge-pump control input CPC Compensation capacitor CCPC Short circuit current 8) CPC grounded | ICPCK | Mode control Sink current VMC = VS IMC Power-up input PU (power-up for all functions, except mixer) Settling time Output power within 10% SPU of steady state values High level Active VPUH Low level Standby VPUL High-level current Active, VPUH = 2.2 V IPUH Low-level current Standby, VPUL = 0.4 V IPUL Power-up input PUMIX (power-up for mixer only) Settling time Output power within 10% tsetl of steady state values High level Active VPUMIXH Low level Standby VPUMIXL High-level current Active, VPUMIXH = 2.2 V IPUMIXH Low-level current Standby, IPUMIXL VPUMIXL = 0.4 V 0.5 6) – 1 dB compression point (CP – 1) 7) RCPC: external resistor to GND for charge-pump current control 8) See figure 7. Rev. A3, 30-Sep-98 Typ. Max. Unit –23 –17 –40 dBm dBm –22 –12 dBm 55 mVrms dBc –20 0.7 1.4 3 1 2 4 1.3 2.6 5 15 0.1 mA mA mA %/100°K – 0.1 – VVSP–0.6 V 500 1.6 pF mA 60 5 10 s 50 0.4 75 20 V V A A 5 10 s VS2 0.4 75 20 V V A A 2.0 0 –1 2.0 0 50 –1 A 5 (16) U2895B Supply Current of the Charge Pump IVSP vs. Time Initial Charge-Pump Current after Power-Up Due to the pulsed operation of the charge pump, the current into the charge-pump supply pin VSP is not constant. Depending on I (see figure 6) and the phase difference at the phase detector inputs, the current IVSP over time varies. Basically, the total current is the sum of the quiescent current, the charge-/discharge current, and – after each phase comparison cycle – a current spike (see figure 3). Due to stability reasons, the reference current generator for the charge pump needs an external capacitor (>500 pF from CPC to GND). After power-up, only the on-chip generated current I = ICPCK is available for charging the external capacitor. Due to the charge pump’s architecture, the charge pump current will be 2 I = 2 ICPCK until the voltage on CPC has reached the reference voltage (1.1 V). The following figures illustrate this behavior. ICPCK x RCPC Up VCPC Down 5I VRef IVSP 3I I t1 t 2I t0 t t2 2x ICPCK ICPO t ICPC –2I 14552 Figure 3. Supply current of the charge pump = f(t) I Internal current, I, |ICPC| and ICPC vs. RCPC RCPC CPC open 2.2 kW 680 W (typical values) I 0.5 mA 1.0 mA 2.0 mA |ICPCO| 1 mA 2 mA 4 mA ICPC 0 –0.5 mA –1.5 mA t t1 14561 [ ³ [ [ ³ [ Time t1 can be calculated as t1 (1.1 V CCPC)/ICPCK e.g., CCPC = 1 nF, ICPCK = 2.7 mA t1 0.4 ms. Time t2 can be calculated as t2 (RCPC/2200 W) CCPC e.g., CCPC = 1 nF, RCPC = 2200 W t2 1.1 ms Figure 4. The behavior of |ICPO| after power-up can be very advantageous for a fast settling of the loop. By using larger capacitors (>1 nF), an even longer period with maximum charge pump current is possible. Ramp-up time for the internal band gap reference is about 1 ms. This time has to be added to the times calculated for the charge pump reference. 6 (16) Rev. A3, 30-Sep-98 U2895B Mode Selection The device can be programmed to different modes via an external resistor RMODE (including short, open) from Pin MC to VS2. The mode is distinguished from specific N-, R-divider ratios, and the polarity of the charge pump current. Mode 1 2 3 4 5 1) 2) 3) 4) Mode Selection Resistance between Pin MC and Pin VS2 0 (<50 W) 2.7 kW (±5%) 10 kW (±5%) 47 kW (±5%) (>1 MW) R N-Divider R-Divider 1:1 1:1 1:1 2:1 2:1 1:1 1:1 2:1 2:1 2:1 CPO Current Polarity 4) fN < fR 1) fN > fR 1) Sink Source Source Source Sink Source Sink Sink Sink Source Application PCN/PCS 2) GSM 3) Frequencies referred to PFD input LO frequencies below VCO frequency LO frequencies above VCO frequency Sink current into Pin CPO. Source: current out from Pin CPO. Equivalent Circuits at the IC’s Pins VS1 MDO NMDO VBias_MDLO 2230 Ω 2230 Ω 250 Ω L,Q MDLO NI, NQ VRef_input VRef_MDLO VRef_output 30 pF GND Baseband input LO input Output 15049 Figure 5. I/Q modulator 1 kΩ 1 kΩ VBias_RF VBias_LO VS3 RF 890 Ω 890 Ω NRF 1.6 kΩ 1.6 kΩ MIXLO VRef_RF 6.3 Ω 40 pF VRef_LO MIXO GND LO input Output 14554 Figure 6. Mixer Rev. A3, 30-Sep-98 7 (16) U2895B VS2 4 VSP 4 4 ICPCK /4 I CPC up Ref 1.1 V 2I down CPO Ref 2I 2230 Ω 2 GND 2 GNDP = Transistor with an emitter area–factor of “n” n 14555 Figure 7. Charge pump VS2 ND/RD 2 kΩ 2 kΩ 20 kΩ PU, PUMIX NND/NRD VRef_div GND 14557 GND 14556 Figure 8. Dividers Figure 9. Power-up VS2 N–divider Logic R–divider C (U) ≅ 2.5 pF @ 2 V C (U) is a non-linear junction capacitance MUX MC Figure 11. ESD-protection diodes 2x 60 µA GND 14559 14898 Figure 10. Mode control 8 (16) Rev. A3, 30-Sep-98 U2895B Application Hints Interfacing Mode Control For some of the baseband ICs it may be necessary to reduce the I/Q voltage swing so that it can be handled by the U2895B. In those cases, the following circuitry can be used. I VS2 NI Q Q a) any single mode U2895B R2 NQ RMode2 MC R2 NI R1 VS2 RMode1 I R1 U2895B RMode R1 Baseband IC U2895B MC b) any 2 modes U2895B NQ U2895B VS2 R1 14914 Figure 12. Interfacing the U2895B to I/Q baseband circuits RMode MC RMode MC Due to a possible current offset in the differential baseband inputs of the U2895B the best values for the carrier suppression of the I/Q modulator can be achieved with voltage driven I/NI-, and Q/NQ-inputs. A value of Rsource = R2/2*RS 1.5 kW should be realized. RS is the sum of R1 (above drawing) and the output resistance of the baseband IC. v VS2 c) any mode & mode 5 36 kΩ or 10 kΩ d) mode 5 & mode 3 or mode 4 15050 Figure 14. Application examples for programming different modes Charg-Pump Current Programming GND CPC RCPC1 = 2.2 kΩ RCPC2 = 1 kΩ (incl. rds_on of FET) 1 nF RCPC1 RCPC2 ‘H’ |I | = 4 mA CPO ‘L’ |ICPO | = 2 mA 12497 Figure 13. Programming the charge-pump current Rev. A3, 30-Sep-98 9 (16) U2895B Test Circuit Baseband input Baseband input <450 mVpp <450 mVpp VAC VAC VDC 1 28 2 27 1.35 V – VS1/2 +0.1 V Modulator LO input VDC 1.35 V –VS1/2 +0.1 V 3 26 VS 4 25 Mixer output 5 24 6 23 VS 7 22 Mixer input VSP 8 21 VS VDO 9 20 Mixer LO input PFD Pulse output 10 19 11 18 12 17 13 16 14 15 50 Ω Modulator outputs 50 Ω 1 nF PFD input 50 Ω PFD input 50 Ω 50 Ω Power–up VS Bias voltage for charge pump output: 0.5 V < VDO < VSP – 0.5 V 50 Ω Mode control VS2 R1 R2 R3 13315 Figure 15. Test circuit 10 (16) Rev. A3, 30-Sep-98 U2895B Application Circuit for DCS1800 (1710 – 1785 MHz) Baseband processor Attention! Differential source impedance seen by the I/NI, Q/NQ inputs should not exceed 1000 Ohms MIXLO 1st IF 50 Ω r_diff MDLO 12 nH 2nd IF 816 MHz, –15 dBm 50 Ω 12 pF 10 pF 10 nH 1 100pF 1288...1323 MHz 1302...1377 MHz 100pF VS 2 3 28 27 12 100 pF Ω 220 Ω 90° 2 5 25 20 100 pF Voltage reference 10 pF 330 Ω 19 22 Mixer 330 6 23 + I/Q modulator 100 nH 100 nH 100 pF 100 pF 100 pF 16 17 8 N 1 divider 100 pF MUX Charge pump PFD 13 100 nH 14 9 R 1 divider 7 RF TX 560 Ω 10 Ω 100 Ω 850...915 MHz 1710...1785 MHz 100 pF MQES50–902 VCO MQE5A1–1747 100 pF VSP 100 pF 10 Ω 330 Ω 1.2 nF 6.8 nF 100 pF VSO 22 pF 250 Ω 21 15 Mode control 100 pF 4 18 24 11 10 26 100 pF R mode control 680W...2.2 kW 470 pF 15051 Figure 16. Application circuit (power-up and 680 W to 2.2 kW charge-pump control is not shown) Measurements Modulation-Loop Settling Time As valid for all PLL loops the settling time depends on several factors. The following figure is an extraction from measurements performed in an arrangement like the application circuit. It shows that a loop settling time of a few ms can be achieved. CPC: 1 kΩ to GND CPC ‘open’ Vertical: VCO tuning voltage 1 V/Div Horizontal: Time 1 ms/Div Figure 17. Rev. A3, 30-Sep-98 11 (16) U2895B Modulation Spectrum & Phase Error Application for GSM900 Figure 18. Modulation spectrum Figure 19. Phase error 12 (16) Rev. A3, 30-Sep-98 U2895B Application for DCS1800 Figure 20. Modulation spectrum Figure 21. Phase error Rev. A3, 30-Sep-98 13 (16) U2895B Application for PCS1900 PCS 1900 USER TOL. Figure 22. Modulation spectrum PCS 1900 Figure 23. Phase error Complete transmitters (including PA) were measured. The test equipment was the R & S CMD55 performing standard approval tests. Typically, the spectrum @ 400 kHz off the center carrier frequency is approximately –65 dB attenuated (–60 dB according specificarion). The 14 (16) corresponding rms phase error is in the range of about 3°. Dimensioning the loop-filters allows you to optimize spectral-and phase error performance. Rev. A3, 30-Sep-98 U2895B Package Information Package SSO28 Dimensions in mm 5.7 5.3 9.10 9.01 4.5 4.3 1.30 0.15 0.15 0.05 0.25 6.6 6.3 0.65 8.45 28 15 technical drawings according to DIN specifications 13018 1 Rev. A3, 30-Sep-98 14 15 (16) U2895B Ozone Depleting Substances Policy Statement It is the policy of TEMIC Semiconductor GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances ( ODSs). The Montreal Protocol ( 1987) and its London Amendments ( 1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. TEMIC Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2 . Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency ( EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C ( transitional substances ) respectively. TEMIC Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances. We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. TEMIC Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 ( 0 ) 7131 67 2594, Fax number: 49 ( 0 ) 7131 67 2423 16 (16) Rev. A3, 30-Sep-98