SN74AUC2G53 SINGLE-POLE DOUBLE-THROW (SPDT) ANALOG SWITCH OR 2:1 ANALOG MULTIPLEXER/DEMULTIPLEXER www.ti.com SCES484B – AUGUST 2003 – REVISED JANUARY 2007 FEATURES • • • • • • • • DCT OR DCU PACKAGE (TOP VIEW) Available in the Texas Instruments NanoFree™ Package Operates at 0.8 V to 2.7 V Sub-1-V Operable Low Power Consumption, 10 µA at 2.7 V High On-Off Output Voltage Ratio High Degree of Linearity Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) COM INH GND GND 1 8 2 7 3 6 4 5 VCC Y1 Y2 A YZP PACKAGE (BOTTOM VIEW) GND GND INH COM 4 5 3 6 2 7 1 8 A Y2 Y1 VCC DESCRIPTION/ORDERING INFORMATION This analog switch is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.1-V to 2.7-V VCC operation. The SN74AUC2G53 can handle both analog and digital signals. The device permits signals with amplitudes of up to VCC (peak) to be transmitted in either direction. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems. ORDERING INFORMATION PACKAGE (1) TA –40°C to 85°C (1) (2) ORDERABLE PART NUMBER TOP-SIDE MARKING (2) NanoFree™ – WCSP (DSBGA) 0.23-mm Large Bump – YZP (Pb-free) Reel of 3000 SN74AUC2G53YZPR _ _ _U4_ SSOP – DCT Reel of 3000 SN74AUC2G53DCTR U53_ _ _ VSSOP – DCU Reel of 3000 SN74AUC2G53DCUR U53_ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site. DCU: The actual top-side marking has one additional character that designates the assembly/test site. YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free). FUNCTION TABLE CONTROL INPUTS INH A ON CHANNEL L L L H Y1 Y2 H X None Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoFree is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2003–2007, Texas Instruments Incorporated SN74AUC2G53 SINGLE-POLE DOUBLE-THROW (SPDT) ANALOG SWITCH OR 2:1 ANALOG MULTIPLEXER/DEMULTIPLEXER www.ti.com SCES484B – AUGUST 2003 – REVISED JANUARY 2007 LOGIC DIAGRAM (POSITIVE LOGIC) A 5 SW SW INH 7 6 1 2 Y1 Y2 COM NOTE A: For simplicity, the test conditions shown in Figures 1 through 4 and 6 through 10 are for the demultiplexer configuration. Signals may be passed from COM to Y1 (Y2) or from Y1 (Y2) to COM. SIMPLIFIED SCHEMATIC, EACH SWITCH (SW) COM Y Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC Supply voltage range (2) –0.5 3.6 V VI Input voltage range (2) (3) –0.5 3.6 V VI/O Switch I/O voltage range (2) (3) –0.5 VCC + 0.5 V IIK Control input clamp current VI < 0 –50 mA II/OK I/O port diode current VI/O < 0 or VI/O > VCC ±50 mA IT On-state switch current current VI/O = 0 to VCC ±50 mA ±100 mA Continuous current through VCC or GND θJA Package thermal impedance (4) Tstg Storage temperature range DCT package 220 DCU package 227 YZP package (1) (2) (3) (4) 2 UNIT °C/W 102 –65 150 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to ground unless otherwise specified. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. The package thermal impedance is calculated in accordance with JESD 51-7. Submit Documentation Feedback SN74AUC2G53 SINGLE-POLE DOUBLE-THROW (SPDT) ANALOG SWITCH OR 2:1 ANALOG MULTIPLEXER/DEMULTIPLEXER www.ti.com SCES484B – AUGUST 2003 – REVISED JANUARY 2007 Recommended Operating Conditions VCC (1) Supply voltage VCC = 0.8 V VIH High-level input voltage MIN MAX 0.8 2.7 UNIT V VCC VCC = 1.1 V to 1.95 V 0.65 × VCC VCC = 2.3 V to 2.7 V V 1.7 VCC = 0.8 V 0 VIL Low-level input voltage VCC = 1.1 V to 1.95 V 0.35 × VCC VI/O I/O port voltage 0 VCC V VI Control input voltage 0 3.6 V VCC = 2.3 V to 2.7 V 0.7 VCC = 0.8 V to 1.6 V ∆t/∆v TA (1) Input transition rise or fall rate V 20 VCC = 1.65 V to 1.95 V 10 VCC = 2.3 V to 2.7 V 3.5 Operating free-air temperature –40 ns/V 85 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER ron ron(p) ∆ron TEST CONDITIONS On-state switch resistance VI = VCC or GND, VINH = VIL (see Figure 1 and Figure 2) Peak on resistance VI = VCC to GND, VINH = VIL (see Figure 1 and Figure 2) Difference of on-state resistance between switches VI = VCC to GND, VC = VIH (see Figure 1 and Figure 2) IS = 4 mA IS = 8 mA IS = 4 mA IS = 8 mA IS = 4 mA IS = 8 mA VCC MIN TYP (1) 1.1 V 1.65 V MAX UNIT 40 12.5 20 2.3 V 6 15 1.1 V 131 180 1.65 V 32 80 2.3 V 15 20 1.1 V 4 1.65 V 1 2.3 V 1 Ω Ω IS(off) Off-state switch leakage current VI = VCC and VO = GND, or VI = GND and VO = VCC, VINH = VIH (see Figure 3) 2.7 V IS(on) On-state switch leakage current VI = VCC or GND, VINH = VIL, VO = Open (see Figure 4) 2.7 V II Control input current VC = VCC or GND 2.7 V ±5 µA ICC Supply current VC = VCC or GND 2.7 V 10 µA Cic Control input capacitance Cio(off) Switch input/output capacitance Cio(on) Switch input/output capacitance (1) ±1 Ω 2.5 V Y 2.5 V COM 2.5 V ±0.1 (1) ±1 ±0.1 (1) 2 3 4.5 9 µA µA pF pF pF TA = 25°C Submit Documentation Feedback 3 SN74AUC2G53 SINGLE-POLE DOUBLE-THROW (SPDT) ANALOG SWITCH OR 2:1 ANALOG MULTIPLEXER/DEMULTIPLEXER www.ti.com SCES484B – AUGUST 2003 – REVISED JANUARY 2007 Switching Characteristics over recommended operating free-air temperature range, CL = 15 pF (unless otherwise noted) (see Figure 5) PARAMETER tpd (1) ten tdis FROM (INPUT) TO (OUTPUT) VCC = 0.8 V COM or Y Y or COM 0.3 INH COM or Y A COM or Y ten tdis (1) TYP VCC = 1.2 V ± 0.1 V MIN MAX VCC = 1.5 V ± 0.1 V MIN 0.3 VCC = 1.8 V ± 0.15 V MAX MIN TYP VCC = 2.5 V ± 0.2 V MAX 0.3 MIN 0.2 UNIT MAX 0.1 9.2 0.5 3.5 0.5 2.2 0.5 1 1.9 0.5 1.8 8.1 0.5 4.2 0.5 3.2 0.5 1.9 3.4 0.5 2.6 9.2 0.5 3.6 0.5 2.3 0.5 1.1 1.9 0.5 1.6 10 0.5 3.6 0.5 2.3 0.5 1.1 2 0.5 1.6 ns ns ns The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance). Switching Characteristics over recommended operating free-air temperature range, CL = 30 pF (unless otherwise noted) (see Figure 5) PARAMETER tpd (1) ten tdis ten tdis (1) FROM (INPUT) TO (OUTPUT) COM or Y Y or COM INH COM or Y A COM or Y VCC = 1.8 V ± 0.15 V VCC = 2.5 V ± 0.2 V MAX MIN UNIT MIN TYP 0.5 1.6 3.1 0.5 2.2 0.5 2.2 3.4 0.5 2.2 0.5 1.6 3 0.5 2.2 0.5 1.6 3 0.5 2.3 0.4 MAX 0.2 ns ns ns The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance). Analog Switch Characteristics TA = 25°C PARAMETER FROM (INPUT) TO (OUTPUT) TEST CONDITIONS CL = 50 pF, RL = 600 Ω, fin = sine wave (see Figure 6) Frequency response (1) (switch ON) COM or Y Y or COM CL = 5 pF, RL = 50 Ω, fin = sine wave (see Figure 6) (1) 4 Adjust fin voltage to obtain 0 dBm at output. Increase fin frequency until dB meter reads –3 dB. Submit Documentation Feedback VCC TYP 0.8 V 90 1.1 V 101 1.4 V 110 1.65 V 122 2.3 V 198 0.8 V >500 1.1 V >500 1.4 V >500 1.65 V >500 2.3 V >500 UNIT MHz SN74AUC2G53 SINGLE-POLE DOUBLE-THROW (SPDT) ANALOG SWITCH OR 2:1 ANALOG MULTIPLEXER/DEMULTIPLEXER www.ti.com SCES484B – AUGUST 2003 – REVISED JANUARY 2007 Analog Switch Characteristics (continued) TA = 25°C FROM (INPUT) PARAMETER TO (OUTPUT) TEST CONDITIONS CL = 50 pF, RL = 600 Ω, fin = 1 MHz (sine wave) (see Figure 7) Crosstalk (2) COM or Y (between switches) Y or COM CL = 5 pF, RL = 50 Ω, fin = 1 MHz (sine wave) (see Figure 7) Crosstalk (control input to signal output) INH CL = 50 pF, RL = 600 Ω, fin = 1 MHz (square wave) (see Figure 8) COM or Y CL = 50 pF, RL = 600 Ω, fin = 1 MHz (sine wave) (see Figure 9) Feed-through attenuation (2) (switch OFF) COM or Y Y or COM CL = 5 pF, RL = 600 Ω, fin = 1 MHz (sine wave) (see Figure 9) CL = 50 pF, RL = 10 kΩ, fin = 1 kHz (sine wave) (see Figure 10) Sine-wave distortion COM or Y Y or COM CL = 50 pF, RL = 10 kΩ, fin = 10 kHz (sine wave) (see Figure 10) (2) VCC TYP 0.8 V –59 1.1 V –59 1.4 V –59 1.65 V –59 2.3 V –60 0.8 V –55 1.1 V –55 1.4 V –55 1.65 V –55 2.3 V –55 0.8 V 0.56 1.1 V 0.68 1.4 V 0.81 1.65 V 0.93 2.3 V 1.5 0.8 V –60 1.1 V –60 1.4 V –60 1.65 V –60 2.3 V –60 0.8 V –59 1.1 V –59 1.4 V –59 1.65 V –59 2.3 V –59 0.8 V 6.19 1.1 V 0.39 1.4 V 0.06 1.65 V 0.02 2.3 V 0.01 0.8 V 3.55 1.1 V 0.38 1.4 V 0.04 1.65 V 0.02 2.3 V 0.02 UNIT dB mV dB % Adjust fin voltage to obtain 0 dBm at input. Operating Characteristics for INH input, TA = 25°C PARAMETER Cpd Power dissipation capacitance TEST CONDITIONS VCC = 0.8 V VCC = 1.2 V VCC = 1.5 V VCC = 1.8 V VCC = 2.5 V TYP TYP TYP TYP TYP f = 10 MHz 3 3 3 3 3 Submit Documentation Feedback UNIT pF 5 SN74AUC2G53 SINGLE-POLE DOUBLE-THROW (SPDT) ANALOG SWITCH OR 2:1 ANALOG MULTIPLEXER/DEMULTIPLEXER www.ti.com SCES484B – AUGUST 2003 – REVISED JANUARY 2007 Operating Characteristics for A input, TA = 25°C PARAMETER Cpd 6 Power dissipation capacitance Outputs enabled Outputs disabled TEST CONDITIONS VCC = 0.8 V VCC = 1.2 V VCC = 1.5 V VCC = 1.8 V VCC = 2.5 V TYP TYP TYP TYP TYP 5.5 5.5 5.5 5.5 5.5 0.5 0.5 0.5 0.5 0.5 f = 10 MHz UNIT pF Submit Documentation Feedback SN74AUC2G53 SINGLE-POLE DOUBLE-THROW (SPDT) ANALOG SWITCH OR 2:1 ANALOG MULTIPLEXER/DEMULTIPLEXER www.ti.com SCES484B – AUGUST 2003 – REVISED JANUARY 2007 PARAMETER MEASUREMENT INFORMATION VCC VIL or VIH VIL VI = VCC or GND VCC A VA INH Y1 S VA 1 VIL 2 VIH 1 S VINH VO COM Y2 (On) 2 GND IS V r on + VI * VO W IS VI - VO Figure 1. On-State Resistance Test Circuit 120 100 VCC = 1.1 V 80 60 40 VCC = 1.65 V 20 VCC = 2.3 V 0 0 1 2 3 Figure 2. Typical ron as a Function of Voltage (VI) for VI = 0 to VCC Submit Documentation Feedback 7 SN74AUC2G53 SINGLE-POLE DOUBLE-THROW (SPDT) ANALOG SWITCH OR 2:1 ANALOG MULTIPLEXER/DEMULTIPLEXER www.ti.com SCES484B – AUGUST 2003 – REVISED JANUARY 2007 PARAMETER MEASUREMENT INFORMATION VCC A VIL or VIH VA INH VIH S VA 1 VIL 2 VIH 1 Y1 S VINH VO COM A VI VCC Y2 (Off) 2 GND Condition 1: VI = GND, VO = VCC Condition 2: VI = VCC, VO = GND Figure 3. Off-State Switch Leakage-Current Test Circuit VCC VA INH VIL VI VCC A VIL or VIH Y1 1 VIL 2 VIH S VO COM Y2 2 VI = VCC or GND (On) GND Figure 4. On-State Switch Leakage-Current Test Circuit 8 VA 1 VINH A S Submit Documentation Feedback VO = Open SN74AUC2G53 SINGLE-POLE DOUBLE-THROW (SPDT) ANALOG SWITCH OR 2:1 ANALOG MULTIPLEXER/DEMULTIPLEXER www.ti.com SCES484B – AUGUST 2003 – REVISED JANUARY 2007 PARAMETER MEASUREMENT INFORMATION VLOAD S1 RL From Output Under Test CL (see Note A) Open GND RL LOAD CIRCUIT TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD GND INPUTS VCC 0.8 V 1.2 V ± 0.1 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V VI tr/tf VCC VCC VCC VCC VCC VCC VCC ≤2 ns ≤2 ns ≤2 ns ≤2 ns ≤2 ns ≤2 ns ≤2 ns VM VLOAD CL RL V∆ VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 2 × VCC 2 × VCC 2 × VCC 2 × VCC 2 × VCC 2 × VCC 2 × VCC 15 pF 15 pF 15 pF 15 pF 15 pF 30 pF 30 pF 2 kΩ 2 kΩ 2 kΩ 2 kΩ 2 kΩ 1 kΩ 500 Ω 0.1 V 0.1 V 0.1 V 0.15 V 0.15 V 0.15 V 0.15 V VI Timing Input VM 0V tw tsu VI Input VM VM th VI Data Input VM VM 0V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION VI VM Input VM 0V tPLH VM VM VOL tPHL VM VM 0V Output Waveform 1 S1 at VLOAD (see Note B) tPLH tPLZ VLOAD/2 VM tPZH VOH Output VM tPZL tPHL VOH Output VI Output Control VM VOL Output Waveform 2 S1 at GND (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS VOL + V∆ VOL tPHZ VM VOH − V∆ VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, slew rate ≥ 1 V/ns. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 5. Load Circuit and Voltage Waveforms Submit Documentation Feedback 9 SN74AUC2G53 SINGLE-POLE DOUBLE-THROW (SPDT) ANALOG SWITCH OR 2:1 ANALOG MULTIPLEXER/DEMULTIPLEXER www.ti.com SCES484B – AUGUST 2003 – REVISED JANUARY 2007 PARAMETER MEASUREMENT INFORMATION VCC VIL or VIH VIL 0.1 µF VCC A VA INH Y1 S VA 1 VIL 2 VIH 1 S VINH VO COM Y2 2 RL fin (On) 50 Ω CL GND VCC/2 RL/CL: 600 Ω/50 pF RL/CL: 50 Ω/5 pF Figure 6. Frequency Response (Switch On) VCC VIL or VIH VCC A VA TEST CONDITION VIL 20log10(VO2/VI) VIH 20log10(VO1/VI) VA Y1 VIL 0.1 µF INH VO1 RL 600 Ω VINH CL 50 pF COM VCC/2 Rin 600 Ω fin 50 Ω Y2 VO2 GND RL 600 Ω VCC/2 Figure 7. Crosstalk (Between Switches) 10 Submit Documentation Feedback CL 50 pF SN74AUC2G53 SINGLE-POLE DOUBLE-THROW (SPDT) ANALOG SWITCH OR 2:1 ANALOG MULTIPLEXER/DEMULTIPLEXER www.ti.com SCES484B – AUGUST 2003 – REVISED JANUARY 2007 PARAMETER MEASUREMENT INFORMATION VCC VCC A VIL or VIH VA INH Y1 S VA 1 VIL 2 VIH 1 S VINH VO Y2 50 Ω COM (On) 2 RL 600 Ω CL 50 pF GND VCC/2 Rin 600 Ω VCC/2 Figure 8. Crosstalk (Control Input, Switch Output) VCC VCC A VIL or VIH S VA 1 VIL 2 VIH VA INH VIL Y1 1 S VINH 0.1 µF VO COM Y2 2 RL fin 50 Ω RL (Off) CL GND VCC/2 VCC/2 RL/CL: 600 Ω/50 pF RL/CL: 50 Ω/5 pF Figure 9. Feedthrough (Switch Off) Submit Documentation Feedback 11 SN74AUC2G53 SINGLE-POLE DOUBLE-THROW (SPDT) ANALOG SWITCH OR 2:1 ANALOG MULTIPLEXER/DEMULTIPLEXER www.ti.com SCES484B – AUGUST 2003 – REVISED JANUARY 2007 PARAMETER MEASUREMENT INFORMATION VCC VIL or VIH VIL 10 µF VCC A VA INH Y1 600 Ω VA 1 VIL 2 VIH 1 10 µF S VINH VO COM fin S Y2 (On) 2 RL 10 kΩ GND VCC/2 VCC = 0.8 V, VI = 0.7 VP-P VCC = 1.1 V, VI = 1 VP-P VCC = 1.4 V, VI = 1.2 VP-P VCC = 1.65 V, VI = 1.4 VP-P VCC = 2.3 V, VI = 2 VP-P Figure 10. Sine-Wave Distortion 12 Submit Documentation Feedback CL 50 pF PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2007 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74AUC2G53DCTR ACTIVE SM8 DCT 8 3000 Pb-Free (RoHS) CU NIPDAU Level-1-260C-UNLIM SN74AUC2G53DCTRE4 ACTIVE SM8 DCT 8 3000 Pb-Free (RoHS) CU NIPDAU Level-1-260C-UNLIM SN74AUC2G53DCUR ACTIVE US8 DCU 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AUC2G53DCURE4 ACTIVE US8 DCU 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AUC2G53DCURG4 ACTIVE US8 DCU 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AUC2G53YZPR ACTIVE WCSP YZP 8 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM SN74AUC2G53YZTR ACTIVE DSBGA YZT 8 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 22-Oct-2007 TAPE AND REEL BOX INFORMATION Device Package Pins Site Reel Diameter (mm) Reel Width (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74AUC2G53DCUR DCU 8 SITE 35 180 9 2.25 3.35 1.05 4 8 Q3 SN74AUC2G53YZPR YZP 8 SITE 12 180 8 1.1 2.1 0.56 4 8 Q1 SN74AUC2G53YZTR YZT 8 SITE 12 180 8 1.1 2.1 0.7 4 8 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 22-Oct-2007 Device Package Pins Site Length (mm) Width (mm) Height (mm) SN74AUC2G53DCUR DCU 8 SITE 35 202.0 201.0 28.0 SN74AUC2G53YZPR YZP 8 SITE 12 220.0 220.0 0.0 SN74AUC2G53YZTR YZT 8 SITE 12 220.0 220.0 0.0 Pack Materials-Page 2 MECHANICAL DATA MPDS049B – MAY 1999 – REVISED OCTOBER 2002 DCT (R-PDSO-G8) PLASTIC SMALL-OUTLINE PACKAGE 0,30 0,15 0,65 8 0,13 M 5 0,15 NOM ÇÇÇÇÇ ÇÇÇÇÇ ÇÇÇÇÇ ÇÇÇÇÇ 2,90 2,70 4,25 3,75 Gage Plane PIN 1 INDEX AREA 1 0,25 4 0° – 8° 3,15 2,75 0,60 0,20 1,30 MAX Seating Plane 0,10 0,10 0,00 NOTES: A. B. C. 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