www.ti.com
SLUS530D − SEPTEMBER 2002 − REVISED SEPTEMBER 2003
FEATURES
Small 3 mm × 3 mm MLP (QFN) Package
Ideal for Low-Dropout Designs for Single-Cell
Li−Ion or Li−Pol Packs in Space Limited
Applications
Integrated Power FET and Current Sensor for
Up to 1-A Charge Applications
Reverse Leakage Protection Prevents Battery
Drainage
Integrated Current and Voltage Regulation
± 0.5% Voltage Regulation Accuracy
Charge Termination by Minimum Current
and Time
Precharge Conditioning With Safety Timer
Status Outputs for LED or System Interface
Indicates Charge and Fault Conditions
Battery Insertion and Removal Detection
Works With Regulated and Unregulated
Supplies
Short-Circuit Protection
APPLICATIONS
Cellular Phones
PDAs, MP3 Players
Digital Cameras
Internet Appliances
DESCRIPTION
The bqTINY series are highly integrated Li-Ion and
Li-Pol linear charge management devices targeted at
space limited portable applications. The bqTINY
series offer integrated powerFET and current sensor,
reverse blocking protection, high accuracy current and
voltage regulation, charge status, and charge
termination, in a small package.
The bqTINY charges the battery in three phases:
conditioning, constant current, and constant voltage.
Charge is terminated based on minimum current. An
internal charge timer provides a backup safety feature
for charge termination. The bqTINY automatically
re-starts the charge if the battery voltage falls below an
internal threshold. The bqTINY automatically enters
sleep mode when VCC supply is removed.
In addition to the standard features, different versions
of the bqTINY offer a multitude of additional features.
These include temperature sensing input for detecting
hot or cold battery packs; power good (PG) output
indicating the presence of input power; a TTL−level
charge-enable input (CE) used to disable or enable the
charge process; and a TTL-level timer and termination
enable (TTE) input used to disable or enable the
fast-charge timer and charge termination.
bq24012DRC
AC ADAPTER
1
IN
OUT 10
2
VCC
BAT
3
STAT1
CE 8
4
STAT2
PG 7
5
VSS
PACK+
BATTERY
PACK
SYSTEM
+
9
PACK−
SYSTEM
INTERFACE
RSET
ISET 6
UDG−02106
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
bqTINYis a trademark of Texas Instruments Incorporated.
!"#$%&" ' ()##*& %' "! +),(%&" -%&*. #"-)(&'
("!"#$ &" '+*(!(%&"' +*# &/* &*#$' "! *0%' '&#)$*&' '&%-%#- 1%##%&2.
#"-)(&" +#"(*''3 -"*' "& *(*''%#,2 (,)-* &*'&3 "! %,, +%#%$*&*#'.
Copyright 2002−2003, Texas Instruments Incorporated
www.ti.com
SLUS530D − SEPTEMBER 2002 − REVISED SEPTEMBER 2003
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during
storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
CHARGE
REGULATION
VOLTAGE (V)(1)
TA
−40°C to 125°C
OPTIONAL
FUNCTIONS(1)
PART NUMBER(2)
MARKINGS
4.2
PG and TS
bq24010DRC
AZN
4.2
PG and CE
bq24012DRC
AZP
4.2
CE and TTE
bq24013DRC
AZQ
4.2
CE and TS
bq24014DRC
AZR
(1) Contact Texas Instruments for other options.
(2) The DRC package is available only taped and reeled. Add R suffix to device type (e.g. bq24210DRCR) to order. Quantities are 3,000 devices per
reel.
DISSIPATION RATINGS
PACKAGE
θJA
TA < 40°C
POWER RATING
DRC(1)
47 °C/W
1.5 W
DERATING FACTOR
ABOVE TA = 40°C
0.021 W/°C
(1) This data is based on using the JEDEC High-K board and the exposed die pad is connected to a copper pad on the board. This is connected to the
ground plane by a 2x3 via matrix.
ABSOLUTE MAXIMUM RATINGS(1)
UNIT
Supply voltage range, (VCC all with respect to VSS)
Input voltage range(2)
Voltage difference between VCC and IN inputs
VCC − VIN
Output sink/source current
Output current
−0.3 to 18
IN, STAT1, STAT2, TS, PG, CE, TTE
BAT, OUT, ISET
V
−0.3 to VCC
−0.3 to 7
VDC
± 0.5
V
STAT1, STAT2, PG
15
mA
IN, OUT
1.5
A
Operating free−air temperature range, TA
Junction temperature range, TJ
Storage temperature, Tstg
−40 to 125
°C
−65 to 150
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
300
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are DC and with respect to VSS.
RECOMMENDED OPERATING CONDITIONS(1)
MIN
Supply voltage(1), VCC
Input voltage(1), VIN
Operating junction temperature range, TJ
(1) Pins VCC and IN must be tied together.
2
NOM
MAX
3.0
16.5
3.0
16.5
−40
125
UNIT
V
°C
www.ti.com
SLUS530D − SEPTEMBER 2002 − REVISED SEPTEMBER 2003
ELECTRICAL CHARACTERISTICS
over 0C ≤ TJ ≤ 125C and recommended supply voltage, unless otherwise noted
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INPUT CURRENT
VCC current, ICC(VCC)
VCC > VCC(min), STATx pins in OFF state
Sum of currents into OUT and BAT pins,
VCC < V(SLP)
Sleep current, ICC(SLP)
0
3.5
Input bias current on BAT pin, IIB(BAT)
VI(TS) ≤ 10 V
Input current on TS pin, IIB(TS)
5
mA
5
µA
500
nA
1
Input current on CE pin, IIB(CE)
1
Input bias current on TTE pin, IIB(TTE)
1
µA
VOLTAGE REGULATION VO(REG) + V(DO−MAX) ≤ VCC , I(TERM) < IO(OUT) ≤ 1 A
Output voltage, VO(REG)
4.20
TA = 25C
Voltage regulation accuracy
−0.5%
−1%
Dropout voltage (V(IN) − V(OUT)), V(DO)
VO(REG) + V(DO−MAX)) ≤ VCC, IO(OUT) = 1A
V
0.5%
1%
650
790
mV
1000
mA
V
CURRENT REGULATION
VCC ≥ 4.5 V, VIN ≥ 4.5 V, VI(BAT) > V(LOWV),
VIN − VI(BAT) > V(DO−MAX)
Output current range, IO(OUT) (1)
Voltage on ISET pin, VCC ≥ 4.5 V, VIN ≥ 4.5 V,
VI(BAT) > V(LOWV), VIN − VI(BAT) > V(DO−MAX)
VO(REG) = 4.2 V
50 mA ≤ IO(OUT) ≤ 1000 mA, VI(ISET) ≥ V(TAPER)
Output current set voltage, V(SET)
10 mA ≤ IO(OUT) < 50 mA,
Output current set factor, K(SET)
10 mA ≤ IO(OUT) < 50 mA,
PRECHARGE AND SHORT-CIRCUIT CURRENT REGULATION
Precharge to fast-charge transition
threshold, V(LOWV)
VI(ISET) ≥ V(TAPER)
VI(ISET) < V(TAPER)
Precharge set voltage, V(PRECHG)
Short circuit current, ISC
2.50
2.55
315
335
355
315
372
430
350
1000
Voltage on BAT pin
2.80
2.95
3.10
Voltage on BAT pin
1.0
1.4
1.8
V(SC) < VI(BAT) < V(LOWV), t < t(PRECHG)
Voltage on ISET pin,
V(SC) < VI(BAT) < V(LOWV)
V(SC) > VI(BAT)
225
250
280
660
900
1200
µA
100
mA
CHARGE TAPER AND TERMINATION DETECTION
Charge taper detection range, I(TAPER)(3) VI(BAT) > V(RCH), t < t(TAPER)
Charge taper detection set voltage,
V(TAPER)
Charge termination detection set voltage,
V(TERM)
TEMPERATURE COMPARATOR
Voltage on ISET pin,
VI(BAT) > V(RCH),
t < t(TAPER),
VI(BAT) = VO(REG)
Voltage on ISET pin,
VI(BAT) = VO(REG),
VI(BAT) >V(RCH),I(TERM) =K(SET)× V(TERM) /R(SET)
Lower threshold, V(TS1)
Upper threshold, V(TS2)
Hysteresis
IO(OUT) +
2.45
V
Precharge to short-circuit transition
threshold, V(SC)
Precharge range, IO(PRECHG)(2)
(1)
100
10
100
10
225
250
275
5.0
17.5
30.0
Voltage on TS pin
29
30
31
Voltage on TS pin
60
61
62
mV
mV
%VCC
1
ǒK(SET)
(2)
IO(PRECHG) +
(3)
IO(TAPER) +
Ǔ
V(SET)
RSET
ǒK(SET)
ǒK(SET)
Ǔ
V(PRECHG)
RSET
Ǔ
V(TAPER)
R SET
3
www.ti.com
SLUS530D − SEPTEMBER 2002 − REVISED SEPTEMBER 2003
ELECTRICAL CHARACTERISTICS (continued)
over 0C ≤ TJ ≤ 125C and recommended supply voltage, unless otherwise noted
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VO(REG)
−0.135
VO(REG)
−0.1
VO(REG)
−0.075
V
0.5
V
BATTERY RECHARGE THRESHOLD
Recharge threshold, V(RCH)
STAT1, STAT2, and PG OUTPUTS
Output (low) saturation voltage, VOL
IO = 10 mA
CHARGE ENABLE (CE) AND TIMER AND TERMINATION ENABLE (TTE) INPUTS
Low-level input voltage, VIL
High-level input voltage, VIH
IIL = 1 µA
IIH = 1 µA
0
0.8
2.0
V
TIMERS
Precharge time, t(PRECHG)
1,548
2,065
Taper time, t(TAPER)
1,548
2,065
2,581
2,581
Charge time, t(CHG)
15,480
20,650
25,810
s
SLEEP COMPARATOR
Sleep mode entry threshold voltage, VSLP
VCC ≤
VI(BAT)
+30 mV
VPOR ≤ V(IBAT) ≤ VO(REG)
VCC ≥
VI(BAT)
+22 mV
Sleep mode exit threshold voltage
VPOR ≤ V(IBAT) ≤ VO(REG)
Sleep mode deglitch time
VCC decreasing below threshold, 100 ns fall time,
10 mV overdrive
250
Battery detection current, I(DETECT)
2 V ≤ V(IBAT) ≤ V(RCH)
−3.1
−4.6
Battery detection time, t(DETECT)
2 V ≤ V(IBAT) ≤ V(RCH)
100
660
2.25
V
650
ms
−6.1
mA
125
150
ms
900
1200
µA
2.5
2.75
V
BATTERY DETECTION THRESHOLDS
Fault current, I(FAULT)
V(IBAT) < V(RCH) and/or t > t(PRECHG)
POWER−ON RESET AND INPUT VOLTAGE RAMP RATE
Power−on reset threshold voltage, VPOR(4)
(4)
4
Ensured by design. Not production tested.
www.ti.com
SLUS530D − SEPTEMBER 2002 − REVISED SEPTEMBER 2003
DRC PACKAGE
(TOP VIEW)
VSS STAT2 STAT1 VCC
5
4
3
2
DRC PACKAGE
(TOP VIEW)
VSS STAT2 STAT1 VCC
IN
1
5
4
bq24010DRC
3
2
7
8
9
10
6
7
8
9
ISET
PG
TS
BAT
OUT
ISET
PG
CE
BAT
4
3
2
VSS STAT2 STAT1 VCC
IN
5
1
4
7
8
ISET
CE
TTE
9
OUT
3
2
IN
1
bq24014DRC
bq24013DRC
6
10
DRC PACKAGE
(TOP VIEW)
DRC PACKAGE
(TOP VIEW)
5
1
bq24012DRC
6
VSS STAT2 STAT1 VCC
IN
10
BAT OUT
6
7
8
ISET
CE
TS
9
10
BAT OUT
TERMINAL FUNCTIONS
TERMINAL
NAME
I/O
DESCRIPTION
bq24010
bq24012
bq24013
bq24014
BAT
9
9
9
9
I
Battery voltage sense input
CE
−
8
7
7
I
Charge enable input (active low)
IN
1
1
1
1
I
Charge input voltage. This input must be tied to the VCC pin.
ISET
6
6
6
6
O
Charge current set point
OUT
10
10
10
10
O
Charge current output
PG
7
7
−
−
O
Power good status output (open collector)
STAT1
3
3
3
3
O
Charge status output 1 (open collector)
STAT2
4
4
4
4
O
Charge status output 2 (open collector)
TTE
−
−
8
−
I
Timer and termination enable input (active low)
TS
8
−
−
8
I
Temperature sense input
VCC
2
2
2
2
I
VCC supply input
5
www.ti.com
SLUS530D − SEPTEMBER 2002 − REVISED SEPTEMBER 2003
VSS
Exposed
Thermal
PAD
6
5
pad
5
pad
5
pad
5
pad
−
Ground input
−
There is an internal electrical connection between the exposed thermal pad
and VSS pin of the device. The exposed thermal pad must be connected to the
same potential as the Vss pin on the printed circuit board. Do not use the
thermal pad as the primary ground input for the device. VSS pin must be
connected to ground at all times.
www.ti.com
SLUS530D − SEPTEMBER 2002 − REVISED SEPTEMBER 2003
FUNCTIONAL BLOCK DIAGRAM
IN
OUT
VCC
VCC
+
VI(BAT)
VO(REG)
ISET
CHG ENABLE
VCC
REFERENCE
AND BIAS
VCC
V(ISET)
VSET
VO(REG)
I(DETECT)
ENABLE
+
I(FAULT)
ENABLE
CHG ENABLE
VI(BAT)
V(SLP)
DEGLITCH
I(FAULT) ENABLE
CE
I(DETECT) ENABLE
TS
CHG ENABLE
THERMAL
SHUTDOWN
VSS
VI(BAT)
CHARGE
CONTROL,
TIMER,
AND
DISPLAY
LOGIC
TTE
VO(REG)
VI(BAT)
V(RCH)
DEGLITCH
VI(BAT)
PG
BAT
PG
RECHARGE
PRECHARGE
STAT1
VSET
V(PRECHG)
V(TAPER)
VI(SET)
VI(SET)
V(TERM)
Dotted lines represent optional features
DEGLITCH
DEGLITCH
TAPER
TERM
STAT2
UDG−02108
7
www.ti.com
SLUS530D − SEPTEMBER 2002 − REVISED SEPTEMBER 2003
TYPICAL CHARACTERISTICS
DROPOUT VOLTAGE
vs
JUNCTION TEMPERATURE
850
IO(OUT) = 1000 mA
750
Dropout Voltage − mV
650
IO(OUT) = 750 mA
550
450
IO(OUT) = 500 mA
350
250
IO(OUT) = 250 mA
150
50
−50
0
50
100
TJ − Junction Temperature − C
150
Figure 1
Regulation
Voltage
Pre-Conditioning
Phase
Voltage Regulation
and Charge Termination Phase
Current Regulation
Phase
Regulation
Current
Charge
Voltage
Minimum
Charge
Voltage
Charge
Complete
Charge
Current
Pre-Conditioning
and Taper Detect
t(PRECHG)
t(CHG)
t(TAPER)
Figure 2. Typical Charging Profile
8
www.ti.com
SLUS530D − SEPTEMBER 2002 − REVISED SEPTEMBER 2003
FUNCTIONAL DESCRIPTION
The bqTINY supports a precision Li-Ion, Li-Pol charging system suitable for single-cells . Figure 2 shows a typical charge
profile, application circuit and Figure 5 shows an operational flow chart.
BATTERY
PACK
bq24010DRC
DC +
1 IN
OUT 10
2 VCC
0.47 µF
PACK+
+
VCC
PACK−
BAT 9
0.1 µF
CHARGE
DONE
RT1
3 STAT1
TS 8
4 STAT2
PG 7
5 VSS
RT2
ISET 6
RSET
DC −
POWERGOOD
UDG−02109
Figure 3. Typical Application Circuit
USB PORT
D+
D−
bq24013DRC
PACK+
VBUS
1
IN
OUT 10
2
VCC
BAT
9
3
STAT1
TTE
8
4
STAT2
CE
7
5
VSS
ISET
6
BATTERY
PACK
+
GND
0.47 µF
0.1 µF
PACK−
2.26 kΩ
SYSTEM
&
USB
CONTROLLER
SI1032x
100 mA / 500 mA
9.09 kΩ
UDG−02127
Figure 4. USB Charger Circuit
9
www.ti.com
SLUS530D − SEPTEMBER 2002 − REVISED SEPTEMBER 2003
POR
SLEEP MODE
VCC > VI(BAT)
checked at
all times
No
Indicate SLEEP
MODE
Yes
Regulate
IO(PRECHG)
VI(BAT) < V(LOWV)
Reset and Start
t(PRECHG) timer
Yes
Indicate
Charge-in-Progress
No
Reset all timers
start t(CHG)
timers
Regulate Current
or Voltage
Indicate
Charge-in-Progress
No
VI(BAT) < V(LOWV)
Suspend charge
TJ < t(SHTDWN)
Yes
No
Indicate
Charge Suspend
Yes
t(PRECHG)
expired?
Yes
No
TJ < t(SHTDWN)
t(CHG)
expired?
No
Yes
No
Yes
Fault Condition
Yes
VI(BAT) < V(LOWV)
Indicate Fault
No
I(TERM)
detection
?
VI(BAT) > V(RCH)
?
No
No
Yes
No
t(TAPER)
expired?
Enable
I(FAULT)
current?
I(TAPER)
detection
?
Yes
No
No
Yes
Yes
VI(BAT) > V(RCH)
?
Turn off charge
Yes
Indicate DONE
No
Disable
I(FAULT)
current?
VI(BAT) < V(RCH)
?
Yes
Enter Battery
Absent
Detection
Figure 5. Operational Flow Chart
10
UDG−02110
www.ti.com
SLUS530D − SEPTEMBER 2002 − REVISED SEPTEMBER 2003
FUNCTIONAL DESCRIPTION
TEMPERATURE QUALIFICATION
NOTE:The temperature qualifications apply only to versions with temperature sense input (TS) pin option (bq24010 and
bq24014).
Versions of the bqTINY with the TS pin option, continuously monitor battery temperature by measuring the voltage between
the TS and VSS pins. A negative temperature coefficient thermistor (NTC) and an external voltage divider typically
develops this voltage (see Figure 3). The bqTINY compare this voltage against the internal V(TS1) and V(TS2) thresholds
to determine if charging is allowed (see Figure 6). The temperature sensing circuit is immune to any fluctuation in VCC since
both the external voltage divider and the internal thresholds are ratiometric to VCC.
Once a temperature outside the V(TS1) and V(TS2) thresholds is detected the bqTINY immediately suspend the charge. The
bqTINY suspends charge by turning off the powerFET and holding the timer value (i.e. timers are NOT reset). Charge is
resumed when the temperature returns to the normal range.
VCC
Charge Suspend
V(TS2)
Normal Temperature Range
V(TS1)
Charge Suspend
VSS
Figure 6. TS Pin Thresholds
The resistor values of RT1 and RT2 are calculated by equations (1) and (2) (for NTC Thermistors )
R T1 +
R T2 +
ǒ5
R TH
ǒ3
ǒR TC * R THǓǓ
ǒ5
ǒ2
R TCǓ
RTH
R TCǓ * ǒ7
(1)
R TCǓ
RTHǓ
(2)
Where RTC is the cold temperature resistance and RTH is the hot temperature resistance of thermistor, as specified
by the thermistor manufacturer.
RT1 or RT2 can be omitted If only one temperature (hot or cold) setting is required. Applying a constant voltage
between the VTS1 and VTS2 thresholds to pin TS disables the temperature-sensing feature.
11
www.ti.com
SLUS530D − SEPTEMBER 2002 − REVISED SEPTEMBER 2003
FUNCTIONAL DESCRIPTION
BATTERY PRE-CONDITIONING
During a charge cycle if the battery voltage is below the V(LOWV) threshold, the bqTINY applies a precharge current,
IO(PRECHG), to the battery. This feature revives deeply discharged cells. The resistor connected between the ISET
and VSS, RSET, determines the precharge rate. The V(PRECHG) and K(SET) parameters are specified in the
specifications table.
I O (PRECHG) +
V(PRECHG)
K(SET)
RSET
(3)
The bqTINY activates a safety timer, t(PRECHG), during the conditioning phase. If V(LOWV) threshold is not reached
within the timer period, the bqTINY turns off the charger and enunciates FAULT on the STAT1 and STAT2 pins. Refer
to Timer Fault Recovery section for additional details.
BATTERY CHARGE CURRENT
The bqTINY offers on-chip current regulation with programmable set point. The resistor connected between the ISET
and VSS, RSET, determines the charge rate. The V(SET) and K(SET) parameters are specified in the specifications
table.
V(SET)
I O (OUT) +
K(SET)
RSET
(4)
BATTERY VOLTAGE REGULATION
Voltage regulation feedback is accomplished through the BAT pin. This input is tied directly and close to the positive
side of the battery pack. The bqTINY monitors the battery-pack voltage between the BAT and VSS pins. When the
battery voltage rises to VO(REG) threshold, the voltage regulation phase begins and the charging current begins to
taper down.
As a safety backup, the bqTINY also monitors the charge time in the charge mode. If termination does not occur within
this time period, t(CHG), the bqTINY turns off the charger and enunciates FAULT on the STAT1 and STAT1 pins. Refer
to the Timer Fault Recovery section for additional details.
CHARGE TAPER DETECTION, TERMINATION AND RECHARGE
The bqTINY monitors the charging current during the voltage regulation phase. Once the taper threshold, I(TAPER),
is detected the bqTINY initiates the taper timer, t(TAPER). Charge is terminated after the timer expires. The resistor
connected between the ISET and VSS, RSET, determines the taper detection level. The V(TAPER) and K(SET)
parameters are specified in the specifications table.
I (TAPER) +
V(TAPER)
K(SET)
RSET
(5)
The bqTINY resets the taper timer in the event that the charge current returns above the taper threshold, I(TAPER).
In addition to the taper current detection, the bqTINY terminates charge in the event that the charge current falls below
the I(TERM) threshold. This feature allows for quick recognition of a battery removal condition or insertion of a fully
charged battery. Note that taper timer is not used for I(TERM) detection. The resistor connected between the ISET
and VSS, RSET, determines the taper detection level. The V(TERM) and K(SET) parameters are specified in the
specifications table.
I (TERM) +
12
V(TERM)
K(SET)
R SET
(6)
www.ti.com
SLUS530D − SEPTEMBER 2002 − REVISED SEPTEMBER 2003
FUNCTIONAL DESCRIPTION
After charge termination, the bqTINY restarts the charge once the voltage on the BAT pin falls below the V(RCH)
threshold. This feature keeps the battery at full capacity at all times. Please see Battery Absent Detection section
for additional details.
SLEEP MODE
The bqTINY enters the low-power sleep mode if the VCC is removed from the circuit. This feature prevents draining
the battery during the absence of VCC.
CHARGE STATUS OUTPUTS
The open-collector STAT1 and STAT2 outputs indicate various charger operations as shown in the following table.
These status pins can be used to drive LEDs or communicate to the host processor. Note that OFF indicates the
open-collector transistor is turned off.
Table 1. Status Pins Summary
CHARGE STATE
STAT1
OFF()
STAT2
Charge-in-progress
ON
OFF
Charge done
OFF
ON
Charge suspend (temperature)
OFF
OFF
Timer fault
OFF
OFF
Sleep mode
OFF
OFF
Battery absent
OFF
() OFF means the open-collector output transistor on the STAT1
or STAT2 pins is in an off state.
PG OUTPUT
The open-drain PG (power good) indicates when the ac adapter (i.e. VCC) is present. The output turns ON when
a valid VCC is detected. This output is turned off in the sleep mode. The PG pin can be used to drive an LED or
communicate to the host processor.
CE INPUT (CHARGE ENABLE)
The CE digital input is used to disable or enable the charge process. A low-level signal on this pin enables the charge
and a high-level signal disables the charge. A high-to-low transition on this pin also resets all timers and fault
conditions and starts a new charge cycle.
TTE INPUT (TIMER AND TERMINATION ENABLE)
The TTE digital input is used to disable or enable the fast-charge timer and charge termination. A low-level signal
on this pin enables the fast-charge timer and termination and a high-level signal disables this feature. A high-to-low
transition on this pin also resets all timers.
THERMAL SHUTDOWN AND PROTECTION
The bqTINY monitors the junction temperature, TJ, of the die and suspends charging if TJ exceeds 155C. Charging
resumes when TJ falls below approximately 130C.
13
www.ti.com
SLUS530D − SEPTEMBER 2002 − REVISED SEPTEMBER 2003
FUNCTIONAL DESCRIPTION
BATTERY ABSENT DETECTION
For applications with removable battery packs, bqTINY provides a battery absent detection scheme to reliably detect
insertion and/or removal of battery packs.
The voltage at the BAT pin is held above the battery recharge threshold, V(RCH), by the charged battery following
fast charging. When the voltage at the BAT pin falls to the recharge threshold, either by a load on the battery or due
to battery removal, the bqTINY begins a battery absent detection test. This test involves enabling a detection current,
I(DETECT), for a period of t(DETECT) and checking to see if the battery voltage is below the pre-charge threshold,
V(LOWV). Following this, the precharge current, IO(PRECHG) is applied for a period of t(DETECT) and the battery voltage
checked again to be above the recharge threshold. The purpose is to attempt to close a battery pack with an open
protector, if one is connected to the bqTINY. Passing both of the discharge and charging tests indicates a battery
absent fault at the STAT pins. Failure of either test starts a new charge cycle. For the absent battery condition the
voltage on the BAT pin rises and falls between the V(LOWV) and VO(REG) thresholds indefinitely. See Figure 7.
Charge Done
or
Timer Fault
No
VI(BAT) <
V(RCH)
Yes
Enable
I(DETECT) for
t(DETECT)
VI(BAT) <
V(LOWV)
No
BATTERY
PRESENT
Begin Charge
No
BATTERY
PRESENT
Begin
Charge
Yes
Apply
IO(PRECHG) for
t(DETECT)
VI(BAT) >
V(RCH)
Yes
BATTERY
ABSENT
Figure 7. Battery Absent Detection
14
www.ti.com
SLUS530D − SEPTEMBER 2002 − REVISED SEPTEMBER 2003
FUNCTIONAL DESCRIPTION
TIMER FAULT RECOVERY
As shown in Figure 5, bqTINY provides a recovery method to deal with timer fault conditions. The following conditions
summarize this method.
Condition #1: Charge voltage above recharge threshold (V(RCH)) and timeout fault occurs
Recovery method: bqTINY waits for the battery voltage to fall below the recharge threshold. This could happen as
a result of a load on the battery, self-discharge or battery removal. Once the battery falls below the recharge threshold,
the bqTINY clears the fault and enters the battery absent detection routine. A POR or CE toggle also clears the fault.
Condition #2: Charge voltage below recharge threshold (V(RCH)) and timeout fault occurs
Recovery method: Under this scenario, the bqTINY applies the I(FAULT) current. This small current is used to detect
a battery removal condition and remains on as long as the battery voltage stays below the recharge threshold. If the
battery voltage goes above the recharge threshold, then the bqTINY disables the I(FAULT) current and executes the
recovery method described for condition #1. Once the battery falls below the recharge threshold, the bqTINY clears
the fault and enters the battery absent detection routine. A POR or CE toggle also clears the fault.
15
www.ti.com
SLUS530D − SEPTEMBER 2002 − REVISED SEPTEMBER 2003
APPLICATION INFORMATION
SELECTING INPUT CAPACITOR
In most applications, all that is needed is a high-frequency decoupling capacitor. A 0.47-µF ceramic, placed in close
proximity to VCC and VSS pins, works well. The bqTINY is designed to work with both regulated and unregulated
external dc supplies. If a non-regulated supply is chosen, the supply unit should have enough capacitance to hold
up the supply voltage to the minimum required input voltage at maximum load. If not, more capacitance has to be
added to the input of the charger.
SELECTING OUTPUT CAPACITOR
The bqTINY requires only a small output capacitor for loop stability. A 0.1-µF ceramic capacitor placed between the
BAT and ISET pins is typically sufficient for embedded applications (i.e. non-removable battery packs). For
application with removable battery packs a 1-µF ceramic capacitor ensure proper operation of the battery detection
circuitry. Note that the output capacitor can also be placed between BAT and VSS pins.
THERMAL CONSIDERATIONS
The bqTINY is packaged in a thermally enhanced MLP (also referred to as QFN) package. The package includes
a thermal pad to provide an effective thermal contact between the device and the printed circuit board (PCB). Full
PCB design guidelines for this package are provided in the application note entitled, QFN/SON PCB Attachment
Application Note (TI Literature No. SLUA271).
The most common measure of package thermal performance is thermal impedance (θJA) measured (or modeled)
from the device junction to the air surrounding the package surface (ambient). The mathematical expression for θJA
is:
q JA +
TJ * TA
P
(7)
Where:
TJ = device junction temperature
TA = ambient temperature
P = device power dissipation
Factors that can greatly influence the measurement and calculation of θJA include:
whether or not the device is board mounted
trace size, composition, thickness, and geometry
orientation of the device (horizontal or vertical)
volume of the ambient air surrounding the device under test and airflow
whether other surfaces are in close proximity to the device being tested
The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal PowerFET.
It can be calculated from the following equation:
P + V IN * V I(BAT)
I O(OUT)
(8)
Due to the charge profile of Li-xx batteries, the maximum power dissipation is typically seen at the beginning of the
charge cycle when the battery voltage is at it’s lowest. See Figure 2.
16
www.ti.com
SLUS530D − SEPTEMBER 2002 − REVISED SEPTEMBER 2003
APPLICATION INFORMATION
PCB LAYOUT CONSIDERATIONS
It is important to pay special attention to the PCB layout. The following provides some guidelines:
To obtain optimal performance, the decoupling capacitor from VCC to VSS and the output filter capacitors from
BAT to ISET should be placed as close as possible to the bqTINY, with short trace runs to both signal and VSS
pins.
All low-current VSS connections should be kept separate from the high-current charge or discharge paths from
the battery. Use a single-point ground technique incorporating both the small signal ground path and the power
ground path.
The BAT pin is the voltage feedback to the device and should be connected with its trace as close to the battery
pack as possible.
The high current charge paths into IN and from the OUT pins must be sized appropriately for the maximum charge
current in order to avoid voltage drops in these traces.
The bqTINY is packaged in a thermally enhanced MLP package. The package includes a thermal pad to provide
an effective thermal contact between the device and the printed circuit board (PCB). Full PCB design guidelines
for this package are provided in the application note entitled: QFN/SON PCB Attachment Application Note (TI
Literature No. SLUA271).
There is an internal electrical connection between the exposed thermal pad and VSS pin of the device. The
exposed thermal pad must be connected to the same potential as the VSS pin on the printed circuit board. Do
not use the thermal pad as the primary ground input for the device. VSS pin must be connected to ground at all
times.
17
www.ti.com
SLUS530D − SEPTEMBER 2002 − REVISED SEPTEMBER 2003
DRC (S−PDSO−N10)
CUSTOM DEVICE
PLASTIC SMALL OUTLINE
3,25
2,75
3,25
2,75
PIN 1 INDEX AREA
TOP AND BOTTOM
1,00
0,80
0,20 REF.
0,08
SEATING PLANE
0,05
0,00
2,48
2,23
10
0,50
0,50
0,30
1
5
EXPOSED THERMAL DIE PAD
(SEE NOTE D)
1,74
1,49
10
2,00
6
10
0,30
0,18
0,10
4204102/B 04/02
NOTES:A.
B.
C.
D.
18
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Small Outline No-Lead (SON) package configuration.
The package thermal performance may be enhanced by bonding the thermal die pad to an external thermal plane.
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. To minimize the risks associated with customer products
and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process
in which TI products or services are used. Information published by TI regarding third-party products or services
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.
Use of such information may require a license from a third party under the patents or other intellectual property
of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without
alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction
of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for
such altered documentation.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that
product or service voids all express and any implied warranties for the associated TI product or service and
is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
Products
Amplifiers
Applications
amplifier.ti.com
Audio
www.ti.com/audio
Data Converters
dataconverter.ti.com
Automotive
www.ti.com/automotive
DSP
dsp.ti.com
Broadband
www.ti.com/broadband
Interface
interface.ti.com
Digital Control
www.ti.com/digitalcontrol
Logic
logic.ti.com
Military
www.ti.com/military
Power Mgmt
power.ti.com
Optical Networking
www.ti.com/opticalnetwork
Microcontrollers
microcontroller.ti.com
Security
www.ti.com/security
Telephony
www.ti.com/telephony
Video & Imaging
www.ti.com/video
Wireless
www.ti.com/wireless
Mailing Address:
Texas Instruments
Post Office Box 655303 Dallas, Texas 75265
Copyright 2003, Texas Instruments Incorporated