SL1710 Quadrature Downconverter Preliminary Information Supersedes October 1996 version in Media IC Handbook HB4599-1.0 DS3842 - 4.1 March 1997 AGC IOUT VEEA IFINB IFIN VCCA QOUT VEEC 1 16 SL1710 The SL1710 is a quadrature downconverter, intended for use with both Professional and Consumer Digital Satellite Applications. The device contains high linearity, low noise amplifiers, quadrature mixers, plus an on-chip oscillator, operating between 350MHz and 500MHz, which may be synthesised via the differential prescaler outputs. An AGC with 18dB gain control is provided to cope with a wide range of input signal levels. I and Q outputs are via low impedance single ended amplifiers. These may be connected to a dual channel analog to digital converter such as the PCA916, VP216, VP215 or VP213, via a suitable anti-alias filter. VCCB VCODIS VCO B VCO A VEEB PSCAL PSCALB VCCC MP16 Fig. 1 Pin allocation top view FEATURES ■ Wide input frequency range (350-500MHz) ORDERING INFORMATION ■ On chip oscillator with varactor tuning or SAW resonator operation capability SL1710/KG/MPAS ■ Nominal 40dB conversion gain from IF input to I and Q outputs ■ AGC amplifier with 18dB gain control range SL1710/KG/MPAD (Tape and Reel) ABSOLUTE MAXIMUM RATINGS ■ I to Q phase match 90°C to ± 2°, gain match better than 1dB Storage temperature Junction temperature Supply voltage Voltage at any other pin -55°C to +150°C -29°C to +150°C -0.3 to 7.0V -0.3 to +7.0V ■ Low impedance I and Q single ended outputs, with 15MHz ± 1dB BW APPLICATIONS ■ Divide by 32 prescaler outputs ■ Consumer digital satellite decoders ■ Suitable for QPSK and up to 64QAM systems ■ Professional digital satellite decoders ■ Communication systems AGC IFIN I OUT AGC IFINB AGC VCODIS 0 deg VCOA VCOB LO Q OUT 90 deg Quadrature generator ÷32 Fig.2. SL1710 block diagram PSCAL PSCALB SL1710 ELECTRICAL CHARACTERISTICS o o Tamb= 0 C to +80 C, Vee= 0V, Vcc = 4.75 to 5.25 V, Fif = 479.5 MHz, IF bandwidth ± 15 MHz, output amplitude -11dBV These characteristics are guaranteed by either production test or design. They apply within the specified ambient temperature and supply voltage unless otherwise stated. Value Characteristic Pin Min 6,9,16 6,9,16 4.75 RF Input RF freq range 4, 5 350 Impedance VSWR 4, 5 4, 5 Noise Figure Noise Figure variation with 4, 5 4, 5 Supply voltage Supply current Typ Max Units 94 5.25 110 V mA 500 MHz 75 ohm 1.7 0.5 Conditions @ 480MHz. Fig. 4 @ 480MHz. Fig. 4 19 1 dB dB/dB AGC at maximum gain 500 -85 MHz dBc/Hz External tank circuit with varicap @ 10kHz from fo. but measured in gain VCO VCO freq (fo) control range Phase noise 13, 14 13, 14 350 I or Q output. Note (1, 2) MHz/Volt Fixed external components and no Fo sensitivity to VCC 13, 14 2 Fo sensitivity to temperature 13, 14 40 KHz/°C Prescaler output, 10, 11 10, 11 VCC-0.96 VCC-1.65 Volt Volt 10, 11 40 VOH VOL Prescaler output duty cycle AGC Gain, Vagc = +2.5V 60 40 Temp stability of gain Gain, Vagc = +0.5V 1 1 Gain, Vagc = + VCC -0.5V AGC range 1 control loop Uncompensation At 25°C %Under maximum load conditions Fig. 5 dB ±2 dB dB For any gain setting 0V to 5V See Fig.6 32 dB dB See Fig.6 44 18 I Q outputs 480MHz local oscillator, 481 to 495MHz RF input @ -51dBV Gain set to give -11dBV, 1-15MHz baseband output into Output impedance 2, 7 Output clipping level I phase lag with respect to Q 2, 7 2, 7 IQ crosstalk Output amplitude match 2, 7 Baseband flatness Two tone 3rd order intercept 2, 7 2, 7 1.5 88 90 8 ohm maximum load. Fig. 7 Fig. 8 1 -15MHz 92 V p-p degs 20 1 dB dB ±1 dB dBV +3 point Im3 LO, and Sputii in IQ outputs 2 I releative to Q, 1 -15MHz 1-15MHz, 1kΩ 15pF load Referred to output. @ 1MHz Output load 1kohm, 15pF, all AGC settings, 0.7V pk-pk output 2, 7 2, 7 28 -30 dBc dBV 1-100MHz SL1710 ELECTRICAL CHARACTERISTICS (continued) o o Tamb= 0 C to 80 C, Vee= 0V, Vcc = 4.75 to 5.25 V, These characteristics are guaranteed by either production test or design. They apply within the specified ambient temperature and supply voltage unless otherwise stated. Value Characteristic Prescaler sidebands Power supply rejection Pin 2, 7 2, 7 Min Typ Max Units Conditions -47 25 -50 30 dBV dB Measured in IQ outputs Attenuation VCC to IQ outputs, over 0-500kHz Notes: 1. The choice of L will have an effect on phase noise of the VCO 2. Target value at fo=500MHz, L (tank)=10nH, Q (tank, unloaded)=50, SSB DESCRIPTION The SL1710 is a quadrature downconverter, intended for high linearity, low noise digital satellite applications. It contains all the elements necessary, with the exception of the VCO tuning components, to extract baseband I and Q signals from a QPSK or QAM IF input signal. A block diagram for the SL1710 is shown in Fig. 2. In normal consumer digital satellite applications, the device is fed via a SAW filter, centred at the standard IF of 479.5MHz. A filtered single channel is therefore presented to the device, at a typical level of -51dBV. An AGC is included with 18dB of gain control, which is guaranteed to provide an overall conversion gain between 30 and 45dB from the RF input to the I and Q outputs. The quadrature mixers are fed from an on-chip oscillator which is centred on the incoming IF. The oscillator external tuning network should be fully symmetric, to ensure optimum gain and phase match. Single ended I and Q amplifiers are provided, which output a 760mV (p/p) signal, assuming a nominal -51dBV input signal and 40dB gain, suitable for driving a dual channel ADC such as the PCA 869, PCA 913 and PCA 916 via an anti-alias filter (see application notes). The ADC is normally AC coupled via two capacitors (typically 4.7µF). The SL1710 also includes divide by 32 prescaler output. These may be fed to an external PLL circuit which can be used to drive the on-chip oscillator, thus forming a complete control loop. The VCO can be disabled by applying 0V to pin 15. 3 VR1 1K R1 75R 1 5V AGC PSCALB PSCAL 5V C5 100nF IFIN IFINB C14 10nF 4u7 4u7 11 10 5 4 L6 C1 100nF C4 100pF L5 C15 10nF C2 100nF SK1 RF IN R7 680R 4K7 R6 C3 100nF 6 R5 680R VEEA 5V C6 100pF /32 16 VCCB 5V + QOUT VCOB VCOA IOUT C9 47uF 2 15 7 14 13 C11 220nF 2 1 LK2 12nH 4 3 3p9 C13 3p3 D1 BB811 SK3 I CH O/P C12 4 2 L1 3 C10 220nF LK1 1 T2 BCW31 R4 110R 5V C21 10nF R11 10K R3 110R T1 BCW31 Fig. 3 Demonstration board circuit diagram SK4 Q CH O/P VCODIS SL1710 C8 100pF SW1 VCO DISABLE Q Mixer I Mixer IC1 C7 100nF R2 4K7 VEEB 12 VCCA 3 9 VCCC VEEC 8 C16 10nF C17 100pF 16 15 14 13 12 11 10 9 XTAL1 XTAL2 SDA R10 4K7 R9 22K R8 22K C20 47nF DRV CH PUMP Vee RF I/P P7 P6 P5 SCL SP5611 3 RF I/P Vcc NC P3 P4 IC2 1 DC POWER 30V CN1 T3 BCW31 5V 2 4 Oscillator 5V 1 2 3 4 5 6 7 8 30V C18 18pF C19 220nF 6 5 4 3 X1 4 MHz 5V SCL5 GND 5V0 SDA5 I2C SK4 SL1710 SL1710 +j1 +j0.5 +j2 +j0.2 0 +j5 0.2 0.5 1 2 Marker Zreal Zimag 1 480MHz = 75.7 = –36.4 5 –j5 –j0.2 –j2 –j0.5 –j1 START 350 MHz STOP 650 MHz Fig.4 Typical RF input impedance APPLICATION NOTES SAW RESONATOR OSCILLATOR These application notes should be read in conjunction with the circuit diagram Fig 3. and the PCB layout illustrated in Figs 9 and 10. An alternative oscillator configuration using a SAW Resonator is shown in the circuit diagram Fig. 11 and the PCB layout illustrated in Figs 12 and 13. These boards have been designed to permit the initial evaluation of the SL1710 performance. The application detailed in Fig. 11 shows an SL1710 with a SAW Resonator controlled oscillator. In this instance the frequency accuracy and stability of the oscillator are determined by the Saw Resonator. The PCB detailed in Figs. 12 and 13 is designed to accommodate the following SAWR; Manufacturer MURATA Part No SAR479.45MB10X200 VARACTOR TUNED The application detailed in Fig.3 uses a synthesised VCO. The tuning range of the oscillator is; Varactor line Voltage. 5 Volts 30 Volts Oscillator Frequency 458MHz 504MHz This configuration gives a VCO sensitivity of 1.84MHz/ Volt. The inductor L1 is a 12nF surface mount component. Different VCO centre frequencies and sensitivities can be achieved by changing the values of L1, C12 and C13. The VCO frequency is controlled by the SP5611 synthesiser which is programmed via an I2C bus. The RF input to the synthesiser is from the SL1710 prescaler outputs via RF inductors L3 and L4. PRESCALER OUTPUTS The VCO frequency/32 is available at the differential prescaler outputs pins 10 and 11. This enables the on board VCO to be synthesised via a PLL. VCO DISABLE The on-chip oscillator can be disabled by connecting the VCO Disable (pin 15) to ground and enabled by connecting the pin to VCC via a 4K7 pull up resistor. AGC The DC voltage measured at TP1 should be adjusted using VR1 to read 2.5 volts with respect to VEE. this voltage equates to the nominal centre of the AGC control curve. The control voltage applied to pin 1 can be varied between 0.5 Volts (maximum gain) and VCC -0.5 Volts minimum gain) 5 SL1710 I & Q OUTPUTS The I and Q output stages of the SL1710 are sensitive to the loads connected to them. To avoid degrading the output signals resistive loads connected to these pins should always be 1KΩ or greater with a parallel capacitance of 15pF or less For evaluation purposes this makes the output unsuitable for connection to test equipment via normal coaxial cables. To alleviate this problem the application board is fitted with emitter follower buffer amplifiers which allow the connection of loads as low as 50Ω via coaxial cables without loading the output stages of the SL1710. These buffer amplifiers can be either connected in circuit, or bypassed by changing the position of Links 1 and 2. This technique may be used in a real application where the SL1710 is used to drive and ADC via an anti-alias filter. Great care must be taken to ensure that the loading conditions stated above are not exceeded when designing the anti-alias filter section. Use of an emitter follower buffer is the easiest way to alleviate this constraint. With the AGC voltage adjusted to 2.5 Volts apply an input signal to the IF IN (pin 5) and monitor the Base Band output level at the I and Q outputs. Adjust the RF input level until an output level of 760mV pk-pk is achieved. For best performance this level should not exceeded. Vcc 2 2K PRESCALER OUTPUT 15pF Fig.5 Maximum prescaler output load 6 SL1710 50.00 GAIN (dB) 45.00 40.00 33.00 30.00 25.00 0 1 2 3 4 5 Vagc (V) Fig. 6 AGC operation IQ OUTPUT 15pF 1KΩ Fig. 7 Maximum IQ output load Marker Freq Zreal Zimag 1 2 3 500KHz 15MHz 30MHz 3.5 Ω 4.5 Ω 56 Ω 0.5 Ω 32 Ω 92 Ω +j1 +j0.5 +j2 2 +j0.2 +j5 3 0 0.2 0.5 1 2 5 1 –j5 –j0.2 –j2 –j0.5 START.010MHz –j1 STOP 30.MHz Fig. 8 Output impedance 7 SL1710 Fig. 9 Demonstration PCB top view Fig. 10 Demonstration PCB bottomview 8 5V IF IN 1 3 SK1 2 POWER CN1 75R R1 C2 100nF 100nF C1 R7 680R VR1 1K R5 680R AGC 3 VEEA 11 PSCAL 10 PSCALB 5 IFIN 4 IFINB 1 12 VEEB VCCB VCCA 9 8 VEEC /32 VCCC 5V C6 VCO DISABLE 5V 4K7 15 7 14 13 2 SW1 VCODIS QOUT VCOB VCOA IOUT C8 100nF R2 SL1710 C7 100pF Osc IC1 Q Mixer I Mixer 100nF C9 47uF Fig. 11 SL1710 I & Q downconverter with saw resonator TP1 5V 16 5V C5 100pF 6 C4 100nF AGC VOLTS 4K7 R6 C3 100pF 5V 4 2 Q CH OUT C11 220nF 4 2 SK2 T2 BCW31 SK3 3 1 LK2 100pF C15 100pF C14 T1 BCW31 5V 1 R3 110R R4 110R 2 C13 1nF 3 SAW RESONATOR SAW1 I CH OUT 3 1 LK1 C10 220nF + 4 C12 1nF SL1710 9 SL1710 Fig. 12 Fig. 13 10 http://www.mitelsemi.com World Headquarters - Canada Tel: +1 (613) 592 2122 Fax: +1 (613) 592 6909 North America Tel: +1 (770) 486 0194 Fax: +1 (770) 631 8213 Asia/Pacific Tel: +65 333 6193 Fax: +65 333 6192 Europe, Middle East, and Africa (EMEA) Tel: +44 (0) 1793 518528 Fax: +44 (0) 1793 518581 Information relating to products and services furnished herein by Mitel Corporation or its subsidiaries (collectively “Mitel”) is believed to be reliable. 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