SL2017 Full Band Satellite Tuner Preliminary Information DS4889 - 1.2 may 1998 The SL2017 is a fully integrated mixer with output AGC, intended primarily for application in satellite tuners, where it downconverts the first high IF from the outdoor unit to the second IF for data demodulation. The device contains a low noise RF input amplifier and mixer functioning to 2.15GHz, an integrated low phase noise local oscillator buffer and an AGC IF output buffer amplifier. The IF signal is available at one of two outputs selected by the IF-OP-SEL input. The signal handling of the SL2017 is sufficient to greatly simplify or remove the requirement for input AGC with appropriate image filtering in full band systems, or to remove the requirement for band limit filtering with appropriate AGC in half band systems. VEE-RF 1 16 AGC CONTROL RF INPUTB 2 15 IF OUTPUT1 RF INPUT 3 14 IF OUTPUT1B VCC-RF 4 13 VCC-IF VCC-LO 5 12 VEE-IF LO 6 11 IF OUTPUT2 LOB 7 10 IF OUTPUT2B VEE-LO 8 9 IF OP SEL FEATURES ■ Single chip full band solution, compatible with digital and analog transmissions ■ Low noise RF input ■ High input signal handling to eliminate the requirement for front end AGC MP16 Fig.1 Pin connections - top view ORDERING INFORMATION SL2017/KG/MP1S (Tubes) SL2017/KG/MP1T (Tape and Reel) ■ Low phase noise local oscillator buffer optimised for low symbol rate applications APPLICATIONS ■ Low radiation design ■ Satellite tuners ■ IF AGC amplifier with dual selectable outputs ■ Communications systems ■ ESD protection. (Normal ESD handling procedures should be observed) SL2017 QUICK REFERENCE DATA Characteristic Units RF input noise figure 18 dB Maximum conversion gain 33 dB Minimum conversion gain -5 dB IF1 and IF2 output gain match 2 dB IP32T input referred at minimum conversion gain +3 dBm IP22T input referred at minimum conversion gain +17 dBm LO 6 RF INPUTB RF INPUT VCC LOB 7 2 15 3 14 IF OUTPUT1B 4, 5, 13 11 1, 8, 12 VEE 9 IF-OP-SEL Fig. 2 2 IF OUTPUT1 Block diagram IF OUTPUT2 10 IF OUTPUT2B 16 AGC CONTROL SL2017 FUNCTIONAL DESCRIPTION The SL2017 is a downconverter mixer with an output AGC amplifier, which when used with appropriate external varactor tuned oscillator performs the first IF tuning function for a full band satellite receiver system. A block diagram is contained in Fig. 2. In application the RF input of the device is interfaced through appropriate impedance matching to the first IF signal, which is downlinked from the outdoor unit at typically 950-2150MHz. The RF input preamplifier of the device is designed for low noise figure and for low distortion so eliminating the requirement for RF AGC. The preamplifier also provides gain to the mixer section and back isolation from the local oscillator section. The output of the preamplifier is fed to the mixer section where the RF signal is mixed with the local oscillator frequency, which is generated by an external oscillator. Signals from the mixer are fed to the AGC IF amplifier, which gives an overall conversion gain programmable from -10 to +30dB. The output of this stage can be switched to one of two outputs to facilitate IF processing. 6.2nH TO DEVICE 0.7pF Fig. 3 RF input matching network 1nF C10 3 5V C19 100nF 1nF L1 10nH 5V C5 100pF TL1 2 3 LO 7 LO B 47pF C52 0.5pF 8 R2 5K6 Vcc LO 6 C22 IT379 R6 22K Vcc RF 22 1 SNIFFER 4 5 C20 47pF R11 R1 BFR182 2K7 TR2 C12 DV2 100pF RF INPUT 4 5V C21 100pF DV1 IT379 C4 100pF Vee LO R3 270 NC C18 C17 0.5pF C23 2p2F Varactor Line RF B RF C24 100pF Fig. 4 Typical external VCO application circuit +j1 +j0.5 +j2 +j0.2 0 +j5 0.2 0.5 1 2 5 X –j5 –j0.2 S11:Z0 = 50 Ω X –j0.5 X X X –j2 NORMALISED TO 50 Ω –j1 FREQUENCY MARKERS AT 1.3GHz, 1.8GHz, 2.3GHz, 2..8GHz Fig. 5 LO buffer input impedance 3 SL2017 IP3 (dBm) +5 -20 -10 10 20 30 Conversion gain (dB) 40 -5 -10 -15 -20 -25 Applies for a constant IF output level of -14dBm Fig. 6 IP3 variation with gain setting (minimum) IP2 (dBm) +15 +10 +5 -20 -10 10 20 30 -5 -10 -15 -20 Applies for a constant IF output level of -14dBm Fig. 7 IP2 variation with gain setting (minimum) 4 40 SL2017 Gain setting (dB) -10 0 +10 +20 +30 RF input level at P1dB (dBm) X -10 -20 X X -30 Fig. 8 Variation of 1dB gain compression (P1dB) with gain setting (typical) 35 30 25 Conversion gain (dB) 20 15 10 5 0 -5 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 3.8 4 AGC voltage (V) -10 -15 -20 Fig.9 Gain variations with AGC voltage (typical) 5 SL2017 Vcc VREF 1 300 300 IF-OP-SEL VREF 3 RF INPUTS RF inputs IF output select input VREF 2 1K 1K TANK LO 50 50 TANKB LOB Local oscillator inputs IF outputs VREF4 2K AGC 12K CONTROL AGC input Fig. 10 Input/Output interface circuits 6 OUTPUT OUTPUTB SL2017 SL2017 Evaluation Board Links and Switches This board has been created to show the operation of the SL2017 mixer together with the SP5659 low phase noise synthesiser. Schematics for the board are shown in Figs. 11a and 11b. In a real system, the IF output would be fed to a SAW filter then onto either an FM demodulator such as the SL1466, or an IQ downconverter such as the SL1710 or SL1711. Control of the AGC would be via a loop, which should be set up to ensure that the SL1466, SL1710 or other IF chip receives the correct level for optimum performance. For full evaluation, 30V and 5V supplies are necessary, together with I2C data, RF signal sources and test equipment. The board is provided with the following: Supplies The SP5659 synthesiser is used to set the frequency of the VCO. Since high sided mixing is normally employed in satellite tuners, the VCO should be set to the IF above the wanted input channel. The board must be provided with the following supplies: AGC SELECT switch This switches between programmable control of the SL2017 AGC, via port P1 of the SP5659, or direct control via the pin TP1, EXTERNAL AGC VOLTAGE. In normal application , the AGC will be controlled via a loop, such that the IF chip which follows is fed with the desired input level. Programming of SP5659 Synthesiser a) 5V for the SL2017 and SP5659 and external oscillator and 30V for the varactor line. Example: The supply connector is a 3 pin 0.1" pitch pin header. The centre pin of the connector is GND. The synthesiser must be programmed to 1020.5MHz + 479.5MHz = 1500MHz. I2C Bus connections Send I2C data C2 0B B8 93 40 to the SP5659. See Table 1 for example I2C codes. b) The board is provided with an RJ11 I2C bus connector which feeds directly to the SP5659 synthesiser. This connects to a standard 6-way connector cable which is supplied with the I2C/3-wire bus interface box. Input and Output connections The board is provided with the following connectors: a) RF I/P SMA connector (SMA1) which is AC coupled to the RF input of the SL2017. b) IF OUT 1 (SMA2) and IF OUT 2 (SMA5). These outputs may be selected by switching port P0 on the SP5659. The standard IF output frequencies used are typically 402.75MHz or 479.5MHz. Either IF output may be connected directly to 50Ω test equipment such as a spectrum analyser. Details of programming the SL2017 are included below. To mix a wanted channel at 1020.5MHz down to 479.5MHz. C2 is the address byte (byte 1). 0B B8 is the programmable divider information (bytes 2 and 3). (i.e. 1500MHz / 500kHz = 3000 = 0BB8Hex) 93 is the programmable and reference divider information (byte 4). This will enable the prescaler and program the reference divider to a divide by 16 mode giving a 250kHz phase comparator frequency with a 500kHz step size when a 4MHz crystal is used. 40 is charge pump and port control data (byte 5). The code 40 will set the charge pump current to 260uA. All ports will be switched off. If it is required to use the SP5659 (for VCO < 2GHz) with the prescaler disabled it is recommended that data is initially sent to enable the prescaler. This will avoid a potential 'lock out' situation arising when the LO frequency is greater than 2GHz. 7 SL2017 Required VCO Byte 1 Byte2 Byte 3 Byte 4 Byte 5 Frequency (MHz) Address Prog Divider 8 MSB's Prog Divider 8 LSB's Prog Divider /Reference Divider Charge Pump and Port Control 1500 C2 0B B8 93 40 1600 C2 0C 80 93 40 1700 C2 0D 48 93 40 1800 C2 0E 10 93 40 1900 C2 0E D8 93 40 2000 C2 0F A0 93 40 2100 C2 10 68 93 40 2200 C2 11 30 93 40 2300 C2 11 F8 93 40 2400 C2 12 C0 93 40 Bottom of Band C2 XX XX 93 11 Top of Band C2 XX XX 93 10 Codes above are for Fcomp = 250kHz, prescaler enabled, giving Fstep = 500kHz. X = Don't care Table 1. Example I2C Hex codes for SP5659 synthesiser Switching of SL2017 IF outputs Port P0 is used to select the IF ouputs. When Port P0 is OFF, IF output 1 is selected. When Port P0 is ON, IF output 2 is selected. Switching of SL2017 AGC Port P1 is used to program the AGC gain. When Port P1 is OFF, AGC is set to 4V (minimum gain). When Port P1 is ON, the AGC is set to 1V (maximum gain). SL2017 Operation The SL2017 is a downconverter mixer with an AGC amplifier, which when used with appropriate external varactor tuned oscillator performs the first IF tuning function for a full band satellite receiver system. In application the RF input of the device is interfaced through appropriate impedance matching to the first IF signal, which is down linked from the outdoor unit at typically 9502150MHz. The RF input preamplifier of the device is designed for low noise figure and for low distortion so eliminating the requirement for RF AGC. The preamplifier also provides gain to the mixer section and back isolation from the local oscillator signal. 8 The output of the preamplifier is fed to the mixer section where the RF signal is mixed with the local oscillator frequency. Signals from the mixer are then fed to the AGC IF amplifier, which gives an overall conversion gain programmable from -10 to +30 dB. The output of this stage can be switched to one of two outputs to facilitate IF processing. The SL2017 will mix an RF input signal from 950MHz 2150MHz and produce an IF signal typically at 402.75MHz or 479.5MHz. The device has a number of features, which may be either programmable via a synthesiser and operated as part of a dynamic AGC loop, or hardwired into a fixed mode. There are a variety of parameters which can be measured using this evaluation board. SL2017 Measurement of Phase Noise. This is best measured by looking at the IF output of the SL2017. The IF should be fed to a spectrum analyser, where it can be interpreted. There are two common methods of doing this: Care must be taken to ensure that the LO is stable, since any instability will reduce the averaged peak LO value, thus giving a falsely low phase noise reading. g) convert the measured reading to a 1Hz bandwidth. a) using phase noise analysis software (such a HP85671A phase noise program) e.g. A measured phase noise of -50dBc/1kHz bandwidth (RBW of 1kHz) corresponds to -80dBc/Hz. b) direct measurement of the noise floor at the chosen offset frequency, and conversion to a dBc/Hz figure. Since noise floor must be reduced by the ratio of the two bandwidths Since method a) will depend on the software used, a description of method b) will be given only. i.e. 10 log 1kHz/1Hz = 30dB. To measure phase noise at 10kHz offset: a) tune the centre frequency of the spectrum analyser to the IF - e.g. 479.5MHz Measurement of Conversion Gain (from a 50Ω source) b) Set the span initially wide (10MHz or greater). Gradually reduce this until it is set to 50kHz or less, taking care to ensure that the centre frequency of the display matches the IF peak. a) Connect an RF signal generator to the RF input to the SL2017. b) Connect an IF output to a spectrum analyser. c) perform a peak search d) set marker delta to 10kHz c) Feed the SL2017 with the appropriate signal level, depending on AGC setting, required output, etc. e) set video averaging ON to ensure that a representative measurement of the noise floor at the chosen offset frequency is made. d) Note the relative difference in the input and IF level in dB. This is the conversion gain of the device. f) record the level of noise at the 10kHz offset compared to the peak IF level (in dBc). For increased accuracy, the input signal level should also be checked with a spectrum analyser, since any level measurement errors that exist within the analyser will then be relative, rather than literal. The AGC voltage may be varied and conversion gain measured at different AGC voltages. 9 SL2017 e) The difference in level in dB between the fundamentals and the 3rd order products is the IM3 of the device. Measurement of IM3 and IP3 a) Input two signal tones from RF generators. The level of these should be adjusted so that the device sees an input signal level of -19dBm from each tone. f) IP3 may be calculated from the above reading as follows: Program the local oscillator so that both tones are mixed down to the IF (approx). This level is usually referred to the input. IP3 = RF input level + IM3/2. e.g. b) Adjust the AGC so that the device gives an overall conversion gain of +5dB. c) Connect a spectrum analyser to the selected IF output of the device. d) Measure the relative levels of the down converter signals and the 3rd order products (see diag overleaf). Two input signals are used: Assuming a measured IM3 of 44dB, and with an input level of -19dBm, IP3 = 44/2 + -19dBm = +3dBm In a 50Ω system, this may be converted to dBuV by adding 107 to the value calculated since 0dBm = 107dBµV. i.e. +3dBm = 110dBuV. f1 = 950MHz f2 = 951MHz This is known as the input referred IP3 of the device. The local oscillator flo is tuned to 1430MHz. This gives the following at the IF output: fa = 1430MHz - 950MHz = 480MHz fb = 1430MHz - 951MHz = 479MHz Mixing products are also produced in the front end. These are then downconverted by the mixer. The in-band ones are listed below: fd = flo - (2 x f1 - f2) fc = flo - (2 x f2 - f1) fd = 1430MHz - (2 x 950MHz - 951MHz) = 481MHz fc = 1430MHz - (2 x 951MHz - 950MHz) = 478MHz fundamentals 3rd order product 3rd order product fc 10 fa fb fd If you experience any difficulties with this board, or require further help, please contact Robert Marsh on 01793 518234 or Fred Herman on 01793 518423. The fax number is 01793 518411. J3 SCL5 GND 5V0 SDA5 I2C BUS 6 5 4 3 100pF C38 X1 100pF C37 4MHz C30 18pF C31 15nF Charge Pump VEE P1 8 P2 9 10 11 12 13 14 15 16 R13 220R 1K R15 C34 100nF 4K R14 T1 BCW31 R8 22K 1 2 3 J1 +30V GND +5V 10K R16 5V R9 16K RF B RF C39 2n2F POWER CONNECTOR Fig. 11a Evaluation board schematic PLL section P0 7 P3 VCC RF Input RF Input Drive Output C41 4u7F ADC I2C Bus Interface Divider Programmable Phase Comp 68pF C36 100pF 6 SCL 5 SDA 4 Address 3 Ref/Comp 2 Xtal 1 IC2 SP5659 C32 R7 13K C33 100nF 5V AGC IF OP SEL R10 47K Varactor line SL2017 11 12 DV1 IT379 TL1 SNIFFER Varactor Line 4 2 RF NC C18 R3 270 C17 0.5pF C52 0.5pF 22 R11 47pF C22 C20 47pF C5 100pF 5V 1nF 5V C4 100pF 8 7 6 5 4 3 2 Vee LO LO B LO Vcc LO Vcc RF RF INPUT RF INPUT B Vee RF Fig. 11b Evaluation board schematic SL2017 Section 100pF C24 R2 5K6 RF B R6 22K IT379 C23 2p2F 3 1 R1 BFR182 2K7 TR2 C12 DV2 100pF C21 100pF C19 100nF L1 10nH 5V SMA1 RF INPUT 1nF C10 C9 1 IC1 SL2017S2 IF OP SEL IF OUTPUT 2B IF OUTPUT 2 VeeIF VccIF IF OUTPUT 1B IF OUTPUT 1 AGC CONTROL NOTE: DIFFERENTIAL SIGNALS ARE SHOWN AS THICK LINES 9 10 11 12 13 14 15 16 C14 1nF IFOUT 2 SW SPDT C8 1nF 1nF C7 5V S1 C6 100pF 1nF C2 C1 1nF C13 1nF IFOUT 1 4K7 R20 5V SMA4 IFOUT2 SMA5 IF OUT 2B SMA3 IFOUT1B SMA2 IF OUT 1 EXT AGC VOLTAGE 1 2 TP1 SL2017 SL2017 ELECTRICAL CHARACTERISTICS These characteristics are guaranteed by either production test or design. They apply within the specified ambient temperature and supply voltage unless otherwise stated. TAMB = -20°C to + 80°C, VCC= + 4.75V to 5·25V. IF = 403.25MHz or 479.5MHz; IF bandwidth up to 54MHz maximum. RF input frequency = 950MHz - 2150MHz. Characteristic Value Pin Typ Max 4,5,13 80 115 2,3 18 Min Supply Current, ICC RF input Noise figure Variation of Noise Figure with Units Conditions mA dB 1 dB/dB -5 dB @ Tamb = 27°C. At maximum gain AGC setting Conversion gain AGC bandwidth 100kHz minimum AGC gain -15 maximum AGC gain 25 33 dB AGC = 4.0V AGC = 1.0V AGC = self bias (2.4V) Gain inband ripple Gain variation across RF input -0.25 +0.25 dB -2 +2 dB -2 +2 dB Channel bandwidth 27MHz range Gain imbalance between IF 10,11 outputs 14,15 RF input impedance, single 2,3 50 Ω @ Tamb = 27°C dB Input unmatched @ Tamb = 27°C ended RF input return loss 2,3 8 12 RF input IP2 2,3 12 14 dBm See note 2 RF input IP3 2,3 -1 1 dBm See note 2 RF input IP3 variation with gain See Fig. 6 Input referred 1dB gain See Fig. 8 compression Two tone IM2 distortions with Two tone IM3 distortions LO input drive level 6,7 LO input impedance 6,7 -31 -33 -36 -40 -10 0 dBc See note 2 dBc See note 2 dBm From 1300 - 2700MHz Ω See Smith chart Fig. 5 13 SL2017 ELECTRICAL CHARACTERISTICS These characteristics are guaranteed by either production test or design. They apply within the specified ambient temperature and supply voltage unless otherwise stated. TAMB = -20°C to + 80°C, VCC= + 4.75V to 5·25V. IF = 403.25MHz or 479.5MHz; IF bandwidth up to 54MHz maximum. RF input frequency = 950MHz -2150MHz. Characteristic Value Pin Min LO leakage to RF input Typ 2,3,6,7 Max -20 Conditions Units dBr Relative to single ended input LO drive level LO leakage to IF outputs 6,7,10,11 -10 dBm 250 µA Maximum conversion gain 14,15 AGC gain control slope variation 16 AGC control input current 16 Monotonic from VEE to VCC. See Fig. 9 -250 Output select low voltage 9 Output select high voltage 9 Output select low current 9 -50 µA Output select high current 9 200 µA IF output 1 & 2 0.7 VCC-0.7 V O/P 2 enabled, O/P 1 disabled V O/P 1 enabled, O/P 2 disabled 10,11, Output in enabled and disabled state 14,15 Output impedance 50 Return loss IF output 1 to 2 isolation 10,11 Ω 12 dB 30 dB Single ended 14,15 Notes: 1. All dBm units refer to a 50Ω system 2. Applies for any two carriers within band at -19dBm, and with AGC set for +5dB conversion gain. 14 SL2017 ABSOLUTE MAXIMUM RATINGS All voltages are referred to VEE = 0V (pins 1,8,12) Parameter Value Pin Min Supply voltages VCC 4,5,13 7 V 2.5 Vp-p -0.3 VCC+0.3 V -0.3 VCC+0.3 V 9 -0.3 VCC+0.3 10, 11 -0.3 VCC+0.3 V -0.3 VCC+0.3 V RF input voltage 2,3 RF input DC offset 2,3 LO input DC offset 6,7 IF-OP-SEL input DC offset IF outputs 1 and 2 DC offset -0.3 Units Conditions Max Transient 14, 15 AGC Control input DC offset 16 Storage temperature -55 Junction temperature +150 °C +150 °C 111 °C/W 41 °C/W 580 mW MP16 thermal resistance Chip to ambient Chip to case Power consumption at VCC=5.25V ESD protection ALL 1.75 kV Mil std 883 latest revision method 3015 cat 1. 15 http://www.mitelsemi.com World Headquarters - Canada Tel: +1 (613) 592 2122 Fax: +1 (613) 592 6909 North America Tel: +1 (770) 486 0194 Fax: +1 (770) 631 8213 Asia/Pacific Tel: +65 333 6193 Fax: +65 333 6192 Europe, Middle East, and Africa (EMEA) Tel: +44 (0) 1793 518528 Fax: +44 (0) 1793 518581 Information relating to products and services furnished herein by Mitel Corporation or its subsidiaries (collectively “Mitel”) is believed to be reliable. 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