3.3V 28Mbps to 1.3Gbps AnyRate® Clock and Data Recovery Micrel, Inc. SY87701AL SY87701AL DESCRIPTION FEATURES ■ Industrial temperature range (–40°C to +85°C) ■ 3.3V power supply ■ Clock and data recovery from 28Mbps up to 1.3Gbps NRZ data stream, clock generation from 28Mbps to 1.3Gbps ■ Complies with Bellcore, ITU/CCITT and ANSI specifications for applications such as OC-1, OC-3, OC-12, ATM, FDDI, Fibre Channel and Gigabit Ethernet as well as proprietary applications ■ Two on-chip PLLs: one for clock generation and another for clock recovery ■ Selectable reference frequencies ■ Differential PECL high-speed serial I/O ■ Line receiver input: no external buffering needed ■ Link fault indication ■ 100k ECL compatible I/O ■ Lower power: fully compatible with Micrel's SY87701V, but with 30% less power ■ Available in 32-pin EPAD-TQFP and 28-pin SOIC packages (28-pin SOIC is available, but NOT recommended for new designs.) The SY87701AL is a complete Clock Recovery and Data Retiming integrated circuit for data rates from 28Mbps up to 1.3Gbps NRZ. The device is ideally suited for SONET/SDH/ATM and Fibre Channel applications and other high-speed data transmission systems. Clock recovery and data retiming is performed by synchronizing the on-chip VCO directly to the incoming data stream. The VCO center frequency is controlled by the reference clock frequency and the selected divide ratio. On-chip clock generation is performed through the use of a frequency multiplier PLL with a byte rate source as reference. The SY87701AL also includes a link fault detection circuit. All support documentation can be found on Micrel’s web site at: www.micrel.com. APPLICATIONS ■ ■ ■ ■ SONET/SDH/ATM OC-1, OC-3, OC-12, OC-24 Fibre Channel, Escon, SMPTE 259 Gigabit Ethernet/Fast Ethernet Proprietary architecture up to 1.3Gbps BLOCK DIAGRAM PLLR P/N RDINP (PECL) RDINN RDOUTP (PECL) PHASE DETECTOR RDOUTN RCLKP (PECL) 0 CHARGE PUMP 1 VCO RCLKN PHASE/ FREQUENCY DETECTOR LINK FAULT DETECTOR CD (PECL) REFCLK (TTL) PHASE/ FREQUENCY DETECTOR CHARGE PUMP VCO 1 LFIN (TTL) TCLKP (PECL) 0 TCLKN VCC VCCA VCCO GND DIVIDER BY 8, 10, 16, 20 SY87701AL DIVSEL 1/2 (TTL) FREQSEL 1/2/3 (TTL) PLLS P/N CLKSEL (TTL) AnyRate is a registered trademark of Micrel, Inc. M9999-082107 [email protected] or (408) 955-1690 Rev.: G 1 Amendment: /0 Issue Date: August 2007 Micrel, Inc. SY87701AL PACKAGE/ORDERING INFORMATION Ordering Information VCCA 1 28 VCC LFIN 2 27 CD Part Number Package Type Operating Range Package Marking Lead Finish DIVSEL1 3 26 DIVSEL2 RDINP 4 25 RDOUTP SY87701ALZI Z28-1 Industrial SY87701ALZI Sn-Pb 24 RDOUTN SY87701ALHI H32-1 Industrial SY87701ALHI Sn-Pb 23 VCCO SY87701ALZG Z28-1 Industrial SY87701ALZG with Pb-Free bar-line indicator Pb-Free NiPdAu SY87701ALHG(1) H32-1 Industrial SY87701ALHG with Pb-Free bar-line indicator Pb-Free NiPdAu RDINN 5 FREQSEL1 6 REFCLK 7 22 RCLKP FREQSEL2 8 21 RCLKN FREQSEL3 9 20 VCCO N/C 10 19 TCLKP PLLSP 11 18 TCLKN PLLSN 12 17 CLKSEL GNDA 13 16 PLLRP GND 14 15 PLLRN Note: 1. Pb-Free package recommended for new designs. DIVSEL1 LFIN VCCA VCCA VCC VCC CD DIVSEL2 28-Pin SOIC (Z28-1) 32 31 30 29 28 27 26 25 NC RDINP RDINN FREQSEL1 REFCLK FREQSEL2 FREQSEL3 NC 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 RDOUTP RDOUTN VCCO RCLKP RCLKN VCCO TCLKP TCLKN PLLSP PLLSN GNDA GND GND PLLRN PLLRP CLKSEL 9 10 11 12 13 14 15 16 32-Pin EPAD TQFP (H32-1) M9999-082107 [email protected] or (408) 955-1690 2 Micrel, Inc. SY87701AL PIN DESCRIPTIONS Pin Number SOIC Pin Number TQFP Pin Name 4 5 2 3 RDINP RDINN Serial Data Input (Differential PECL): These built-in line receiver inputs are connected to the differential receive serial data stream. An internal receive PLL recovers the embedded clock (RCLK) and data (RDOUT) information. The incoming data rate can be within one of eight frequency ranges depending on the state of the FREQSEL pins. See “Frequency Selection” table. 7 5 REFCLK Reference Clock (TTL Inputs): This input is used as the reference for the internal frequency synthesizer and the “training” frequency for the receiver PLL to keep it centered in the absence of data coming in on the RDIN inputs. 27 26 CD 6 8 9 4 6 7 FREQSEL1 FREQSEL2 FREQSEL3 3 26 32 25 DIVSEL1 DIVSEL2 Divider Select (TTL Inputs): These inputs select the ratio between the output clock frequency (RCLK/TCLK) and the REFCLK input frequency as shown in the “Reference Frequency Selection” table. 17 16 CLKSEL Clock Select (TTL Inputs): This input is used to select either the recovered clock of the receiver PLL (CLKSEL = HIGH) or the clock of the frequency synthesizer (CLKSEL = LOW) to the TCLK outputs. 2 31 LFIN Link Fault Indicator (TTL Output): This output indicates the status of the input data stream RDIN. Active HIGH signal is indicating when the internal clock recovery PLL has locked onto the incoming data stream. LFIN will go HIGH if CD is HIGH and RDIN is within the frequency range of the Receive PLL (1000ppm). 25 24 24 23 RDOUTP RDOUTN Receive Data Output (Differential PECL): These ECL 100k outputs represent the recovered data from the input data stream (RDIN). This recovered data is specified against the rising edge of RCLK. These outputs must be terminated with 50Ω to VCC–2 or equivalent. Thhis applies even if these outputs are not used. 22 21 21 20 RCLKP RCLKN Clock Output (Differential PECL): These ECL 100k outputs represent the recovered clock used to sample the recovered data (RDOUT). 19 18 18 17 TCLKP TCLKN Clock Output (Differential PECL): These ECL 100k outputs represent either the recovered clock (CLKSEL = HIGH) used to sample the recovered data (RDOUT) or the transmit clock of the frequency synthesizer (CLKSEL = LOW). These outputs must be terminated with 50Ω to VCC–2 or equivalent. This applies even if these outputs are not used. 11 12 9 10 PLLSP PLLSN Clock Synthesis PLL Loop Filter. External loop filter pins for the clock synthesis PLL. 16 15 15 14 PLLRP PLLRN Clock Recovery PLL Loop Filter. External loop filter pins for the receiver PLL. 28 27, 28, VCC Supply Voltage(1) 1 29, 30 VCCA Analog Supply Voltage(1) 20, 23 19, 22 VCCO Output Supply Voltage(1) 13, 14 12, 13 GND Ground 10 1, 8 NC 13 11 GNDA Pin Function Carrier Detect (PECL Input): This input controls the recovery function of the Receive PLL and can be driven by the carrier detect output of optical modules or from external transition detection circuitry. When this input is HIGH the input data stream (RDIN) is recovered normally by the Receive PLL. When this input is LOW the data on the inputs RDIN will be internally forced to a constant LOW, the data outputs RDOUT will remain LOW, the Link Fault Indicator output LFIN forced LOW and the clock recovery PLL forced to look onto the clock frequency generated from REFCLK. Frequency Select (TTL Inputs): These inputs select the output clock frequency range as shown in the “Frequency Selection” table. No Connect Analog Ground Note: 1. VCC, VCCA, VCCO must be the same value. M9999-082107 [email protected] or (408) 955-1690 3 Micrel, Inc. SY87701AL FUNCTIONAL DESCRIPTION Lock Detect The SY87701AL contains a link fault indication circuit that monitors the integrity of the serial data input. If the recovered serial data from RDIN is at the correct data rate (within 1000ppm of the synthesizer frequency), the Link Fault Indicator (LFIN) output will be asserted HIGH indicating an in-lock condition and will remain HIGH as long as this condition is met. In the event that the recovered serial data is not at the correct data rate (greater than 1000ppm difference from the synthesizer frequency), then LFIN output will go LOW indicating an out-of-lock condition. This condition will force the Clock and Data Recovery PLL (CDR) to lock onto the synthesizer frequency until it is within the correct frequency range (less than 1000ppm difference from the synthesizer frequency). Once the CDR is within the correct frequency range it will again lock onto the RDIN input. During the interval when the CDR is not locked onto the RDIN input, the LFIN output will not be a static LOW, but will be changing. Clock Recovery Clock Recovery, as shown in the block diagram, generates a clock that is at the same frequency as the incoming data bit rate at the Serial Data input. The clock is phase aligned by a PLL so that it samples the data in the center of the data eye pattern. The phase relationship between the edge transitions of the data and those of the generated clock are compared by a phase/frequency detector. Output pulses from the detector indicate the required direction of phase correction. These pulses are smoothed by an integral loop filter. The output of the loop filter controls the frequency of the Voltage Controlled Oscillator (VCO), which generates the recovered clock. Frequency stability without incoming data is guaranteed by an alternate reference input (REFCLK) that the PLL locks onto when data is lost. If the Frequency of the incoming signal varies by greater than approximately 1000ppm with respect to the synthesizer frequency, then PLL will be declared out of lock, and the PLL will lock to the reference clock. The loop filter transfer function is optimized to enable the PLL to track the jitter, yet tolerate the minimum transition density expected in a received SONET data signal. This transfer function yields a 30µs data stream of continuous 1's or 0's for random incoming NRZ data. The total loop dynamics of the clock recovery PLL provides jitter tolerance which is better than the specified tolerance in GR-253-CORE. M9999-082107 [email protected] or (408) 955-1690 4 Micrel, Inc. SY87701AL CHARACTERISTICS Performance The SY87701AL PLL complies with the jitter specifications proposed for SONET/SDH equipment defined by the Bellcore Specifications: GR-253-CORE, Issue 2, December 1995 and ITU-T Recommendations: G.958 document, when used with differential inputs and outputs. Jitter Transfer Jitter transfer function is defined as the ratio of jitter on the output OC-N/STS-N signal to the jitter applied on the input OC-N/STS-N signal versus frequency. Jitter transfer requirements are shown in Figure 2. Jitter Generation The jitter of the serial clock and serial data outputs shall not exceed .01 U.I. rms when a serial data input with no jitter is presented to the serial data inputs. Input Jitter Tolerance Input jitter tolerance is defined as the peak-to-peak amplitude of sinusoidal jitter applied on the input signal that causes an equivalent 1dB optical/electrical power penalty. SONET input jitter tolerance requirement condition is the input jitter amplitude which causes an equivalent of 1dB power penalty. A Jitter Transfer (dB) Sinusoidal Input Jitter Amplitude (UI p-p) 0.1 15 -20dB/decade -20dB/decade 1.5 -20dB/decade Acceptable Range -20 0.40 f0 f1 f2 f4 ft fc Frequency Frequency OC/STS-N Level f0 (Hz) f1 (Hz) f2 (Hz) f3 (kHz) ft (kHz) OC/STS-N Level fc (kHz) P (dB) 3 10 30 300 6.5 65 3 130 0.1 12 10 30 300 25 250 12 225 0.1 Figure 1. Input Jitter Tolerance M9999-082107 [email protected] or (408) 955-1690 Figure 2. Jitter Transfer 5 Micrel, Inc. SY87701AL FREQUENCY SELECTION TABLE FREQSEL1 FREQSEL2 FREQSEL3 fVCO/fRCLK fRCLK Data Rates (Mbps) 0 0 0 1 650 - 1300 0 0 1 2 325 - 650 0 1 0 4 163 - 325 0 1 1 6 109 - 216 1 0 0 8 82 - 162 1 0 1 12 55 - 108 1 1 0 16 41 - 81 1 1 1 24 28 - 54 LOOP FILTER COMPONENTS(1) REFERENCE FREQUENCY SELECTION DIVSEL1 DIVSEL2 fRCLK/fREFCLK 0 0 8 0 1 10 1 0 16 1 1 20 R5 C3 PLLSP PLLSN Wide Range R5 = 350Ω C3 = 1.0µF (X7R Dielectric) R6 PLLRP C4 PLLRN Wide Range R6 = 680Ω C4 = 1.0µF (X7R Dielectric) Note: 1. Suggested Values. Values may vary for different applications. M9999-082107 [email protected] or (408) 955-1690 6 Micrel, Inc. SY87701AL Absolute Maximum Ratings(1) Operating Ratings(2) Supply Voltage (VCC) .................................. –0.5V to +4.0V Input Voltage (VIN) ......................................... –0.5V to VCC Output Current (IOUT) Continuous ............................................................. 50mA Surge .................................................................... 100mA Lead Temperature (soldering, 20 sec.) ..................... 260°C Storage Temperature (TS) ....................... –65°C to +150°C Supply Voltage (VCC) .............................. +3.15V to +3.45V Ambient Temperature (TA) ......................... –40°C to +85°C Package Thermal Resistance(3) SOIC (θJA)(4) ..................................................................... 80°C/W EPAD TQFP (θJA)(5) 0lfpm airflow ................................................. 27.6°C/W 200lfpm airflow ............................................. 22.6°C/W 500lfpm airflow ............................................. 20.7°C/W DC ELECTRICAL CHARACTERISTICS Symbol Parameter VCC Power Supply Voltage ICC Power Supply Current Condition Min Typ Max Units 3.15 3.3 3.45 V 120 160 mA PECL 100K DC ELECTRICAL CHARACTERISTICS VCC = VCCO = VCCA = 3.3V ±5%; TA = –40°C to +85°C; unless noted. Symbol Parameter VIH Input HIGH Voltage VIL Input LOW Voltage VOH Output HIGH Voltage VOL IIL Condition Min Typ Max Units VCC –1.165 VCC –0.880 V VCC –1.810 VCC –1.475 V 50Ω to VCC –2V VCC –1.075 VCC –0.830 V Output LOW Voltage 50Ω to VCC –2V VCC –1.860 VCC –1.570 V Input LOW Current VIN = VIL(min) µA 0.5 TTL DC ELECTRICAL CHARACTERISTICS VCC = VCCO = VCCA = 3.3V ±5%; TA = –40°C to +85°C; unless noted. Symbol Parameter Condition Min VIH Input HIGH Voltage VIL Input LOW Voltage VOH Output HIGH Voltage IOH = –0.4mA VOL Output LOW Voltage IOL = 4mA IIH Input HIGH Current VIN = 2.7V, VCC = max. VIN = VCC, VCC = max. –175 2.0 Typ Max Units VCC V 0.8 V 2.0 IIL Input LOW Current VIN = 0.5V, VCC = max. –300 IOS Output Short Circuit Current VOUT = 0V (maximum 1 sec) –15 V 0.5 V +100 µA µA µA –100 mA Notes: 1. Permanent device damage may occur if “Absolute Maximum Ratings” are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to “Absolute Maximum Ratings” conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Airflow of 500lfpm recommended for 28-pin SOIC. 4. 28-pin SOIC package is NOT recommended for new designs. 5. Using JEDEC standard test boards with die attach pad soldered to PCB. See www.amkor.com for additional package details. M9999-082107 [email protected] or (408) 955-1690 7 Micrel, Inc. SY87701AL AC ELECTRICAL CHARACTERISTICS VCC = VCCO = VCCA = 3.3V ±5%; TA = –40°C to +85°C; unless noted. Symbol Parameter Condition Min fVCO VCO Center Frequency fREFCLK × Byte Rate 625 ∆fVCO VCO Center Frequency Tolerance Nominal tACQ Acquisition Lock Time tCPWH REFCLK Pulse Width HIGH 3 ns tCPWL REFCLK Pulse Width LOW 3 ns tir REFCLK Input Rise Time tODC Output Duty Cycle (RCLK/TCLK) tr, tf ECL Output Rise/Fall Time (20% to 80%) tSKEW Recovered Clock Skew tDV Data Valid 1/(2 × fRCLK) – 200 ps tDH Data Hold 1/(2 × fRCLK) – 200 ps Max Units 1300 MHz 5 % 15 0.5 50Ω to VCC –2V tCPWL ns 45 55 % of UI 100 500 ps –200 +200 ps tCPWH REFCLK tODC tODC RCLK tSKEW tDV tDH RDOUT 8 µs 2 TIMING WAVEFORMS M9999-082107 [email protected] or (408) 955-1690 Typ Micrel, Inc. SY87701AL APPLICATION EXAMPLE AC-COUPLED I/O R21 130Ω VCC VEE LED D1 VCC VEE Q1 2N2222A R10 1k R9 R8 R7 R6 R5 R3 1k 1k 1k 1k 1k 1k R22 12.1kΩ IN0 VEE CD FREQSEL1 FREQSEL2 FREQSEL3 DIVSEL1 DIVSEL2 CLKSEL VCC DIVSEL1 Pin 30 SMA2 R24 130Ω Pin 27 Pin 12 C26 0.1µF Pin 13 VCCA CD DIVSEL2 VCC VCC VCCA LFIN DIVSEL1 2 RDINP RDOUTN 23 3 RDINN VCCO 22 4 FREQSEL1 RCLKP 21 R14 182Ω U1 SY87701AL REFCLK RCLKN 20 VCCO 19 6 FREQSEL2 7 FREQSEL3 TCLKP NC TCLKN 17 9 VCCA VCC J2 10 11 C6 6.8µF M9999-082107 [email protected] or (408) 955-1690 C1 1µF VCCO 12 13 14 15 R29 182Ω R28 182Ω 16 C30 6.8µF R12 182Ω C13 0.01µF C12 0.01µF GND J4 C9 0.01µF 9 C8 6.8µF C28 0.01µF SMA4 C27 0.01µF R2 680Ω C11 1µF VEE J6 C31 0.01µF R11 182Ω 18 VCCA VCCO J3 C7 0.01µF C14 0.01µF SMA5 R1 350Ω VCCA R13 182Ω C15 0.01µF SMA6 CLKSEL VCCA C1 6.8µF SMA8 24 R31 50Ω C25 0.1µF SMA9 RDOUTP 8 SMA3 Pin 11 VEE 25 NC 5 FREQSEL3 VEE C5 0.01µF FREQSEL1 VEE C24 0.1µF VEE SMA7 R23 130Ω FREQSEL2 Pin 22 26 CLKSEL C20 0.1µF 27 PLLRP Pin 19 28 1 PLLSP C22 0.1µF VCC 29 PLLRN VCCO 30 GND C18 0.01µF C21 0.1µF R26 82Ω 31 GND SMA1 C23 0.1µF R25 82Ω C19 0.01µF R32 182Ω DIVSEL2 32 VCCA VCC VEE VCCA SMA10 R30 182Ω VCCA GNDA DIP switch R15 182Ω /Q1 Q1 /Q Q0 R16 182Ω VCC PLLSN R27 1k U2 SY89322V GND IN1 IN0 VCC J5 C29 0.01µF Micrel, Inc. SY87701AL APPLICATION EXAMPLE DC-COUPLED I/O R21 130Ω VCC VEE LED D1 VCC VEE Q1 2N2222A R10 1k R9 R8 R7 R6 R5 R3 1k 1k 1k 1k 1k 1k R22 12.1kΩ FREQSEL1 FREQSEL2 FREQSEL3 DIVSEL1 DIVSEL2 CLKSEL R27 1k IN0 VCC DIVSEL1 VEE Pin 11 C25 0.1µF Pin 12 C26 0.1µF Pin 13 VCCA VCCA CD DIVSEL2 VCC VCC VCCA LFIN RDOUTN 23 RDINN VCCO 22 4 FREQSEL1 5 REFCLK 6 FREQSEL2 7 FREQSEL3 TCLKP 18 8 NC TCLKN 17 U1 SY87701AL RCLKP 21 RCLKN 20 VCCO 19 SMA7 SMA6 VCCO SMA5 9 VCCA VCC C1 6.8µF VCCA DIVSEL1 RDINP 3 10 R1 350Ω J2 C5 0.01µF 2 11 12 13 14 15 SMA4 16 CLKSEL VCCA C6 6.8µF M9999-082107 [email protected] or (408) 955-1690 C1 1µF VEE J6 C31 0.01µF R2 680Ω C11 1µF VCCA VCCO J3 C7 0.01µF VEE SMA8 24 R31 50Ω C24 0.1µF R32 182Ω SMA9 CLKSEL SMA3 25 RDOUTP PLLRP FREQSEL3 26 NC PLLRN Pin 22 FREQSEL2 Pin 27 27 1 PLLSP C22 0.1µF C20 0.1µF 28 GND FREQSEL1 VCC 29 GND SMA2 30 GNDA SMA1 Pin 30 31 PLLSN VCCA Pin 19 R30 182Ω VEE DIVSEL2 32 C21 0.1µF SMA10 /Q1 Q1 /Q Q0 VCCA DIP switch VCCO R15 182Ω R16 182Ω VCC VEE C23 0.1µF GND IN1 IN0 VCC VEE CD U2 SY89322V C30 6.8µF GND J4 C9 0.01µF 10 C8 6.8µF J5 C29 0.01µF Micrel, Inc. SY87701AL BILL OF MATERIALS (AC-COUPLED) Item Part Number Manufacturer Description Qty 293D685X0025B2T Vishay(1) 6.8µF, 25V, Tantalum Capacitor, Size B C7 VJ1206Y103JXJAT Vishay(1) 0.01µF, X7R, Ceramic Capacitor, Size 1206 1 C10, C11 VJ0603Y105JXJAT Vishay(1) 1.0µF, X7R, Ceramic Capacitor, Size 0603 2 C12, C13, C14, C15, C18, C19, C27, C28 VJ0402Y104JXJAT Vishay(1) 0.1µF, X7R, Ceramic Capacitor, Size 0402 8 C20, C21, C22, C23, C24, C25, C26 VJ0402Y104JXJAT Vishay(1) 0.01µF, X7R, Ceramic Capacitor, Size 0603 7 D1 P301-ND LED, T-1 3/4, Red Clear 1 T-1 3/4 Red LED 1 C6 Panasonic(2) Vishay(1) 1 D2 P300-ND/P301-ND J2, J3, J4, J6 111-0702-001 Johnson Components(3) Red, Insulated Thumb Nut Binding Post (Jumped together) 4 J5 111-0703-001 Johnson Components(3) Black, Insulated Thumb Nut Binding Post, GND (Jumped to VEE) 1 Q1 459-2598-5-ND 2N2222A Transistor 1 R1 CRCW04023500F Vishay(1) 350Ω Resistor, 2%, Size 0402 1 CRCW04026800F Vishay(1) 680Ω Resistor, 2%, Size 0402 1 R3, R4, R5, R6, R7, R8, R9, R10 CRCW04021001F Vishay(1) 1kΩ Pull-up Resistors, 2%, Size 1206 8 R11, R12, R13, R14, R15, R16, R28, R29, R30, R32 CRCW04021820F Vishay(1) 182Ω Resistor, 2%, Size 0402 10 R21 CRCW06031300F Vishay(1) 130Ω Resistor, 2%, Size 0603 1 R22 CRCW04021820F Vishay(1) 12.1kΩ Resistor, 2%, Size 1206 1 R23, R24 CRCW04022825F Vishay(1) 82Ω Resistor, 2%, Size 0402 2 CRCW04021300F Vishay(1) 130Ω Resistor, 2%, Size 0402 2 CRCW040200R0F Vishay(1) 0Ω Resistor, 2%, Size 0402 1 R31 CRCW04025000F Vishay(1) SMA1-SMA10 142-0701-851 R2 R25, 26 R27 Johnson Components(1) SP1-SP6 SW1 CT2068-ND 1 10 Solder Jumper Option 6 8-Position, Top Actuated Slide Dip Switch U1 SY87700/01 Micrel(4) U2 SY89322V Micrel(4) Notes: 1. Vishay: www.vishay.com. 2. Panasonic: www.panasonic.com. 3. Johnson Components: www.johnson-components.com. 4. Micrel, Inc. www.micrel.com. M9999-082107 [email protected] or (408) 955-1690 50Ω Resistor, 2%, Size 0402 End Launch SMA Jack 11 AnyRate® 3.3V 28Mbps to 1.3Gbps Clock and Data Recovery 3.3/5V Dual LVTTL/LVCMOS-to-Differential LVPECL Translator 1 1 1 Micrel, Inc. SY87701AL BILL OF MATERIALS (DC-COUPLED) Item Part Number C6 293D685X0025B2T Vishay(1) 6.8µF, 25V, Tantalum Capacitor, Size B 1 VJ1206Y103JXJAT Vishay(1) 0.01µF, X7R, Ceramic Capacitor, Size 1206 1 C7 Manufacturer Description Qty C10, C11 VJ0603Y105JXJAT Vishay(1) 1.0µF, X7R, Ceramic Capacitor, Size 0603 2 C12, C13, C14, C15, C18, C19, C27, C28 VJ0402Y104JXJAT Vishay(1) 0.1µF, X7R, Ceramic Capacitor, Size 0402 8 C20, C21, C22, C23, C24, C25, C26 VJ0402Y104JXJAT Vishay(1) 0.01µF, X7R, Ceramic Capacitor, Size 0603 7 D1 P301-ND D2 P300-ND/P301-ND J2, J3, J4, J6 111-0702-001 J5 111-0703-001 Q1 459-2598-5-ND Panasonic(2) LED, T-1 3/4, Red Clear 1 T-1 3/4 Red LED 1 Johnson Components(3) Red, Insulated Thumb Nut Binding Post (Jumped together) 4 Johnson Components(3) Black, Insulated Thumb Nut Binding Post, GND (Jumped to VEE) 1 Vishay(1) 2N2222A Transistor 1 R1 CRCW04023500F Vishay(1) 350Ω Resistor, 2%, Size 0402 1 R2 CRCW04026800F Vishay(1) 680Ω Resistor, 2%, Size 0402 1 R3, R4, R5, R6, R7, R8, R9, R10 CRCW04021001F Vishay(1) 1kΩ Pull-up Resistors, 2%, Size 1206 8 R15, R16, R30, R32 CRCW04021820F Vishay(1) 182Ω Resistor, 2%, Size 0402 4 R21 CRCW06031300F Vishay(1) 130Ω Resistor, 2%, Size 0603 1 R22 CRCW04021820F Vishay(1) 12.1kΩ Resistor, 2%, Size 1206 1 R27 CRCW040200R0F Vishay(1) 0Ω Resistor, 2%, Size 0402 1 R31 CRCW04025000F Vishay(1) 50Ω Resistor, 2%, Size 0402 1 SMA1-SMA10 142-0701-851 End Launch SMA Jack 10 Solder Jumper Option 6 Johnson Components(1) SP1-SP6 SW1 CT2068-ND 8-Position, Top Actuated Slide Dip Switch U1 SY87700/01 Micrel(4) U2 SY89322V Micrel(4) Notes: 1. Vishay: www.vishay.com. 2. Panasonic: www.panasonic.com. 3. Johnson Components: www.johnson-components.com. 4. Micrel, Inc. www.micrel.com. M9999-082107 [email protected] or (408) 955-1690 12 AnyRate® 3.3V 28Mbps to 1.3Gbps Clock and Data Recovery 3.3/5V Dual LVTTL/LVCMOS-to-Differential LVPECL Translator 1 1 1 Micrel, Inc. SY87701AL 28-PIN SOIC .300" WIDE (Z28-1) Rev. 02 Note: The 28-pin SOIC package is NOT recommended for new designs. M9999-082107 [email protected] or (408) 955-1690 13 Micrel, Inc. SY87701AL 32-PIN EPAD TQFP (DIE UP) (H32-1) Package EP- Exposed Pad Die CompSide Island Heat Dissipation Heat Dissipation VEE Heavy Copper Plane VEE Heavy Copper Plane PCB Thermal Consideration for 32-Pin EPAD-TQFP Package M9999-082107 [email protected] or (408) 955-1690 14 Micrel, Inc. SY87701AL APPENDIX A Layout and General Suggestions 1. 2. 3. 4. 5. 6. 7. 8. Establish controlled impedance stripline, microstrip, or co-planar construction techniques. Signal paths should have, approximately, the same width as the device pads. All differential paths are critical timing paths, where skew should be matched to within ±10ps. Signal trace impedance should not vary more than ±5%. If in doubt, perform TDR analysis of all high-speed signal traces. Maintain compact filter networks as close to filter pins as possible. Provide ground plane relief under filter path to reduce stray capacitance. Be careful of crosstalk coupling into the filter network. Maintain low jitter on the REFCLK input. Isolate the XTAL oscillator from power supply noise by adequately decoupling. Keep XTAL oscillator close to device, and minimize capacitive coupling from adjacent signals. Higher speed operation may require use of fundamental-tone (third-overtone typically have more jitter) crystal based oscillator for optimum performance. Evaluate and compare candidates by measuring TXCLK jitter. All unused outputs must be terminated. To conserve power, unused PECL outputs can be terminated with a 1kΩ resistor to VEE. MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB USA http://www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2006 Micrel, Incorporated. M9999-082107 [email protected] or (408) 955-1690 15