SN54ALS09, SN74ALS09 QUADRUPLE 2-INPUT POSITIVE-AND GATES WITH OPEN-COLLECTOR OUTPUTS SDAS084B – APRIL 1982 – REVISED DECEMBER 1994 SN54ALS09 . . . J PACKAGE SN74ALS09 . . . D OR N PACKAGE (TOP VIEW) Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs 1A 1B 1Y 2A 2B 2Y GND description These devices contain four independent 2-input positive-AND gates. They perform the Boolean functions Y = A • B or Y = A + B in positive logic. The open-collector outputs require pullup resistors to perform correctly. These outputs may be connected to other open-collector outputs to implement active-low wired-OR or active-high wired-AND functions. Open-collector devices are often used to generate higher VOH levels. OUTPUT Y H H H L X L X L L 1B 2A 2B 3A 3B 4A 4B 1 12 4 11 5 10 6 9 7 8 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 4A NC 4Y NC 3B NC – No internal connection logic symbol† 1A 3 VCC 4B 4A 4Y 3B 3A 3Y 2Y GND NC 3Y 3A B 13 1B 1A NC VCC 1Y NC 2A NC 2B FUNCTION TABLE (each gate) A 14 2 SN54ALS09 . . . FK PACKAGE (TOP VIEW) The SN54ALS09 is characterized for operation over the full military temperature range of – 55°C to 125°C. The SN74ALS09 is characterized for operation from 0°C to 70°C. INPUTS 1 4B • logic diagram (positive logic) & 3 2 4 6 5 1Y 2Y 8 3Y 2A 3A 3B 12 13 1B 2B 9 10 1A 11 4Y 4A 4B 1 2 3 1Y 4 5 6 2Y 9 10 8 3Y 12 13 11 4Y † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, J, and N packages. Copyright 1994, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54ALS09, SN74ALS09 QUADRUPLE 2-INPUT POSITIVE-AND GATES WITH OPEN-COLLECTOR OUTPUTS SDAS084B – APRIL 1982 – REVISED DECEMBER 1994 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Off-state output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Operating free-air temperature range, TA: SN54ALS09 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C SN74ALS09 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions SN54ALS09 SN74ALS09 MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL VOH Low-level input voltage 0.7 0.8 High-level output voltage 5.5 5.5 IOL TA Low-level output current 4 8 mA 70 °C High-level input voltage 2 Operating free-air temperature 2 – 55 125 V V 0 V V electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER SN54ALS09 TYP‡ MAX TEST CONDITIONS VIK VCC = 4.5 V, VOL 5V VCC = 4 4.5 II IIH VCC = 5.5 V, VCC = 5.5 V, IIL IOH VCC = 5.5 V, VCC = 4.5 V, ICCH ICCL VCC = 5.5 V, VCC = 5.5 V, MIN II = –18 mA IOL = 4 mA SN74ALS09 TYP‡ MAX MIN –1.5 0.25 IOL = 8 mA VI = 7 V VI = 2.7 V VI = 0.4 V VOH = 5.5 V VI = 4.5 V –1.5 0.4 0.25 0.4 0.35 0.5 V V 0.1 0.1 20 20 µA – 0.1 – 0.1 mA 0.1 VI = 0 UNIT mA 0.1 mA 1.35 2.4 1.35 2.4 mA 2.2 4 2.2 4 mA ‡ All typical values are at VCC = 5 V, TA = 25°C. switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 2 kΩ, TA = MIN to MAX§ SN54ALS09 tPLH tPHL A or B Y MIN MAX MIN MAX 20 69 23 54 5 23 5 15 § For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 UNIT SN74ALS09 ns SN54ALS09, SN74ALS09 QUADRUPLE 2-INPUT POSITIVE-AND GATES WITH OPEN-COLLECTOR OUTPUTS SDAS084B – APRIL 1982 – REVISED DECEMBER 1994 PARAMETER MEASUREMENT INFORMATION SERIES 54ALS/74ALS AND 54AS/74AS DEVICES 7V RL = R1 = R2 VCC S1 RL R1 Test Point From Output Under Test CL (see Note A) From Output Under Test RL Test Point From Output Under Test CL (see Note A) CL (see Note A) LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS 3.5 V Timing Input Test Point LOAD CIRCUIT FOR 3-STATE OUTPUTS 3.5 V High-Level Pulse 1.3 V R2 1.3 V 1.3 V 0.3 V 0.3 V tsu Data Input tw th 3.5 V 1.3 V 3.5 V Low-Level Pulse 1.3 V 0.3 V 1.3 V 0.3 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATIONS 3.5 V Output Control (low-level enabling) 1.3 V 1.3 V 0.3 V tPZL Waveform 1 S1 Closed (see Note B) tPLZ [3.5 V 1.3 V tPHZ tPZH Waveform 2 S1 Open (see Note B) 1.3 V VOL 0.3 V VOH 1.3 V 0.3 V [0 V 3.5 V 1.3 V Input 1.3 V 0.3 V tPHL tPLH VOH In-Phase Output 1.3 V 1.3 V VOL tPLH tPHL VOH Out-of-Phase Output (see Note C) 1.3 V 1.3 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. When measuring propagation delay items of 3-state outputs, switch S1 is open. D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%. E. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuits and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. 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