NPC SM8580

SM8580AM
Real-time Clock IC with 4-bit Interface
and Built-in Temperature Sensor
NIPPON PRECISION CIRCUITS INC.
OVERVIEW
The SM8580AM is a real-time clock IC based on a 32.768 kHz crystal oscillator, which features a 4-bit parallel interface for communication with an external microcontroller.
It comprises second-counter to year-counter clock and calendar circuits that feature automatic leap-year adjustment up to year 2099, alarm and timer interrupt functions, clock counter change detect functions, ±30-second
correction function, time error correction function, and built-in temperature sensor.
The 4-bit parallel interface is compatible with general-purpose SRAM over a high-speed bus.
FEATURES
■
■
■
■
■
■
■
■
■
■
■
■
High-speed bus 4-bit parallel interface
Date, day, hour, minute, and second-counter presettable alarm interrupt
1/4096 seconds to 255 minutes presettable interval
timer interrupt function
2 software-maskable alarm and timer interrupt
outputs
Clock counter change detect functions
4-digit western calendar display
Automatic leap year correction up to year 2099
±30-second adjust function
−195 to +192ppm time error correction range
Built-in temperature sensor (analog voltage output)
2.4 to 5.5V interface voltage range
1.6 to 5.5V clock voltage range
0.6µA/3V (typ) current consumption
(Top view)
CE0N
1
24
XT
FOUT
XTN
VTEMP
N.C.
AIRQN
TIRQN
A0
A1
A2
A3
N.C.
N.C.
CE1
D0
D1
D2
D3
RDN
ORDERING INFORMATION
D e vice
P ackag e
SM8580AM
24-pin SSOP
VDD
FCON
SM8580AM
■
PINOUT
VSS
12
13
WRN
NIPPON PRECISION CIRCUITS—1
SM8580AM
PACKAGE DIMENSIONS
(Unit: mm)
5.40 0.20
7.80 0.30
24-pin SSOP
+ 0.1 5
0.15 − 0.0
0.8
0.36 0.10
0.12 M
0.10
0.10 0.10
0.20
1.90 0.10
1.80
10.05 0.20
10.20 0.30
0 to 10
0.50 0.20
BLOCK DIAGRAM
Control line
CG
XT
CD OSC
Divider
XTN
Digital Trimming
Controller
Clock and Calendar
Counter
Alarm Register
AIRQN
TIRQN
FOUT
Interrupt
Control
Timer Register
FOUT
Control
FOUT Register
FCON
Control Register
A0 to A3
D0 to D3
WRN
BUS
Interface
RDN
Temperature
Sensor
CE0N
CE1
VDD
VSS
VTEMP
NIPPON PRECISION CIRCUITS—2
SM8580AM
PIN DESCRIPTION
Function 1
Number
Name
I/O
1
CE0N
I
Chip enable 0 input with built-in pull-up resistor.
The SM8580AM can be accessed when CE0N is LOW and CE1 is HIGH.
2
FCON
I
FOUT output frequency select control input (when CE1 is HIGH).
32.768kHz fixed frequency output when FCON is LOW .
Output frequency determined by bit FD when FCON is HIGH (when FE bit is 1).
Note that a HIGH-level voltage should be applied to FCON to avoid unwanted 32.768kHz output during
backup.
3
FOUT
O
Frequency set register, frequency output (CMOS output)
4
VTEMP
O
Te m p e rature voltage output (analog output)
5
AIRQN
O
Alarm interrupt output (N-channel open-drain output)
6
TIRQN
O
Timer interrupt output (N-channel open-drain output)
7
A0
I
8
A1
I
9
A2
I
10
A3
I
11
RDN
I
Read strobe input. Data can be read from S M 8 5 8 0 A M when RDN is LOW and WRN is HIGH.
An error will occur if both RDN and WRN are simultaneously LOW .
12
VSS
–
Ground
13
WRN
I
W r ite strobe input. Data can be written to S M 8 5 8 0 A M when RDN is HIGH and WRN is LOW .
An error will occur if both RDN and WRN are simultaneously LOW .
14
D3
I/O
15
D2
I/O
16
D1
I/O
17
D0
I/O
18
CE1
I
Chip enable 1 input with built-in pull-down resistor.
The SM8580AM can be accessed when CE0N is LOW and CE1 is HIGH.
FOUT is in output mode when CE1 is HIGH, regardless of the state of CE0N. FOUT is high impedance
when CE1 is LOW .
19
NC
–
No connection
20
NC
–
No connection
21
NC
–
No connection
22
XTN
O
Oscillator output, with built-in oscillator capacitance C D
23
XT
I
Oscillator output, with built-in oscillator capacitance C G
24
VDD
–
Supply
Address inputs.
Connect to the microcontroller address bus.
The selected register address is input on this bus when accessing the SM8580AM (positive logic).
Data bus input/outputs.
Connect to the microcontroller data bus.
1. Connect a 0.1µF capacitor between VDD and V S S .
NIPPON PRECISION CIRCUITS—3
SM8580AM
FOUT Output and SM8580AM Access Relationship
CE0N
CE1
FCON
FE bit
FOUT output
S M 8 5 8 0 A M accessible
HIGH
LOW
×
×
High impedance
No
LOW
LOW
×
×
High impedance
No
LOW
0
32.768kHz output
No
LOW
1
32.768kHz output
No
HIGH
0
High impedance
No
HIGH
1
FD bit select frequency output
No
LOW
0
32.768kHz output
Yes
LOW
1
32.768kHz output
Yes
HIGH
0
High impedance
Yes
HIGH
1
FD bit select frequency output
Yes
HIGH
HIGH
LOW
HIGH
SPECIFICATIONS
Absolute Maximum Ratings
VSS = 0 V
P arameter
Symbol
Supply voltage range
VDD
Input voltage range
V IN
Output voltage range
Storage temperature range
Condition
All inputs, D0 to D3
VOUT1
TIRQN, AIRQN
VOUT2
F O U T, D0 to D3, V T E M P
T stg
Rating
Unit
−0.3 to 7.0
V
V S S − 0.3 to V D D + 0.3
V
V S S − 0.3 to 8.0
V
V S S − 0.3 to V D D + 0.3
V
−55 to 125
°C
Rating
Unit
Recommended Operating Conditions
VSS = 0 V
P arameter
Symbol
Condition
Supply voltage range
VDD
2.4 to 5.5
V
Clock supply voltage range
VCLK
1.6 to 5.5
V
Operating temperature range
T opr
−40 to 85
°C
NIPPON PRECISION CIRCUITS—4
SM8580AM
DC Electrical Characteristics
VSS = 0V, VDD = 1.6 to 5.5V, Ta = −40 to 85°C unless otherwise noted
Rating
P arameter
Symbol
Condition
Current consumption 1
ID D 1
V D D = 5V
Current consumption 2
ID D 2
V D D = 3V
Current consumption 3
ID D 3
V D D = 5V
Current consumption 4
ID D 4
V D D = 3V
Current consumption 5
ID D 5
V D D = 5V
Current consumption 6
ID D 6
V D D = 3V
Current consumption 7
ID D 7
V D D = 5V
Current consumption 8
ID D 8
V D D = 3V
HIGH-level input voltage 1
V IH1
L O W -level input voltage 1
V IL1
V D D = 4.5 to 5.5V,
CE0N, FCON, RDN, WRN, A0 to A3, D0 to D3
HIGH-level input voltage 2
V IH2
L O W -level input voltage 2
V IL2
HIGH-level input voltage 3
V IH3
L O W -level input voltage 3
V IL3
Input leakage current
IL E A K
CE0N = V D D , CE1 = V S S ,
F C O N = R D N = WRN = A0 to A3 = V D D or V S S
Pull-up resistance 1
RUP1
V D D = 5V
RUP2
V D D = 3V
R DW N 1
V D D = 5V
Pull-down resistance 2
R DW N 2
V D D = 3V
Pull-down resistance 3
R DW N 3
V D D = 5V
R DW N 4
V D D = 3V
HIGH-level output voltage 1
VOH1
V D D = 5V
HIGH-level output voltage 2
VOH2
V D D = 3V
HIGH-level output voltage 3
VOH3
V D D = 3V
L O W -level output voltage 1
VOL1
V D D = 5V
L O W -level output voltage 2
VOL2
V D D = 3V
L O W -level output voltage 3
VOL3
V D D = 3V
L O W -level output voltage 4
VOL4
V D D = 5V
VOL5
V D D = 3V
Pull-up resistance 2
Pull-down resistance 1
Pull-down resistance 4
L O W -level output voltage 5
Output leakage current
IO Z
CE0N = RDN = W R N = V D D ,
A0 to A3 = D0 to D3 = V D D or V S S ,
CE1 = FCON = V S S ,
AIRQN = TIRQN = FOUT = V D D ,
VTEMP output OFF (TEMP bit = 0)
Ta = 25 °C ,
CE0N = RDN = W R N = V D D ,
A0 to A3 = D0 to D3 = V D D or V S S ,
CE1 = FCON = V S S ,
AIRQN = TIRQN = FOUT = V D D ,
VTEMP output ON (TEMP bit = 1)
CE0N = CE1 = RDN = W R N = V D D ,
A0 to A3 = D0 to D3 = V S S ,
FCON = V SS,
AIRQN = TIRQN = FOUT = VTEMP = Hi-Z,
VTEMP output OFF (TEMP bit = 0),
FOUT = 32kHz output, C L = 0pF
CE0N = CE1 = RDN = W R N = V D D ,
A0 to A3 = D0 to D3 = V S S ,
FCON = V SS,
AIRQN = TIRQN = FOUT = VTEMP = Hi-Z,
VTEMP output OFF (TEMP bit = 0),
FOUT = 32kHz output, C L = 30pF
V D D = 2.4 to 3.6V,
CE0N, FCON, RDN, WRN, A0 to A3, D0 to D3
V D D = 1.6 to 5.5V,
CE1
CE0N = V S S
CE1 = V D D
Unit
min
typ
max
–
1.0
2.0
µA
–
0.6
1.0
µA
–
50
75
µA
–
40
60
µA
–
3.0
7.5
µA
–
1.7
4.5
µA
–
8.0
20
µA
–
5.0
12
µA
2.2
–
V D D + 0.3
V
V S S − 0.3
–
0.8
V
0.8V D D
–
V D D + 0.3
V
V S S − 0.3
–
0.2V D D
V
0.8V D D
–
V D D + 0.3
V
V S S − 0.3
–
0.2V D D
V
−0.5
–
0.5
µA
75
150
300
kΩ
150
300
600
kΩ
20
40
80
MΩ
42.5
85
170
MΩ
30
60
120
kΩ
55
110
220
kΩ
4.5
–
5.0
V
2.0
–
3.0
V
2.9
–
3.0
V
0
–
0.5
V
0
–
0.8
V
0
–
0.1
V
0
–
0.25
V
0
–
0.4
V
−0.5
–
0.5
µA
CE1 = 0.5V
IO H = −1mA, D0 to D3, FOUT
IO H = −100µA, D0 to D3, FOUT
IO L = 1mA, D0 to D3, FOUT
IO L = 100µA, D0 to D3, FOUT
IO L = 1mA, AIRQN, T I R Q N
D0 to D3, AIRQN, T I R Q N , F O U T, V O U T = V D D or V S S
NIPPON PRECISION CIRCUITS—5
SM8580AM
Terminal Capacitance Characteristics
Ta = 25°C, f = 1MHz
Rating
P arameter
Symbol
Condition
Unit
min
typ
max
Address input capacitance
CADD
A0 to A3
–
–
8
pF
Data output capacitance
C D ATA
D0 to D3
–
–
15
pF
Oscillator Characteristics
Ta = 25°C, Seiko Epson C-002SH crystal (CI = 30kΩ, CL = 10pF) unless otherwise noted
Rating
P arameter
Symbol
Oscillator start time
tS TA
Oscillator stop voltage
V S TO
Condition
V D D = 1.6 V
Unit
min
typ
max
–
–
3.0
s
–
–
1.5
V
Frequency voltage characteristic
f/V
V D D = 1.6 to 5.5V
−2
–
+2
ppm/V
Frequency accuracy
εIC
V D D = 3.0V
−2 0
–
+20
ppm
Input capacitance
CG
V D D = 3.0V
–
15
–
pF
Output capacitance
CD
V D D = 3.0V
–
10
–
pF
AC Characteristics (1)
VSS = 0V, Ta = −40 to 85°C unless otherwise noted
Rating
P arameter
FOUT duty
Oscillator failure detection time
Symbol
Duty
tO S C
Condition
Unit
min
max
min
V D D = 5V ± 10%
40
–
60
%
V D D = 3V ± 10%
40
–
60
%
V D D = 5V ± 10%
10
–
–
ms
V D D = 3V ± 10%
10
–
–
ms
NIPPON PRECISION CIRCUITS—6
SM8580AM
AC Characteristics (2)
VDD = 2.4 to 3.6V, VSS = 0V, Ta = −40 to 85°C, inputs VI = 0.5VDD, outputs VO = 0.5VDD
output load capacitance CL = 100pF (tACC, tACS, tARD)
Rating
P arameter
Symbol
Unit
min
max
Read cycle time
tR C
150
–
ns
Address access time
tA C C
–
150
ns
CE access time
tA C S
–
150
ns
RD access time
tA R D
–
100
ns
CE output set time
tC L Z
5
–
ns
CE output floating
tC H Z
–
60
ns
RD output set time
tO L Z
5
–
ns
RD output floating
tO H Z
–
60
ns
Output hold time
tO H
10
–
ns
W r ite cycle time
tW C
150
–
ns
Chip select time
tC W
140
–
ns
Address valid to end-of-write
tA W
140
–
ns
Address setup time
tA S
0
–
ns
Address hold time
tW R
0
–
ns
W r ite pulsewidth
tW P
130
–
ns
Input data set time
tD W
80
–
ns
Input data hold time
tD H
0
–
ns
VDD = 4.5 to 5.5V, VSS = 0V, Ta = −40 to 85°C, inputs VI = 0.5VDD, outputs VO = 0.5VDD
output load capacitance CL = 100pF (tACC, tACS, tARD)
Rating
P arameter
Symbol
Unit
min
max
Read cycle time
tR C
85
–
ns
Address access time
tA C C
–
85
ns
CE access time
tA C S
–
85
ns
RD access time
tA R D
–
45
ns
CE output set time
tC L Z
3
–
ns
CE output floating
tC H Z
–
30
ns
RD output set time
tO L Z
3
–
ns
RD output floating
tO H Z
–
30
ns
Output hold time
tO H
5
–
ns
W r ite cycle time
tW C
85
–
ns
Chip select time
tC W
70
–
ns
Address valid to end-of-write
tA W
70
–
ns
Address setup time
tA S
0
–
ns
Address hold time
tW R
0
–
ns
W r ite pulsewidth
tW P
65
–
ns
Input data set time
tD W
35
–
ns
Input data hold time
tD H
0
–
ns
NIPPON PRECISION CIRCUITS—7
SM8580AM
Data read
t RC
A0 to A3
t ACC
t ACS
t OH
CE0N
t CLZ
t CHZ
t ACS
CE1
t CLZ
t CHZ
t ARD
RDN
t OLZ
t OHZ
D0 to D3
Data write
CE control
t WC
A0 to A3
t WR
t AW
t CW
CE0N
t AS
CE1
WRN
t DW
t DH
D0 to D3
WR control
t WC
A0 to A3
t WR
t AW
CE0N
t AS
CE1
t WP
WRN
t DW
t DH
D0 to D3
NIPPON PRECISION CIRCUITS—8
SM8580AM
Temperature Sensor
VSS = 0V, Ta = −40 to 85°C unless otherwise noted
Rating
P arameter
Symbol
Condition
Unit
min
max
min
Te m p e rature sensor output voltage
VOUT
Ta = 25°C , VSS reference output voltage,
V D D = 2.7 to 5.5V, V T E M P
–
1.470
–
V
Output accuracy
TA C R
Ta = 25°C
–
–
±5
°C
VSE
–40°C ≤ Ta ≤ 85°C , V D D = 2.7 to 5.5V
−7.3
−7.8
−8.3
m V / °C
Linearity2
∆N L
–40°C ≤ Ta ≤ 85°C , V D D = 2.7 to 5.5V
–
–
±2.0
%
Te m p e rature detection range
TO P R
∆NL ≤ ±2.0%, V D D = 2.7 to 5.5V
−40
–
85
°C
Te m p e rature
Output
sensitivity 1
resistance 3
RO
Ta = 25°C , V D D = 2.7 to 5.5V, V T E M P
–
1.0
3.0
kΩ
Output load capacitance
CL
V D D = 2.7 to 5.5V
–
–
100
pF
Output load resistance
RL
V D D = 2.7 to 5.5V
500
–
–
kΩ
–
–
200
µs
Response time
tR S P
V D D = 3.0V, R L = 500kΩ, C L = 100pF
1. Te m p e rature sensitivity V S E = (V(85°C) − V(−40°C) ) ÷ 125 [mV/°C]
2. Linearity ∆NL = a ÷ b × 100 [%], where
a = maximum deviation between the measured value and the approximated value of V T E M P, and
b = difference between the measured values at temperatures of −40 and 85°C
VTEMP(V)
a
V (−40 C)
a
b
Measured value
Approximate value
a
−40 C
0C
V (85 C)
85 C
Ta
3. Output resistance R O = ∆V 1 ÷ ∆I1 [Ω]
SM8580A
VTEMP 1MΩ
I1
OP AMP
V1
NIPPON PRECISION CIRCUITS—9
SM8580AM
Backup Transfer and Return
Rating
P arameter 1
Symbol
Supply voltage falling edge CE setup time
tC D
Supply voltage fall time
tF
Condition
Unit
min
max
min
0
–
–
µs
(V D D − V C L K ) ≤ 2.0V
2
–
–
µs/V
(V D D − V C L K ) > 2.0V
50
–
–
µs/V
Supply voltage rise time
tR
1
–
–
µs/V
Supply voltage rising edge CE hold time
tC U
0
–
–
µs
1. Before switching the supply, confirm that the chip enable CE1 is LOW and that S M 8 5 8 0 A M is deselected.
VDD
VCLK
tF
tCD
CE1
tR
tCU
VIL
VIL
Backup mode
NIPPON PRECISION CIRCUITS—10
SM8580AM
FUNCTIONAL DESCRIPTION
Register Tables
Bank 0 (clock, calendar registers)
A d dress
Register
Bank 2 (digital correction, timer registers)
Bit 3
Bit 2
Bit 1
Bit 0
A d dress
Register
Bit 3
Bit 2
Bit 1
Bit 0
8
4
2
1
0
DT3
DT2
DT1
DT0
FOS
40
20
10
1
Digital correction
registers
DT_ON
DT6
DT5
DT4
8
4
2
1
2
–
#
#
#
#
#
40
20
10
3
–
#
#
#
#
8
4
2
1
4
8
4
2
1
#
#
20
10
5
Timer counter set
registers
128
64
32
16
#
4
2
1
8
4
2
1
8
#
#
20
10
9
8
4
2
1
A
#
#
#
10
B
8
4
2
1
C
80
40
20
10
D
800
400
200
100
E
TEST
TEMP
2000
1000
Bank
SEL1
Bank
SEL0
S TO P
BUSY/
ADJ
0
Second registers
1
2
Minute registers
3
4
Hour registers
5
6
D a y of week
register
7
Date registers
Month registers
Year registers
F
Control register
■
Bank 1 (alarm, FOUT registers)
A d dress
Register
0
Bit 3
Bit 2
Bit 1
Bit 0
8
4
2
1
AE
40
20
10
8
4
2
1
AE
40
20
10
8
4
2
1
AE
*
20
10
AE
4
2
1
8
4
2
1
AE
*
20
10
Second registers
1
2
■
■
■
Minute registers
3
4
■
Hour registers
5
■
6
D a y of week
register
■
7
Date registers
8
■
9
–
*
*
*
*
A
–
*
*
*
*
B
CE1 control
*
*
C
FOUT divider set
register
#
FD2
FD1
FD0
■
D
FOUT frequency
set register
FE
#
FD4
FD3
■
E
Alarm control
TEST
TEMP
AF
AIE
F
Control register
Bank
SEL1
Bank
SEL0
S TO P
BUSY/
ADJ
C T E M P CDT_ON
8
4
2
1
7
Timer counter
output registers
128
64
32
16
8
Timer setting
TE
TI/TP
TD1
TD0
9
–
#
#
#
#
A
–
#
#
#
#
B
–
*
*
*
*
C
–
*
*
*
*
D
–
*
*
*
*
E
Timer control
TEST
TEMP
TF
TIE
F
Control register
Bank
SEL1
Bank
SEL0
S TO P
BUSY/
ADJ
6
All bits in register F and bits 2 to 3 in register E
are common to all register banks.
When alarm interrupts are not used, registers 0 to
8 in bank 1 can be used as RAM (total 36 bits).
When timer interrupts are not used, registers 4 to 5
in bank 2 can be used as RAM (total 8 bits).
When digital correction is not used, registers 0 to
1 in bank 2 can be used as RAM, excluding bit 3
(DT_ON) in register 1 (total 7 bits).
The BUSY/ADJ bit function is BUSY when reading, and ADJ when writing.
The BUSY flag is set to 1 an interval of 244µs
before clock counter update timing.
Registers 6 and 7 in bank 2 are read-only registers,
and cannot be written to.
When power is applied, all register bits are undefined, with the exception of bits FOS, TEST and
TEMP. Accordingly, these bits need to be initialized. TEST and TEMP are automatically reset to 0
and FOS is automatically reset to 1 when power is
applied.
Bits marked # are all read-only bits fixed to 0.
These bits cannot be written to.
Bits marked * can be used as RAM bits.
NIPPON PRECISION CIRCUITS—11
SM8580AM
Control Registers (All Banks, Register E (bits 2, 3) and F)
Bank
A d dress
Bit 3
Bit 2
E
TEST
TEMP
F
Bank SEL1
Bank SEL0
Bit 1
Bit 0
S TO P
BUSY/ADJ
0, 1, 2
■
■
■
■
TEST bit
Factory test bit.
This bit should be set to 0. Take care when writing
to other E register bits not to accidentally write 1
to the TEST bit. Automatically resets to 0 when
power (VDD) is applied.
TEMP bit
When set to 1, it enables the temperature sensor
voltage output on pin VTEMP. When set to 0,
VTEMP is high impedance. Automatically resets
to 0 when power is applied.
Bank SEL bits
Bank select bits for read/write operations.
Bank SEL1
Bank SEL0
Accessed bank
0
0
Bank 0
0
1
Bank 1
1
0
Bank 2
1
1
Bank 1
STOP bit
When set to 1, the clock 32Hz frequency divider
counter stops and is reset. When set to 0, the clock
restarts.
■
BUSY/ADJ bit
This bit functions as a BUSY function in read
mode, and as an ADJ function in write mode.
• ADJ function (±30 seconds adjust bit)
Second registers are reset to 00 and minute registers not incremented when the clock counter is
reset and the second registers are currently 00 to
29.
Second registers are reset to 00 and minute registers are incremented when the clock counter is
reset and the second registers are currently 30 to
59.
The ADJ bit is automatically reset to 0 a maximum of 244µs after it is set to 1, and thus the
register should not be written to during this
244µs interval.
• BUSY function (second registers increment or
±30 seconds adjust busy indicator bit)
When BUSY is 1, the counters are being
updated (incremented or reset). To read or write
to clock and calendar registers, the BUSY flag
has to be 0. If reading data when BUSY is set to
1, there is a possibility that incorrect (intermediate) data will be output.
BUSY is set to 1 under the following two circumstances.
Normal seconds digit carry
244µs
Carry complete
±30 seconds digit adjust (when ADJ is set to 1)
max 244µs
Setting ADJ bit to "1"
Adjust function
complete
NIPPON PRECISION CIRCUITS—12
SM8580AM
■
Function operation table
Bit
S TO P
Function
ADJ
Clock
Timer
Alarm
FOUT
Operating
Operating 6
0
0
Operating
Operating 3
0
1
Adjust 1
Operating 4
Operating
Operating 7
1
0
Stopped
Operating/stopped 5
Stopped
Operating/stopped 8
1
1
Stopped/adjust 2
Operating/stopped 5
Stopped
Operating/stopped 8
1. ±30 seconds adjust function
2. The clock stops, and the ±30 seconds adjust function operates.
3. If the timer source clock frequency is ≤ 1Hz, the timer cycle changes when the digital correction function is used.
If the timer source clock frequency is ≥ 64Hz, the timer cycle is not affected when the digital correction function is used.
4. If the timer source clock frequency is ≤ 1Hz, the timer cycle changes.
If the timer source clock frequency is ≥ 64Hz, the timer cycle does not change.
5. If the timer source clock frequency is ≤ 1Hz, the timer is stopped.
If the timer source clock frequency is ≥ 64Hz, the timer operates.
6. If the FOUT source clock frequency is ≤ 1Hz, the cycle changes when the digital correction function is used.
If the FOUT source clock frequency is ≥ 32Hz, the cycle is not affected when the digital correction function is used.
7. If the FOUT source clock frequency is ≤ 1Hz, the cycle changes.
If the FOUT source clock frequency is ≥ 32Hz, the cycle does not change.
8. If the FOUT source clock frequency is ≤ 1Hz, the timer is stopped.
If the FOUT source clock frequency is ≥ 32Hz, the timer operates.
NIPPON PRECISION CIRCUITS—13
SM8580AM
Clock and Calendar Registers (Bank 0, Registers 0 to E)
Clock counters (registers 0 to 5)
Bank
A d dress
Register
Bit 3
Bit 2
Bit 1
Bit 0
8
4
2
1
FOS
40
20
10
8
4
2
1
40
20
10
4
2
1
20
10
0
Second registers
1
2
0
Minute registers
3
4
8
Hour registers
5
■
Data in these registers is interpreted in BCD format. For example, if the seconds registers 1 and 0
contain 0101 1001, then the contents are interpreted as the value 59 seconds.
■
Hour register contents are values expressed in 24hour mode.
FOS (oscillator failed detect bit (register 1, bit 3) )
■
The FOS bit is the oscillator failure flag. It indicates that the oscillator has stopped due to supply
voltage reduction during operation. It is set to 1
when the oscillator stops, and remains 1 until reset
by writing 0 to FOS. It is not affected by the function of other bits. A 1 is written to FOS when
power is applied.
Day-of-week counter (register 6)
■
Bank
A d dress
Register
0
6
D a y of week register
Bit 3
The day-of-week register contains values representing the day of the week as shown in the following table.
Bit 2
Bit 1
Bit 0
4
2
1
Bit 2
Bit 1
Bit 0
W e e k d ay
0
0
0
S u n d ay
0
0
1
M o n d ay
0
1
0
Tuesday
0
1
1
W ednesday
1
0
0
Thursday
1
0
1
Friday
1
1
0
Saturday
Calendar registers (registers 7 to E)
Bank
A d dress
Register
7
Bit 3
Bit 2
Bit 1
Bit 0
8
4
2
1
20
10
2
1
Date registers
8
9
8
4
Month registers
A
10
0
B
8
4
2
1
80
40
20
10
D
800
400
200
100
E
TEST
TEMP
2000
1000
C
Year registers
■
Registers B to E are 4 digits forming the western
calendar year.
■
Leap-year adjustment is automatic for years 1901
to 2099.
NIPPON PRECISION CIRCUITS—14
SM8580AM
Alarm Registers (Bank 1, Registers 0 to 8, E)
Alarm control register (register E)
■
Bank
A d dress
Register
1
E
Alarm control
AF bit (alarm flag)
The AF bit is set to 1 when an alarm event is
occurred, when the settings in the alarm set registers (bank 1, registers 0 to 8) match the settings in
the day, clock and calendar registers (bank 0, registers 0 to 8). The AF bit remains 1 until reset by
writing 0 to AF. A logic 1 cannot be written to AF.
Bit 3
■
Bit 2
Bit 1
Bit 0
AF
AIE
AIE bit (alarm interrupt enable)
This bit enables the output on AIRQN when an
alarm interrupt is occurred. If the AIE is not set to
1, then no output occurs even if the AF bit is set to
1. The AIRQN output is high impedance when
AIE is set to 0.
Alarm set registers (registers 0 to 8)
Bank
A d dress
Register
Bit 3
Bit 2
Bit 1
Bit 0
8
4
2
1
AE
40
20
10
8
4
2
1
AE
40
20
10
8
4
2
1
AE
*
20
10
AE
4
2
1
8
4
2
1
AE
*
20
10
0
Second registers
1
2
Minute registers
3
1
4
Hour registers
5
6
D a y of week register
7
Date registers
8
■
■
■
These registers set the alarm time and date.
When the corresponding bank 0 registers match
these bank 1 registers, an alarm event occurs and
AIRQN goes LOW if AIE is set to 1.
An alarm can be set for date, day-of-week, hour,
minute, and second. Each of these have a corresponding AE (alarm enable) bit which allows easy
combination to create alarm events every second,
every minute, hourly, daily, and weekly alarms.
■
■
Note that alarms cannot be set for multiple days
within the same week (such as an alarm on Mondays and Fridays only).
When an AE bit is set to 0, the relevant register
and corresponding bank 0 register are compared.
When an AE bit is set to 1, the data is disregarded
and all bits considered as “don’t care” bits.
Day-of-week alarm bits (register 6)
■
The day-of-week register contains values representing the day of the week as shown in the following table.
Bit 2
Bit 1
Bit 0
W e e k d ay
0
0
0
S u n d ay
0
0
1
M o n d ay
0
1
0
Tuesday
0
1
1
W ednesday
1
0
0
Thursday
1
0
1
Friday
1
1
0
Saturday
NIPPON PRECISION CIRCUITS—15
SM8580AM
Timer Registers (Bank 2, Registers 4 to 8, E)
Timer control registers (registers 8, E)
Bank
A d dress
Register
Bit 3
Bit 2
8
Timer setting
TE
TI/TP
E
Timer control
Bit 1
Bit 0
TF
TIE
2
■
■
■
■
TE bit (timer enable)
Timer countdown stop/start control bit.
When set to 1, the timer starts counting down.
When set to 0 during countdown, the timer stops.
TF bit (timer flag)
The timer flag is set to 1 when the timer counter
counts down to zero, occurring a timer event. It is
held at 1 until 0 is written to this bit. A 1 cannot be
written to TF.
TIE bit (timer interrupt enable)
This bit enables the timer interrupt output on
TIRQN when a timer event is occurred. If the TIE
is not set to 1, then no output occurs even if the TF
bit is set to 1. The TIRQN output is high impedance when TIE is set to 0.
TI/TP bit (level/periodic interrupt mode select bit)
Sets the timer interrupt signal output mode.
The SM8580AM supports two timer function
modes.
• TI/TP = 0 (level interrupt mode)
When a timer interrupt is occurred, TIRQN
goes LOW (if TIE = 1) and TF is set to 1.
TIRQN remains LOW and TF is held at 1 until
a 0 is written to the TF bit.
The timer operates by counting down until the
data is zero, then the TE bit is cleared and the
count stops automatically. However, if the timer
is started when the TF bit is 1, then the TE bit is
not cleared. The timer count register contents
remain zero after the count down stops.
• TI/TP = 1 (periodic interrupt mode)
When a timer interrupt is occurred, TIRQN
goes LOW (if TIE = 1) and TF is set to 1.
TIRQN subsequently goes high impedance
after a fixed interval, but TF is held at 1 until a 0
is written to the TF bit.
The timer operates by counting down until the
data is zero, then the timer register data is
reloaded automatically after a fixed interval,
and the countdown restarts. This mode can be
used as a repetitive interval timer.
Timer source clock set register (register 8)
■
Bank
A d dress
Register
2
8
Timer setting
The register 8 bits 0 and 1 set the timer source
clock to one of four frequencies listed in the following table.
Bit 3
Bit 2
Bit 1
Bit 0
TD1
TD0
TD1
TD0
Timer source clock
0
0
4096Hz
0
1
64Hz
1
0
1Hz
1
1
1/60Hz (1 minute)
NIPPON PRECISION CIRCUITS—16
SM8580AM
Timer counter set registers (registers 4 to 7)
Bank
A d dress
Register
4
Bit 3
Bit 2
Bit 1
Bit 0
8
4
2
1
128
64
32
16
8
4
2
1
128
64
32
16
Timer counter set registers
5
2
6
Timer counter output registers
7
■
■
■
■
Registers 4 and 5 set an 8-bit presettable binary
down-counter value for the timer interrupt function.
The value of the count can be determined by reading the values of registers 6 and 7 during the
count.
The presettable binary down-counter is updated
when the data is written to registers 4 and 5.
The data written to registers 4 and 5 are stored and
are not changed until replacement data is written.
■
■
This allows these bits to function as RAM bits if the
timer interrupt mode is not used (when TIE = 0).
When TE is set to 1, periodic interrupts are not
output on TIRQN, even if registers 4 and 5 are set
to zero.
The timer error once a timer operation is started is
a maximum of one cycle of the source clock.
Timer operations started and stopped in less than
one cycle of the source clock are not counted.
Timer interrupt function example
Example of an hourly periodic timer interrupt
Bank
A d dress
Register
4
Bit 3
Bit 2
Bit 1
Bit 0
1
1
0
0
0
0
1
1
Timer counter set registers
5
2
8
Timer set register
TE
1
1
1
E
Timer control
TEST
TEMP
TF
1
The timer start timing is set up in write mode when
the WRN rising edge corresponding to the TE bit
occurs, as shown in the following timing diagram.
Address 8
WRN pin
D3 pin
TE
Timer
TIRQN pin
Count down start
Finish
NIPPON PRECISION CIRCUITS—17
SM8580AM
CE1 Control Register (Bank 1, Register B)
■
■
■
Bank
A d dress
Register
Bit 3
Bit 2
1
B
CE1 control
CTEMP
CDT_ON
This register determines whether the temperature
sensor function and digital correction function in
combination with the CE1 input pin. CTEMP
determines the temperature sensor operation, and
CDT_ON determines the digital correction function operation.
CTEMP bit
When CTEMP is set to 0, the temperature sensor
operates only when the CE1 pin is HIGH.
When CTEMP is set to 1, the temperature sensor
operates without any relationship to the CE1 input
state.
Note that the temperature sensor operation also
depends on the bank 2 TEMP bit to be active.
CDT_ON bit
When CDT_ON is set to 0, the digital correction
function operates only when the CE1 pin is HIGH.
When CDT_ON is set to 1, the digital correction
function operates without any relationship to the
CE1 input state.
Note that the digital correction function also
depends on the bank 2 DT_ON bit to be active.
■
Bit 1
Bit 0
Function operation tables
CE1 pin
CTEMP bit
TEMP bit
Temperature
sensor
×
×
0
Not operating
LOW
0
1
Not operating
HIGH
0
1
Operating
LOW
1
1
Operating
HIGH
1
1
Operating
CE1 pin
CDT_ON bit
DT_ON bit
Digital
correction
×
×
0
Not operating
LOW
0
1
Not operating
HIGH
0
1
Operating
LOW
1
1
Operating
HIGH
1
1
Operating
Frequency Set Registers (Bank 1, Registers C, D)
Bank
A d dress
Register
C
FOUT divider set register
D
FOUT frequency set register
Bit 3
Bit 2
Bit 1
Bit 0
FD2
FD1
FD0
FD4
FD3
1
■
■
FE
FD3, FD4 bit
FOUT source clock frequency set bits.
FD4
FD3
S o u rce clock
0
0
32768Hz
0
1
1024Hz
1
0
32Hz
1
1
1Hz
■
FD0 to FD2 bits
Frequency divider set bits for the FOUT source
clock set by FD3 and FD4.
FD2
FD1
FD0
F r e q u e n cy divider
ratio
FOUT output duty
0
0
0
1/1
1/2
0
0
1
1/2
1/2
0
1
0
1/3
1/3
0
1
1
1/6
1/2
FD2
FD1
FD0
F r e q u e n cy divider
ratio
FOUT output duty
1
0
0
1/5
1/5
1
0
1
1/10
1/2
1
1
0
1/15
1/3
1
1
1
1/30
1/2
FE bit
FOUT frequency signal set by FD0 to FD4 output
enable bit.
When FCON is HIGH and FE is set to 1, then the
frequency signal set by FD0 to FD4 is output on
FOUT. When FE is set to 0, the FOUT output is
high impedance.
When FCON is LOW, a standard 32.768kHz signal is output on FOUT without reference to the
settings in the C and D registers.
NIPPON PRECISION CIRCUITS—18
SM8580AM
Digital Correction Registers (Bank 2, Registers 0, 1)
Bank
A d dress
Register
0
2
■
■
These registers enable and set the level of digital
correction applied to oscillator clock. DT_ON
enables the correction function, and bits DT0 to
DT6 set the level of correction to be applied. This
function adjusts the number of 1 second cycles
which occur every 10 seconds.
When digital correction is not used, a 0 should be
written to DT_ON to disable correction.
Correction range and resolution (correction range
depends on the frequency)
Correction range
Correction resolution Correction cycle
−195.20 to +192.15ppm
■
Bit 2
Bit 1
Bit 0
DT3
DT2
DT1
DT0
DT_ON
DT6
DT5
DT4
Digital correction registers
1
■
Bit 3
3.05ppm
■
Correction value calculation
• Positive correction (leading time)
[DT6:0] = correction ÷ 3.05 (with decimal
round-off)
Example: for correction of 192.15ppm
[DT6:0] = 192.15 ÷ 3.05 = 6310 = 01111112
• Negative correction (lagging time)
[DT6:0] = 128 + correction ÷ 3.05 (with decimal round-off)
Example: for correction of −158.6ppm
[DT6:0] = 128 + (−158.6 ÷ 3.05) = 7610 =
10011002
10 seconds
DT bits and digital correction (correction value
depends on the frequency)
Digital correction bits
DT6
DT5
DT4
DT3
DT2
DT1
DT0
Correction
(ppm)
0
1
1
1
1
1
1
+192.15
0
1
1
1
1
1
0
+189.10
↓
↓
0
0
0
0
0
1
0
+6.10
0
0
0
0
0
0
1
+3.05
0
0
0
0
0
0
0
±0.00
1
1
1
1
1
1
1
−3.05
1
1
1
1
1
1
0
−6.10
↓
↓
1
0
0
0
0
0
1
−192.15
1
0
0
0
0
0
0
−195.20
NIPPON PRECISION CIRCUITS—19
SM8580AM
INTERRUPT OPERATION
Alarm Interrupt
When AIE is 1 and an alarm event occurs (AF bit is set to 1), AIRQN output goes LOW. If AIE is 0, however,
AIRQN is in a high-impedance state. The alarm interrupt is output when a carry from the seconds register to
the minute register occurs.
"1"
"1"
"1"
AIE bit
"0"
"0"
*No output while AIE bit is "0".
Hi-Z
AIRQN pin
"L" level
"1"
AF bit
"0"
Interrupt is active.
Setting AF bit to "0".
Timer Interrupt
The timer interrupt mode (level interrupt or periodic interrupt) is selected by the setting of TI/TP.
Level interrupt mode (TI/TP = 0)
When TIE is 1 and a timer interrupt event occurs (TF bit is set to 1), TIRQN goes LOW. When TIE is 0, however, TIRQN is in a high-impedance state.
"1"
"1"
"1"
TIE bit
"0"
"0"
*No output while TIE bit is "0".
Hi-Z
TIRQN pin
"L" level
"1"
TF bit
"0"
Interrupt is active.
Setting TF bit to "0".
NIPPON PRECISION CIRCUITS—20
SM8580AM
Periodic interrupt mode (TI/TP = 1)
When TIE is 1 and a timer interrupt event occurs (TF bit is set to 1), TIRQN goes LOW. If TIE is 0, however,
TIRQN is in a high-impedance state, and the TF bit remains set to 1.
"1"
TIE bit
"0"
tRTN
Hi-Z
TIRQN pin
"L" level
Auto-return
"1"
TF bit
"0"
Interrupt is active.
Setting TF bit to "0".
The auto-return time (tRTN), shown in the following figure and table, is determined by the source clock frequency set by register D in bank 1 bits FD3 and FD4.
Source CLK
Hi-Z
TIRQN pin
Auto return time (tRTN)
"0"
Interrupt cycle
S o u rce clock
A uto-return time (t R T N )
4096Hz
0.122ms
64Hz
7.81ms
1Hz
7.81ms
1/60Hz
7.81ms
NIPPON PRECISION CIRCUITS—21
SM8580AM
APPLICATION NOTES
Setting the Alarm
Alarms can be set for day, weekday, hour, minute,
and second. However, it is not possible to set an
alarm for more than one weekday.
Note that it is recommended that AF and AIE be set
to 0 at the same time to avoid accidental hardware
interrupts while setting the alarm. After the alarm
data is entered, initialization occurs when AF is
again set to 0.
If the interrupt output is not used by setting AIE set
to 0, an alarm can still be controlled by software
monitoring of the AF bit.
Example 1
To set an alarm for 6pm of the following day:
• Set bits AIE and AF to 0.
• Set the day register AE bit to 1.
• Acquire the current weekday setting from bank
0 register 6, add 1 to the current value (except in
•
•
•
•
•
the case of Saturday), and write the updated
data. Note that the day following 6H (Saturday)
is 0H (Sunday).
Write 18H to the hour alarm register.
Write 00H to the minute alarm register.
Write 00H to the seconds alarm register.
Set bit AF to 0.
Set bit AIE to 1.
Example 2
To set an alarm for 6am on every for Sunday:
•
•
•
•
•
•
•
•
Set bits AIE and AF to 0.
Set the day alarm register AE bit to 1.
Write 0H to the weekday alarm register.
Write 06H to the hour alarm register.
Write 00H to the minute alarm register.
Write 00H to the seconds alarm register.
Set bit AF to 0.
Set bit AIE to 1.
Using the Temperature Sensor
The SM8580AM temperature sensor can be used to
monitor the surrounding temperature. The temperature sensor information can then be used to adjust the
clock for any temperature variations in the oscillator
frequency which affect the accuracy of the clock.
One method of utilizing the temperature sensor to
adjust timing errors is by using the clock error correction function (digital correction), as described
below.
2. Use an A/D converter, such as in a general-purpose CPU, to convert the VTEMP temperature
sensor output voltage into a digital value.
3. Use the digital value of the current temperature
to access the temperature correction data stored
in the EEPROM, and then write the corresponding data into the digital correction registers.
This procedure is useful in implementing a highaccuracy clock function.
1. Based on the known temperature characteristics
of the oscillator crystal, store temperature correction values for various temperatures in an
external non-volatile EEPROM.
Monitoring Digital Correction
Using the test mode allows the 64Hz digital correction clock to be output on pin FOUT. The test mode
works as follows.
1.
2.
3.
4.
Apply a HIGH-level on FCON.
Set the FOUT frequency set register FE bit to 1.
Set the CE1 control register CDT_ON bit to 1.
Set correction data in the digital correction register DT0 to DT6 bits, and then set DT_ON to 1.
5. Set the bank 2 register C, bit 1 to 1.
6. When CE0N is LOW and CE1 is HIGH and the
test mode set register TEST bit is set to 1, the
digital correction cycle changes from 10 seconds
to 1/64 seconds, and the clock output on FOUT
is the 64Hz clock after timing correction. The
output is the corrected timing for the set digital
correction value corresponding to a 64Hz clock
× 64[ppm]. Measuring this output provides a
quick method for monitoring the digital correction function.
7. When CE0N goes HIGH, the TEST bit is reset to
1 and test mode is released.
NIPPON PRECISION CIRCUITS—22
SM8580AM
NIPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to
improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility fo r
the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits
are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision
Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification.
The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or
malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter,
including compliance with expor t controls on the distribution or dissemination of the products. Customers shall not expor t, directly or
indirectly, any products without first obtaining required licenses and approvals from appropriate government agencies.
NIPPON PRECISION CIRCUITS INC.
NIPPON PRECISION CIRCUITS INC.
4-3, Fukuzumi 2-chome
Koto-ku, Tokyo 135-8430, Japan
Telephone: 03-3642-6661
Facsimile: 03-3642-6698
NC9915AE
2000.05
NIPPON PRECISION CIRCUITS—23