TISP3070H3SL THRU TISP3095H3SL, TISP3125H3SL THRU TISP3210H3SL TISP3250H3SL THRU TISP3350H3SL DUAL BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS Copyright © 1999, Power Innovations Limited, UK JANUARY 1999 - REVISED MAY 1999 TELECOMMUNICATION SYSTEM 2x100 A 10/1000 OVERVOLTAGE PROTECTORS ● Ion-Implanted Breakdown Region - Precise DC and Dynamic Voltages VDRM V(BO) V V ‘3070 58 70 ‘3080 65 80 ‘3095 75 95 ‘3125 100 125 ‘3135 110 135 ‘3145 120 145 ‘3180 145 180 ‘3210 160 210 ‘3250 190 250 ‘3290 220 290 ‘3350 275 350 DEVICE ● SL PACKAGE (TOP VIEW) 2 R 3 T 2/10 µs GR-1089-CORE 8/20 µs IEC 61000-4-5 300 10/160 µs FCC Part 68 250 R SD3XAA G Terminals T, R and G correspond to the alternative line designators of A, B and C ITSP STANDARD FCC Part 68 G device symbol WAVE SHAPE ITU-T K20/21 1 MDXXAG Rated for International Surge Wave Shapes - Guaranteed -40 °C to +85 °C Performance 10/700 µs T A 500 ● 3-Pin Through-Hole Packaging - Compatible with TO-220AB pin-out - Low Height. . . . . . . . . . . . . . . . . . . . .8.3 mm ● Low Differential Capacitance - Value at -2 V/-50 V Bias. . . . . . . .67 pF max. 200 10/560 µs FCC Part 68 160 10/1000 µs GR-1089-CORE 100 description The TISP3xxxH3SL limits overvoltages between the telephone line Ring and Tip conductors and Ground. Overvoltages are normally caused by a.c. power system or lightning flash disturbances which are induced or conducted on to the telephone line. The protector consists of two symmetrical voltage-triggered bidirectional thyristors. Overvoltages are initially clipped by breakdown clamping until the voltage rises to the breakover level, which causes the device to crowbar into a low-voltage on state. This low-voltage on state causes the current resulting from the overvoltage to be safely diverted through the device. The high crowbar holding current prevents d.c. latchup as the diverted current subsides. This TISP3xxxH3SL range consists of eleven voltage variants to meet various maximum system voltage levels (58 V to 275 V). They are guaranteed to voltage limit and withstand the listed international lightning surges in both polarities. These high current protection devices are in a 3-pin single-in-line (SL) plastic package and are supplied in tube pack. For alternative impulse rating, voltage and holding current values in SL packaged protectors, consult the factory. For lower rated impulse currents in the SL package, the 35 A 10/1000 TISP3xxxF3SL series is available. These monolithic protection devices are fabricated in ion-implanted planar structures to ensure precise and matched breakover control and are virtually transparent to the system in normal operation. PRODUCT INFORMATION Information is current as of publication date. Products conform to specifications in accordance with the terms of Power Innovations standard warranty. Production processing does not necessarily include testing of all parameters. 1 TISP3070H3SL THRU TISP3095H3SL, TISP3125H3SL THRU TISP3210H3SL TISP3250H3SL THRU TISP3350H3SL DUAL BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS JANUARY 1999 - REVISED MAY 1999 absolute maximum ratings, TA = 25°C (unless otherwise noted) RATING SYMBOL ± 58 ‘3080 ± 65 ‘3095 ± 75 ‘3125 ±100 ‘3135 Repetitive peak off-state voltage, (see Note 1) VALUE ‘3070 ‘3145 UNIT ±110 VDRM ±120 ‘3180 ±145 ‘3210 ±160 ‘3250 ±190 ‘3290 ±220 ‘3350 ±275 V Non-repetitive peak on-state pulse current (see Notes 2, 3 and 4) 2/10 µs (GR-1089-CORE, 2/10 µs voltage wave shape) 500 8/20 µs (IEC 61000-4-5, 1.2/50 µs voltage, 8/20 current combination wave generator) 300 10/160 µs (FCC Part 68, 10/160 µs voltage wave shape) 250 5/200 µs (VDE 0433, 10/700 µs voltage wave shape) 0.2/310 µs (I3124, 0.5/700 µs voltage wave shape) 220 ITSP 5/310 µs (ITU-T K20/21, 10/700 µs voltage wave shape) 200 A 200 5/310 µs (FTZ R12, 10/700 µs voltage wave shape) 200 5/320 µs (FCC Part 68, 9/720 µs voltage wave shape) 200 10/560 µs (FCC Part 68, 10/560 µs voltage wave shape) 160 10/1000 µs (GR-1089-CORE, 10/1000 µs voltage wave shape) 100 Non-repetitive peak on-state current (see Notes 2, 3 and 5) 20 ms (50 Hz) full sine wave 55 16.7 ms (60 Hz) full sine wave ITSM 1000 s 50 Hz/60 Hz a.c. Initial rate of rise of on-state current, 60 A 1 Exponential current ramp, Maximum ramp value < 200 A Junction temperature Storage temperature range diT/dt 400 A/µs TJ -40 to +150 °C Tstg -65 to +150 °C NOTES: 1. See Figure 9 for voltage values at lower temperatures. 2. Initially the TISP3xxxH3SL must be in thermal equilibrium. 3. These non-repetitive rated currents are peak values of either polarirty. The rated current values may be applied to the R or T terminals. Additionally, both R and T terminals may have their rated current values applied simultaneously (in this case the G terminal return current will be the sum of the currents applied to the R and T terminals). The surge may be repeated after the TISP3xxxH3SL returns to its initial conditions. 4. See Figure 10 for impulse current ratings at other temperatures. Above 85 °C, derate linearly to zero at 150 °C lead temperature. 5. EIA/JESD51-2 environment and EIA/JESD51-3 PCB with standard footprint dimensions connected with 5 A rated printed wiring track widths. See Figure 8 for the current ratings at other durations. Figure 8 shows the R and T terminal current rating for simulateous operation. In this condition, the G terminal current will be 2xITSM(t), the sum of the R and T terminal currents. Derate current values at -0.61 %/°C for ambient temperatures above 25 °C. PRODUCT 2 INFORMATION TISP3070H3SL THRU TISP3095H3SL, TISP3125H3SL THRU TISP3210H3SL TISP3250H3SL THRU TISP3350H3SL DUAL BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS JANUARY 1999 - REVISED MAY 1999 electrical characteristics for the R and G or T and G terminals, TA = 25°C (unless otherwise noted) PARAMETER IDRM V(BO) TEST CONDITIONS Repetitive peak offstate current Breakover voltage VD = VDRM dv/dt = ±750 V/ms, RSOURCE = 300 Ω dv/dt ≤ ±1000 V/µs, Linear voltage ramp, V(BO) Impulse breakover Maximum ramp value = ±500 V voltage di/dt = ±20 A/µs, Linear current ramp, Maximum ramp value = ±10 A MIN TA = 85°C ±10 ‘3070 ±70 ‘3080 ±80 ‘3095 ±95 ‘3125 ±125 ‘3135 ±135 ‘3145 ±145 ‘3180 ±180 ‘3210 ±210 ‘3250 ±250 ‘3290 ±290 ‘3350 ±350 ‘3070 ±78 ‘3080 ±88 ‘3095 ±103 ‘3125 ±134 ‘3135 ±144 ‘3145 ±154 ‘3180 ±189 ‘3210 ±220 ‘3250 ±261 ‘3290 ±302 RSOURCE = 300 Ω Breakover current dv/dt = ±750 V/ms, VT On-state voltage IT = ±5 A, tW = 100 µs Holding current IT = ±5 A, di/dt = +/-30 mA/ms IH dv/dt ID Critical rate of rise of off-state voltage Off-state current VD = ±50 V f = 100 kHz, Coff Off-state capacitance f = 100 kHz, f = 100 kHz, f = 100 kHz, Vd = 1 V rms, VD = 0, Vd = 1 V rms, VD = -1 V Vd = 1 V rms, VD = -2 V Vd = 1 V rms, VD = -50 V Vd = 1 V rms, VD = -100 V (see Note 6) NOTE UNIT µA V V ±362 ±0.15 ±0.15 Linear voltage ramp, Maximum ramp value < 0.85VDRM f = 100 kHz, MAX ±5 ‘3350 I(BO) TYP TA = 25°C ±0.6 A ±3 V ±0.6 A ±5 kV/µs TA = 85°C ±10 ‘3070 thru ‘3095 170 ‘3125 thru ‘3210 90 ‘3250 thru ‘3350 84 ‘3070 thru ‘3095 150 ‘3125 thru ‘3210 79 ‘3250 thru ‘3350 67 ‘3070 thru ‘3095 140 ‘3125 thru ‘3210 74 ‘3250 thru ‘3350 62 ‘3070 thru ‘3095 73 ‘3125 thru ‘3210 35 ‘3250 thru ‘3350 28 ‘3125 thru ‘3210 33 ‘3250 thru ‘3350 26 µA pF 6: To avoid possible voltage clipping, the ‘3125 is tested with VD = -98 V. PRODUCT INFORMATION 3 TISP3070H3SL THRU TISP3095H3SL, TISP3125H3SL THRU TISP3210H3SL TISP3250H3SL THRU TISP3350H3SL DUAL BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS JANUARY 1999 - REVISED MAY 1999 electrical characteristics for the R and T terminals, TA = 25°C PARAMETER IDRM V(BO) TEST CONDITIONS Repetitive peak offstate current Breakover voltage TYP VD = 2VDRM dv/dt = ±750 V/ms, RSOURCE = 300 Ω dv/dt ≤ ±1000 V/µs, Linear voltage ramp, V(BO) MIN Impulse breakover Maximum ramp value = ±500 V voltage di/dt = ±20 A/µs, Linear current ramp, Maximum ramp value = ±10 A MAX UNIT ±5 µA ‘3070 ±140 ‘3080 ±160 ‘3095 ±190 ‘3125 ±250 ‘3135 ±270 ‘3145 ±290 ‘3180 ±360 ‘3210 ±420 ‘3250 ±500 ‘3290 ±580 ‘3350 ±700 ‘3070 ±156 ‘3080 ±176 ‘3095 ±206 ‘3125 ±268 ‘3135 ±288 ‘3145 ±308 ‘3180 ±378 ‘3210 ±440 ‘3250 ±252 ‘3290 ±604 ‘3350 ±724 V V thermal characteristics PARAMETER RθJA NOTE Junction to free air thermal resistance EIA/JESD51-3 PCB, IT = ITSM(1000), TA = 25 °C, (see Note 7) MIN TYP MAX UNIT 50 °C/W 7: EIA/JESD51-2 environment and PCB has standard footprint dimensions connected with 5 A rated printed wiring track widths. PRODUCT 4 TEST CONDITIONS INFORMATION TISP3070H3SL THRU TISP3095H3SL, TISP3125H3SL THRU TISP3210H3SL TISP3250H3SL THRU TISP3350H3SL DUAL BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS JANUARY 1999 - REVISED MAY 1999 PARAMETER MEASUREMENT INFORMATION +i Quadrant I ITSP Switching Characteristic ITSM IT V(BO) VT I(BO) IH VDRM -v IDRM ID VD ID IDRM VD VDRM +v IH I(BO) VT V(BO) IT ITSM Quadrant III ITSP Switching Characteristic -i VD = ±50 V and ID = ±10 µA used for reliability release PM4XAAC Figure 1. VOLTAGE-CURRENT CHARACTERISTIC FOR TERMINAL PAIRS PRODUCT INFORMATION 5 TISP3070H3SL THRU TISP3095H3SL, TISP3125H3SL THRU TISP3210H3SL TISP3250H3SL THRU TISP3350H3SL DUAL BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS JANUARY 1999 - REVISED MAY 1999 TYPICAL CHARACTERISTICS OFF-STATE CURRENT vs JUNCTION TEMPERATURE TCHAG 100 1.10 NORMALISED BREAKOVER VOLTAGE vs JUNCTION TEMPERATURE TC4HAF VD = ±50 V Normalised Breakover Voltage |ID| - Off-State Current - µA 10 1 0·1 0·01 1.05 1.00 0.95 0·001 -25 0 25 50 75 100 125 TJ - Junction Temperature - °C -25 150 Figure 2. 100 2.0 TA = 25 °C tW = 100 µs Normalised Holding Current IT - On-State Current - A 50 40 30 20 15 7 5 4 3 2 1.5 1 0.7 '3125 THRU '3210 '3250 THRU '3350 '3070 THRU '3095 1.0 0.9 0.8 0.7 0.6 0.5 0.4 1 1.5 2 3 4 5 VT - On-State Voltage - V 7 10 Figure 4. PRODUCT 6 NORMALISED HOLDING CURRENT vs JUNCTION TEMPERATURE TC4HAD 1.5 70 10 150 Figure 3. ON-STATE CURRENT vs ON-STATE VOLTAGE 200 150 0 25 50 75 100 125 TJ - Junction Temperature - °C INFORMATION -25 0 25 50 75 100 125 TJ - Junction Temperature - °C Figure 5. 150 TISP3070H3SL THRU TISP3095H3SL, TISP3125H3SL THRU TISP3210H3SL TISP3250H3SL THRU TISP3350H3SL DUAL BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS JANUARY 1999 - REVISED MAY 1999 TYPICAL CHARACTERISTICS Capacitance Normalised to VD = 0 0.7 0.6 0.5 '3070 THRU '3095 0.4 0.3 '3125 THRU '3210 '3250 THRU '3350 0.2 0.5 '3290 '3350 '3250 '3180 '3210 70 '3125 '3135 '3145 TJ = 25°C Vd = 1 Vrms 0.8 '3095 0.9 '3070 '3080 75 ∆C - Differential Off-State Capacitance - pF 1 DIFFERENTIAL OFF-STATE CAPACITANCE vs RATED REPETITIVE PEAK OFF-STATE VOLTAGE NORMALISED CAPACITANCE vs OFF-STATE VOLTAGE 65 60 55 ∆C = Coff(-2 V) - Coff(-50 V) 50 45 40 35 30 1 2 3 5 10 20 30 50 100150 VD - Off-state Voltage - V Figure 6. PRODUCT 50 60 70 80 90100 150 200 250 300 VDRM - Repetitive Peak Off-State Voltage - V Figure 7. INFORMATION 7 TISP3070H3SL THRU TISP3095H3SL, TISP3125H3SL THRU TISP3210H3SL TISP3250H3SL THRU TISP3350H3SL DUAL BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS JANUARY 1999 - REVISED MAY 1999 RATING AND THERMAL INFORMATION NON-REPETITIVE PEAK ON-STATE CURRENT vs CURRENT DURATION ITSM(t) - Non-Repetitive Peak On-State Current - A TI4HACA 20 VGEN = 600 V rms, 50/60 Hz 15 RGEN = 1.4*VGEN/ITSM(t) EIA/JESD51-2 ENVIRONMENT EIA/JESD51-3 PCB, TA = 25 °C 10 9 8 7 6 5 SIMULTANEOUS OPERATION OF R AND T TERMINALS. G TERMINAL CURRENT = 2xITSM(t) 4 3 2 1.5 1 0·1 1 10 100 t - Current Duration - s 1000 Figure 8. VDRM DERATING FACTOR vs MINIMUM AMBIENT TEMPERATURE IMPULSE RATING vs AMBIENT TEMPERATURE 1.00 700 600 0.99 BELLCORE 2/10 500 400 Impulse Current - A 0.98 Derating Factor TC4HAA 0.97 '3070 THRU '3095 0.96 0.95 IEC 1.2/50, 8/20 300 FCC 10/160 250 ITU-T 10/700 200 FCC 10/560 150 '3125 THRU '3210 0.94 120 BELLCORE 10/1000 '3250 THRU '3350 0.93 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10 15 20 25 TAMIN - Minimum Ambient Temperature - °C Figure 9. PRODUCT 8 INFORMATION 100 90 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 TA - Ambient Temperature - °C Figure 10. TISP3070H3SL THRU TISP3095H3SL, TISP3125H3SL THRU TISP3210H3SL TISP3250H3SL THRU TISP3350H3SL DUAL BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS JANUARY 1999 - REVISED MAY 1999 APPLICATIONS INFORMATION impulse testing To verify the withstand capability and safety of the equipment, standards require that the equipment is tested with various impulse wave forms. The table below shows some common values. STANDARD GR-1089-CORE PEAK VOLTAGE VOLTAGE PEAK CURRENT CURRENT TISP3xxxH3 SERIES SETTING WAVE FORM VALUE WAVE FORM 25 °C RATING RESISTANCE Ω V µs A µs A 2500 2/10 500 2/10 500 1000 10/1000 100 10/1000 100 0 1500 10/160 200 10/160 250 0 FCC Part 68 800 10/560 100 10/560 160 0 (March 1998) 1500 9/720 † 37.5 5/320 † 200 0 1000 9/720 † 25 5/320 † 200 0 1500 0.5/700 37.5 0.2/310 200 0 5/310 200 0 I3124 ITU-T K20/K21 1500 4000 10/700 37.5 100 † FCC Part 68 terminology for the waveforms produced by the ITU-T recommendation K21 10/700 impulse generator If the impulse generator current exceeds the protectors current rating then a series resistance can be used to reduce the current to the protectors rated value and so prevent possible failure. The required value of series resistance for a given waveform is given by the following calculations. First, the minimum total circuit impedance is found by dividing the impulse generators peak voltage by the protectors rated current. The impulse generators fictive impedance (generators peak voltage divided by peak short circuit current) is then subtracted from the minimum total circuit impedance to give the required value of series resistance. In some cases the equipment will require verification over a temperature range. By using the rated waveform values from Figure 10, the appropriate series resistor value can be calculated for ambient temperatures in the range of -40 °C to 85 °C. a.c. power testing The protector can withstand the G return currents applied for times not exceeding those shown in Figure 8. Currents that exceed these times must be terminated or reduced to avoid protector failure. Fuses, PTC (Positive Temperature Coefficient) resistors and fusible resistors are overcurrent protection devices which can be used to reduce the current flow. Protective fuses may range from a few hundred milliamperes to one ampere. In some cases it may be necessary to add some extra series resistance to prevent the fuse opening during impulse testing. The current versus time characteristic of the overcurrent protector must be below the line shown in Figure 8. In some cases there may be a further time limit imposed by the test standard (e.g. UL 1459 wiring simulator failure). capacitance The protector characteristic off-state capacitance values are given for d.c. bias voltage, VD, values of 0, -1 V, -2 V and -50 V. Where possible values are also given for -100 V. Values for other voltages may be calculated by multiplying the VD = 0 capacitance value by the factor given in Figure 6. Up to 10 MHz the capacitance is essentially independent of frequency. Above 10 MHz the effective capacitance is strongly dependent on connection inductance. In many applications, the typical conductor bias voltages will be about -2 V and -50 V. Figure 7 shows the differential (line unbalance) capacitance caused by biasing one protector at -2 V and the other at -50 V. PRODUCT INFORMATION 9 TISP3070H3SL THRU TISP3095H3SL, TISP3125H3SL THRU TISP3210H3SL TISP3250H3SL THRU TISP3350H3SL DUAL BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS JANUARY 1999 - REVISED MAY 1999 normal system voltage levels The protector should not clip or limit the voltages that occur in normal system operation. For unusual conditions, such as ringing without the line connected, some degree of clipping is permissible. Under this condition, about 10 V of clipping is normally possible without activating the ring trip circuit. Figure 9 allows the calculation of the protector VDRM value at temperatures below 25 °C. The calculated value should not be less than the maximum normal system voltages. The TISP3290H3, with a VDRM of 220 V, can be used for the protection of ring generators producing 105 V rms of ring on a battery voltage of -58 V. The peak ring voltage will be 58 + 1.414*105 = 206.5 V. However, this is the open circuit voltage and the connection of the line and its equipment will reduce the peak voltage. For the extreme case of an unconnected line, the temperature at which clipping begins can be calculated using the data from Figure 9. To possibly clip, the VDRM value has to be 206.5 V. This is a reduction of the 220 V 25 °C VDRM value by a factor of 206.5/220 = 0.94. Figure 9 shows that a 0.94 reduction will occur at an ambient temperature of -32 °C. In this example, the TISP3290H3 will allow normal equipment operation, even on an open-circuit line, provided that the minimum expected ambient temperature does not fall below -32 °C. JESD51 thermal measurement method To standardise thermal measurements, the EIA (Electronic Industries Alliance) has created the JESD51 standard. Part 2 of the standard (JESD51-2, 1995) describes the test environment. This is a 0.0283 m3 (1 ft3) cube which contains the test PCB (Printed Circuit Board) horizontally mounted at the centre. Part 3 of the standard (JESD51-3, 1996) defines two test PCBs for surface mount components; one for packages smaller than 27 mm on a side and the other for packages up to 48 mm. The thermal measurements used the smaller 76.2 mm x 114.3 mm (3.0 “ x 4.5 “) PCB. The JESD51-3 PCBs are designed to have low effective thermal conductivity (high thermal resistance) and represent a worse case condition. The PCBs used in the majority of applications will achieve lower values of thermal resistance and so can dissipate higher power levels than indicated by the JESD51 values. PRODUCT 10 INFORMATION TISP3070H3SL THRU TISP3095H3SL, TISP3125H3SL THRU TISP3210H3SL TISP3250H3SL THRU TISP3350H3SL DUAL BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS JANUARY 1999 - REVISED MAY 1999 MECHANICAL DATA SL003 3-pin plastic single-in-line package This single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions. Leads require no additional cleaning or processing when used in soldered assembly. SL003 4,57 (0.180) MAX 10,2 (0.400) MAX 6,60 (0.260) 6,10 (0.240) 8,31 (0.327) MAX Index Dot 12,9 (0.492) MAX 4,267 (0.168) MIN 1 1,854 (0.073) MAX 2 3 Pin Spacing 2,54 (0.100) T.P. (see Note A) 2 Places 0,356 (0.014) 0,203 (0.008) 3 Places 0,711 (0.028) 0,559 (0.022) 3 Places ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES NOTES: A. Each pin centerline is located within 0,25 (0.010) of its true longitudinal position. B. Body molding flash of up to 0,15 (0.006) may occur in the package lead plane. PRODUCT MDXXAD INFORMATION 11 TISP3070H3SL THRU TISP3095H3SL, TISP3125H3SL THRU TISP3210H3SL TISP3250H3SL THRU TISP3350H3SL DUAL BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS JANUARY 1999 - REVISED MAY 1999 IMPORTANT NOTICE Power Innovations Limited (PI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to verify, before placing orders, that the information being relied on is current. PI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with PI's standard warranty. Testing and other quality control techniques are utilized to the extent PI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. PI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor is any license, either express or implied, granted under any patent right, copyright, design right, or other intellectual property right of PI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. PI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORISED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS. Copyright © 1999, Power Innovations Limited PRODUCT 12 INFORMATION