POINN TISP4200H4BJ

TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
Copyright © 1999, Power Innovations Limited, UK
NOVEMBER 1997 - REVISED MARCH 1999
HIGH HOLDING CURRENT 100 A 10/1000 OVERVOLTAGE PROTECTORS
●
8 kV 10/700, 200 A 5/310 ITU-T K20/21 rating
●
High Holding Current . . . . . . . . . 225 mA min.
●
Ion-Implanted Breakdown Region
Precise and Stable Voltage
Low Voltage Overshoot under Surge
VDRM
DEVICE
SMBJ PACKAGE
(TOP VIEW)
R(B) 1
2 T(A)
MDXXBG
V(BO)
MINIMUM MAXIMUM
V
V
‘4165
135
165
‘4180
145
180
‘4200
155
200
‘4265
200
265
‘4300
230
300
‘4360
270
360
device symbol
T
SD4XAA
R
●
●
Rated for International Surge Wave Shapes
WAVE SHAPE
STANDARD
2/10 µs
GR-1089-CORE
ITSP
Terminals T and R correspond to the
alternative line designators of A and B
A
500
8/20 µs
IEC 61000-4-5
300
10/160 µs
FCC Part 68
250
10/700 µs
ITU-T K20/21
200
10/560 µs
FCC Part 68
160
10/1000 µs
GR-1089-CORE
100
Low Differential Capacitance . . . 39 pF max.
description
These devices are designed to limit overvoltages on the telephone line. Overvoltages are normally caused by
a.c. power system or lightning flash disturbances which are induced or conducted on to the telephone line. A
single device provides 2-point protection and is typically used for the protection of 2-wire telecommunication
equipment (e.g. between the Ring and Tip wires for telephones and modems). Combinations of devices can
be used for multi-point protection (e.g. 3-point protection between Ring, Tip and Ground).
The protector consists of a symmetrical voltage-triggered bidirectional thyristor. Overvoltages are initially
clipped by breakdown clamping until the voltage rises to the breakover level, which causes the device to
crowbar into a low-voltage on state. This low-voltage on state causes the current resulting from the
overvoltage to be safely diverted through the device. The high crowbar holding current prevents d.c. latchup
as the diverted current subsides.
This TISP4xxxH4BJ range consists of six voltage variants to meet various maximum system voltage levels
(135 V to 270 V). They are guaranteed to voltage limit and withstand the listed international lightning surges
in both polarities. These high (H) current protection devices are in a plastic package SMBJ (JEDEC DO214AA with J-bend leads) and supplied in embossed carrier reel pack. For alternative voltage and holding
current values, consult the factory. For lower rated impulse currents in the SMB package, the 50 A 10/1000
TISP4xxxM3BJ series is available.
PRODUCT
INFORMATION
Information is current as of publication date. Products conform to specifications in accordance
with the terms of Power Innovations standard warranty. Production processing does not
necessarily include testing of all parameters.
1
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
absolute maximum ratings, TA = 25°C (unless otherwise noted)
RATING
Repetitive peak off-state voltage, (see Note 1)
SYMBOL
VALUE
‘4165
±135
‘4180
±145
‘4200
‘4265
VDRM
±155
±200
‘4300
±230
‘4360
±270
UNIT
V
Non-repetitive peak on-state pulse current (see Notes 2, 3 and 4)
2/10 µs (GR-1089-CORE, 2/10 µs voltage wave shape)
500
8/20 µs (IEC 61000-4-5, 1.2/50 µs voltage, 8/20 current combination wave generator)
300
10/160 µs (FCC Part 68, 10/160 µs voltage wave shape)
250
5/200 µs (VDE 0433, 10/700 µs voltage wave shape)
0.2/310 µs (I3124, 0.5/700 µs voltage wave shape)
ITSP
5/310 µs (ITU-T K20/21, 10/700 µs voltage wave shape)
220
200
A
200
5/310 µs (FTZ R12, 10/700 µs voltage wave shape)
200
10/560 µs (FCC Part 68, 10/560 µs voltage wave shape)
160
10/1000 µs (GR-1089-CORE, 10/1000 µs voltage wave shape)
100
Non-repetitive peak on-state current (see Notes 2, 3 and 5)
20 ms (50 Hz) full sine wave
55
16.7 ms (60 Hz) full sine wave
ITSM
1000 s 50 Hz/60 Hz a.c.
Initial rate of rise of on-state current,
Exponential current ramp, Maximum ramp value < 200 A
Junction temperature
Storage temperature range
NOTES: 1.
2.
3.
4.
5.
A
diT/dt
400
A/µs
TJ
-40 to +150
°C
Tstg
-65 to +150
°C
See Applications Information and Figure 10 for voltage values at lower temperatures.
Initially the TISP4xxxH4BJ must be in thermal equilibrium with TJ = 25°C.
The surge may be repeated after the TISP4xxxH4BJ returns to its initial conditions.
See Applications Information and Figure 11 for current ratings at other temperatures.
EIA/JESD51-2 environment and EIA/JESD51-3 PCB with standard footprint dimensions connected with 5 A rated printed wiring
track widths. See Figure 8 for the current ratings at other durations. Derate current values at -0.61 %/°C for ambient temperatures
above 25 °C
PRODUCT
2
60
2.1
INFORMATION
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
electrical characteristics for the T and R terminals, TA = 25°C (unless otherwise noted)
PARAMETER
IDRM
V(BO)
V(BO)
TEST CONDITIONS
MIN
TYP
±5
TA = 85°C
±10
‘4165
±165
‘4180
±180
‘4200
±200
‘4265
±265
‘4300
±300
‘4360
±360
‘4165
±174
dv/dt ≤ ±1000 V/µs, Linear voltage ramp,
‘4180
±189
Impulse breakover
Maximum ramp value = ±500 V
‘4200
±210
voltage
di/dt = ±20 A/µs, Linear current ramp,
‘4265
±276
Maximum ramp value = ±10 A
‘4300
±311
state current
Breakover voltage
VD = ±VDRM
dv/dt = ±750 V/ms,
RSOURCE = 300 Ω
‘4360
RSOURCE = 300 Ω
I(BO)
Breakover current
dv/dt = ±750 V/ms,
VT
On-state voltage
IT = ±5 A, tW = 100 µs
Holding current
IT = ±5 A, di/dt = +/-30 mA/ms
IH
dv/dt
ID
Coff
MAX
TA = 25°C
Repetitive peak off-
Critical rate of rise of
off-state voltage
Off-state current
±0.225
Off-state capacitance
f = 100 kHz,
Vd = 1 V rms, VD = -1 V
f = 100 kHz,
f = 100 kHz,
f = 100 kHz,
Vd = 1 V rms, VD = -2 V
Vd = 1 V rms, VD = -50 V
Vd = 1 V rms, VD = -100 V
V
A
±3
V
±0.8
A
kV/µs
TA = 85°C
Vd = 1 V rms, VD = 0,
V
±0.8
±5
VD = ±50 V
f = 100 kHz,
µA
±373
±0.15
Linear voltage ramp, Maximum ramp value < 0.85VDRM
UNIT
±10
‘4165 thru ‘4200
80
90
‘4265 thru ‘4360
70
84
‘4165 thru ‘4200
71
79
‘4265 thru ‘4360
60
67
‘4165 thru ‘4200
65
74
‘4265 thru ‘4360
55
62
‘4165 thru ‘4200
30
35
‘4265 thru ‘4360
24
28
‘4165 thru ‘4200
28
33
‘4265 thru ‘4360
22
26
TYP
MAX
µA
pF
thermal characteristics
PARAMETER
TEST CONDITIONS
MIN
EIA/JESD51-3 PCB, IT = ITSM(1000),
RθJA
Junction to free air thermal resistance
4-layer PCB, IT = ITSM(1000), TA = 25 °C
NOTE
113
TA = 25 °C, (see Note 6)
265 mm x 210 mm populated line card,
UNIT
°C/W
50
6: EIA/JESD51-2 environment and PCB has standard footprint dimensions connected with 5 A rated printed wiring track widths.
PRODUCT
INFORMATION
3
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
PARAMETER MEASUREMENT INFORMATION
+i
Quadrant I
ITSP
Switching
Characteristic
ITSM
IT
V(BO)
VT
I(BO)
IH
VDRM
-v
IDRM
ID
VD
ID
IDRM
VD
VDRM
+v
IH
I(BO)
VT
V(BO)
IT
ITSM
Quadrant III
ITSP
Switching
Characteristic
-i
Figure 1. VOLTAGE-CURRENT CHARACTERISTIC FOR T AND R TERMINALS
ALL MEASUREMENTS ARE REFERENCED TO THE R TERMINAL
PRODUCT
4
INFORMATION
PMXXAAB
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
TYPICAL CHARACTERISTICS
OFF-STATE CURRENT
vs
JUNCTION TEMPERATURE
TCHAG
100
1.10
NORMALISED BREAKOVER VOLTAGE
vs
JUNCTION TEMPERATURE TC4HAF
VD = ±50 V
Normalised Breakover Voltage
|ID| - Off-State Current - µA
10
1
0·1
0·01
1.05
1.00
0.95
0·001
-25
0
25
50
75
100 125
TJ - Junction Temperature - °C
-25
150
Figure 2.
ON-STATE CURRENT
vs
ON-STATE VOLTAGE
200
150
100
TC4HAH
Normalised Holding Current
IT - On-State Current - A
NORMALISED HOLDING CURRENT
vs
JUNCTION TEMPERATURE TC4HAK
1.5
50
40
30
20
15
10
7
5
4
3
1
0.7
2.0
TA = 25 °C
tW = 100 µs
'4265
THRU
'4360
150
Figure 3.
70
2
1.5
0
25
50
75
100 125
TJ - Junction Temperature - °C
'4165
THRU
'4200
1.0
0.9
0.8
0.7
0.6
0.5
0.4
1
1.5
2
3
4 5
VT - On-State Voltage - V
7
10
Figure 4.
PRODUCT
-25
0
25
50
75
100 125
TJ - Junction Temperature - °C
150
Figure 5.
INFORMATION
5
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
TYPICAL CHARACTERISTICS
DIFFERENTIAL OFF-STATE CAPACITANCE
vs
RATED REPETITIVE PEAK OFF-STATE VOLTAGE
TC4HAI
1
0.7
0.6
'4165 THRU '4200
0.5
'4265 THRU '4360
0.4
0.3
1
2
3
5
10
20 30
50
100150
VD - Off-state Voltage - V
Figure 6.
PRODUCT
6
INFORMATION
'4300
'4265
'4200
'4180
35
'4165
TJ = 25°C
Vd = 1 Vrms
0.8
∆C - Differential Off-State Capacitance - pF
Capacitance Normalised to VD = 0
0.9
0.2
0.5
TCHAJ
36
'4360
NORMALISED CAPACITANCE
vs
OFF-STATE VOLTAGE
34
33
∆C = Coff(-2 V) - Coff(-50 V)
32
31
30
130
150
170
200
230
270
VDRM - Repetitive Peak Off-State Voltage - V
Figure 7.
300
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
RATING AND THERMAL INFORMATION
THERMAL IMPEDANCE
vs
POWER DURATION
TI4HAC
30
VGEN = 600 Vrms, 50/60 Hz
RGEN = 1.4*VGEN/ITSM(t)
EIA/JESD51-2 ENVIRONMENT
EIA/JESD51-3 PCB
TA = 25 °C
20
15
10
9
8
7
6
5
4
3
2
1.5
0·1
1
10
100
100
70
50
40
30
20
15
10
7
5
4
3
1
0·1
1000
ITSM(t) APPLIED FOR TIME t
EIA/JESD51-2 ENVIRONMENT
EIA/JESD51-3 PCB
TA = 25 °C
2
1.5
t - Current Duration - s
1
10
100
1000
t - Power Duration - s
Figure 8.
Figure 9.
VDRM DERATING FACTOR
vs
MINIMUM AMBIENT TEMPERATURE
IMPULSE RATING
vs
AMBIENT TEMPERATURE
TI4HAF
1.00
700
600
0.99
TC4HAA
BELLCORE 2/10
500
400
Impulse Current - A
0.98
Derating Factor
TI4HAE
150
ZθJA(t) - Transient Thermal Impedance - °C/W
ITSM(t) - Non-Repetitive Peak On-State Current - A
NON-REPETITIVE PEAK ON-STATE CURRENT
vs
CURRENT DURATION
0.97
'4165 THRU '4200
0.96
0.95
IEC 1.2/50, 8/20
300
FCC 10/160
250
ITU-T 10/700
200
FCC 10/560
150
120
0.94
BELLCORE 10/1000
'4265 THRU '4360
0.93
-40 -35 -30 -25 -20 -15 -10 -5
0
5 10 15 20 25
TAMIN - Minimum Ambient Temperature - °C
Figure 10.
PRODUCT
100
90
-40 -30 -20 -10 0
10 20 30 40 50 60 70 80
TA - Ambient Temperature - °C
Figure 11.
INFORMATION
7
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
APPLICATIONS INFORMATION
deployment
These devices are two terminal overvoltage protectors. They may be used either singly to limit the voltage
between two conductors (Figure 12) or in multiples to limit the voltage at several points in a circuit (Figure 13).
Th3
Th1
Th1
Th2
Figure 12. TWO POINT PROTECTION
Figure 13. MULTI-POINT PROTECTION
In Figure 12, protector Th1 limits the maximum voltage between the two conductors to ±V(BO). This
configuration is normally used to protect circuits without a ground reference, such as modems. In Figure 13,
protectors Th2 and Th3 limit the maximum voltage between each conductor and ground to the ±V(BO) of the
individual protector. Protector Th1 limits the maximum voltage between the two conductors to its ±V(BO)
value. If the equipment being protected has all its vulnerable components connected between the conductors
and ground, then protector Th1 is not required.
impulse testing
To verify the withstand capability and safety of the equipment, standards require that the equipment is tested
with various impulse wave forms. The table below shows some common values.
STANDARD
GR-1089-CORE
PEAK VOLTAGE
VOLTAGE
PEAK CURRENT
CURRENT
TISP4xxxH4
SERIES
SETTING
WAVE FORM
VALUE
WAVE FORM
25 °C RATING
RESISTANCE
Ω
V
µs
A
µs
A
2500
2/10
500
2/10
500
1000
10/1000
100
10/1000
100
0
1500
10/160
200
10/160
250
0
FCC Part 68
800
10/560
100
10/560
160
0
(March 1998)
1500
9/720 †
37.5
5/320 †
200
0
1000
9/720 †
25
5/320 †
200
0
1500
0.5/700
37.5
0.2/310
200
0
5/310
200
0
I3124
ITU-T K20/K21
1500
4000
10/700
37.5
100
† FCC Part 68 terminology for the waveforms produced by the ITU-T recommendation K21 10/700 impulse generator
If the impulse generator current exceeds the protectors current rating then a series resistance can be used to
reduce the current to the protectors rated value and so prevent possible failure. The required value of series
resistance for a given waveform is given by the following calculations. First, the minimum total circuit
impedance is found by dividing the impulse generators peak voltage by the protectors rated current. The
impulse generators fictive impedance (generators peak voltage divided by peak short circuit current) is then
subtracted from the minimum total circuit impedance to give the required value of series resistance. In some
cases the equipment will require verification over a temperature range. By using the rated waveform values
from Figure 11, the appropriate series resistor value can be calculated for ambient temperatures in the range
of -40 °C to 85 °C.
PRODUCT
8
INFORMATION
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
a.c. power testing
The protector can withstand currents applied for times not exceeding those shown in Figure 8. Currents that
exceed these times must be terminated or reduced to avoid protector failure. Fuses, PTC (Positive
Temperature Coefficient) resistors and fusible resistors are overcurrent protection devices which can be used
to reduce the current flow. Protective fuses may range from a few hundred milliamperes to one ampere. In
some cases it may be necessary to add some extra series resistance to prevent the fuse opening during
impulse testing. The current versus time characteristic of the overcurrent protector must be below the line
shown in Figure 8. In some cases there may be a further time limit imposed by the test standard (e.g. UL
1459 wiring simulator failure).
capacitance
The protector characteristic off-state capacitance values are given for d.c. bias voltage, VD, values of 0, -1 V,
-2 V and -50 V. Where possible values are also given for -100 V. Values for other voltages may be calculated
by multiplying the VD = 0 capacitance value by the factor given in Figure 6. Up to 10 MHz the capacitance is
essentially independent of frequency. Above 10 MHz the effective capacitance is strongly dependent on
connection inductance. In many applications, such as Figure 15 and Figure 17, the typical conductor bias
voltages will be about -2 V and -50 V. Figure 7 shows the differential (line unbalance) capacitance caused by
biasing one protector at -2 V and the other at -50 V.
normal system voltage levels
The protector should not clip or limit the voltages that occur in normal system operation. For unusual
conditions, such as ringing without the line connected, some degree of clipping is permissible. Under this
condition about 10 V of clipping is normally possible without activating the ring trip circuit.
Figure 10 allows the calculation of the protector VDRM value at temperatures below 25 °C. The calculated
value should not be less than the maximum normal system voltages. The TISP4265H4BJ, with a VDRM of
200 V, can be used for the protection of ring generators producing 100 V rms of ring on a battery voltage of
-58 V (Th2 and Th3 in Figure 17). The peak ring voltage will be 58 + 1.414*100 = 199.4 V. However, this is the
open circuit voltage and the connection of the line and its equipment will reduce the peak voltage. In the
extreme case of an unconnected line, clipping the peak voltage to 190 V should not activate the ring trip. This
level of clipping would occur at the temperature when the VDRM has reduced to 190/200 = 0.95 of its 25 °C
value. Figure 10 shows that this condition will occur at an ambient temperature of -22 °C. In this example, the
TISP4265H4BJ will allow normal equipment operation provided that the minimum expected ambient
temperature does not fall below -22 °C.
JESD51 thermal measurement method
To standardise thermal measurements, the EIA (Electronic Industries Alliance) has created the JESD51
standard. Part 2 of the standard (JESD51-2, 1995) describes the test environment. This is a 0.0283 m3 (1 ft3)
cube which contains the test PCB (Printed Circuit Board) horizontally mounted at the centre. Part 3 of the
standard (JESD51-3, 1996) defines two test PCBs for surface mount components; one for packages smaller
than 27 mm on a side and the other for packages up to 48 mm. The SMBJ measurements used the smaller
76.2 mm x 114.3 mm (3.0 “ x 4.5 “) PCB. The JESD51-3 PCBs are designed to have low effective thermal
conductivity (high thermal resistance) and represent a worse case condition. The PCBs used in the majority
of applications will achieve lower values of thermal resistance and so can dissipate higher power levels than
indicated by the JESD51 values.
PRODUCT
INFORMATION
9
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
typical circuits
MODEM
TIP
WIRE
RING
FUSE
RING DETECTOR
R1a
Th3
HOOK SWITCH
TISP4360H4
PROTECTED
EQUIPMENT
Th1
D.C. SINK
Th2
SIGNAL
TIP
AI6XBP
RING
WIRE
Figure 14. MODEM INTER-WIRE PROTECTION
E.G. LINE CARD
R1b
AI6XBK
Figure 15. PROTECTION MODULE
R1a
Th3
SIGNAL
Th1
Th2
R1b
AI6XBL
D.C.
Figure 16. ISDN PROTECTION
OVERCURRENT
PROTECTION
TIP
WIRE
RING/TEST
PROTECTION
TEST
RELAY
RING
RELAY
SLIC
RELAY
S3a
R1a
Th3
S1a
SLIC
PROTECTION
Th4
S2a
SLIC
Th1
Th2
RING
WIRE
Th5
R1b
S3b
S1b
S2b
TISP6xxxx,
TISPPBLx,
½TISP6NTP2
C1
220 nF
TEST
EQUIPMENT
RING
GENERATOR
Figure 17. LINE CARD RING/TEST PROTECTION
PRODUCT
10
INFORMATION
VBAT
AI6XBJ
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
MECHANICAL DATA
SMBJ (DO-214AA)
plastic surface mount diode package
This surface mount package consists of a circuit mounted on a lead frame and encapsulated within a plastic
compound. The compound will withstand soldering temperature with no deformation, and circuit performance
characteristics will remain stable when operated in high humidity conditions. Leads require no additional
cleaning or processing when used in soldered assembly.
SMB
4,57
4,06
3,94
3,30
2
Index
Mark
(if needed)
2,40
2,00
1,52
0,76
2,10
1,90
0,20
0,10
2,32
1,96
5,59
5,21
ALL LINEAR DIMENSIONS IN MILLIMETERS
MDXXBHA
PRODUCT
INFORMATION
11
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
MECHANICAL DATA
recommended printed wiring footprint.
SMB Pad Size
2.54
2.40
2.16
ALL LINEAR DIMENSIONS IN MILLIMETERS
MDXXBI
device symbolization code
Devices will be coded as below. As the device parameters are symmetrical, terminal 1 is not identified.
DEVICE
SYMOBLIZATION
CODE
TISP4165H4BJ
4165H4
TISP4180H4BJ
4180H4
TISP4200H4BJ
4200H4
TISP4265H4BJ
4265H4
TISP4300H4BJ
4300H4
TISP4360H4BJ
4360H4
carrier information
Devices are shipped in one of the carriers below. Unless a specific method of shipment is specified by the
customer, devices will be shipped in the most practical carrier. For production quantities the carrier will be
embossed tape reel pack. Evaluation quantities may be shipped in bulk pack or embossed tape.
PRODUCT
12
CARRIER
ORDER #
Embossed Tape Reel Pack
TISP4xxxH4BJR
Bulk Pack
TISP4xxxH4BJ
INFORMATION
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
MECHANICAL DATA
tape dimensions
SMB Package Single-Sprocket Tape
4,10
3,90
1,65
1,55
2,05
1,95
1,85
1,65
0,40 MAX.
5,55
5,45
8,10
7,90
ø 1,5 MIN.
0 MIN.
Carrier Tape
Direction of Feed
12,30
11,70
8,20
MAX.
Cover
Tape
4,5 MAX.
Embossment
20°
Index
Mark
(if needed)
Maximium component
rotation
Typical component
cavity centre line
Typical component
centre line
ALL LINEAR DIMENSIONS IN MILLIMETERS
NOTES: A. The clearance between the component and the cavity must be within 0,05 mm MIN. to 0,65 mm MAX. so that the
component cannot rotate more than 20° within the determined cavity.
B. Taped devices are supplied on a reel of the following dimensions:-
MDXXBJ
Reel diameter:
330 ±3,0 mm
Reel hub diameter 75 mm MIN.
Reel axial hole:
13,0 ±0,5 mm
C. 3000 devices are on a reel.
PRODUCT
INFORMATION
13
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
IMPORTANT NOTICE
Power Innovations Limited (PI) reserves the right to make changes to its products or to discontinue any semiconductor product
or service without notice, and advises its customers to verify, before placing orders, that the information being relied on is
current.
PI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with
PI's standard warranty. Testing and other quality control techniques are utilized to the extent PI deems necessary to support this
warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government
requirements.
PI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents
or services described herein. Nor is any license, either express or implied, granted under any patent right, copyright, design
right, or other intellectual property right of PI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used.
PI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORISED, OR WARRANTED TO BE SUITABLE
FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS.
Copyright © 1999, Power Innovations Limited
PRODUCT
14
INFORMATION