POINN TISP4400M3LM

TISP4070M3LM THRU TISP4095M3LM, TISP4125M3LM THRU TISP4220M3LM,
TISP4240M3LM THRU TISP4400M3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
Copyright © 1999, Power Innovations Limited, UK
NOVEMBER 1997 - REVISED APRIL 1999
TELECOMMUNICATION SYSTEM MEDIUM CURRENT OVERVOLTAGE PROTECTORS
●
4 kV 10/700, 100 A 5/310 ITU-T K20/21 rating
●
Ion-Implanted Breakdown Region
Precise and Stable Voltage
Low Voltage Overshoot under Surge
DEVICE
●
VDRM
LM PACKAGE
(TOP VIEW)
T(A)
NC
R(B)
MD4XAT
V(BO)
V
V
‘4070
58
70
‘4080
65
80
NC - No internal connection on pin 2
LMF PACKAGE
(LM PACKAGE WITH FORMED LEADS)
(TOP VIEW)
‘4095
75
95
‘4125
100
125
‘4145
120
145
‘4165
135
165
NC
‘4180
145
180
R(B)
‘4220
160
220
‘4240
180
240
‘4260
200
260
‘4300
230
300
‘4350
275
350
‘4400
300
400
T(A)
1
2
3
MD4XAKB
NC - No internal connection on pin 2
device symbol
T
Rated for International Surge Wave Shapes
ITSP
WAVE SHAPE
STANDARD
2/10 µs
GR-1089-CORE
8/20 µs
IEC 61000-4-5
220
R
10/160 µs
FCC Part 68
120
Terminals T and R correspond to the
alternative line designators of A and B
10/700 µs
ITU-T K20/21
FCC Part 68
A
300
100
10/560 µs
FCC Part 68
75
10/1000 µs
GR-1089-CORE
50
●
Low Differential Capacitance . . . 43 pF max.
SD4XAA
Ordering Information
DEVICE TYPE
●
1
2
3
TISP4xxxM3LM
PACKAGE TYPE
Straight Lead DO-92 Bulk Pack
TISP4xxxM3LMR
Straight Lead DO-92 Tape and Reeled
TISP4xxxM3LMFR
Formed Lead DO-92 Tape and Reeled
description
These devices are designed to limit overvoltages on the telephone line. Overvoltages are normally caused by
a.c. power system or lightning flash disturbances which are induced or conducted on to the telephone line. A
single device provides 2-point protection and is typically used for the protection of 2-wire telecommunication
equipment (e.g. between the Ring to Tip wires for telephones and modems). Combinations of devices can be
used for multi-point protection (e.g. 3-point protection between Ring, Tip and Ground).
The protector consists of a symmetrical voltage-triggered bidirectional thyristor. Overvoltages are initially
clipped by breakdown clamping until the voltage rises to the breakover level, which causes the device to
crowbar into a low-voltage on state. This low-voltage on state causes the current resulting from the
overvoltage to be safely diverted through the device. The high crowbar holding current prevents d.c. latchup
as the diverted current subsides.
PRODUCT
INFORMATION
Information is current as of publication date. Products conform to specifications in accordance
with the terms of Power Innovations standard warranty. Production processing does not
necessarily include testing of all parameters.
1
TISP4070M3LM THRU TISP4095M3LM, TISP4125M3LM THRU TISP4220M3LM,
TISP4240M3LM THRU TISP4400M3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED APRIL 1999
description (continued)
This TISP4xxxM3LM range consists of thirteen voltage variants to meet various maximum system voltage
levels (58 V to 300 V). They are guaranteed to voltage limit and withstand the listed international lightning
surges in both polarities. These protection devices are supplied in a DO-92 (LM) cylindrical plastic package.
The TISP4xxxM3LM is a straight lead DO-92 supplied in bulk pack and on tape and reeled. The
TISP4xxxM3LMF is a formed lead DO-92 supplied only on tape and reeled.
absolute maximum ratings, TA = 25°C (unless otherwise noted)
RATING
SYMBOL
± 58
‘4080
± 65
‘4095
± 75
‘4125
±100
‘4145
±120
‘4180
UNIT
±135
‘4165
Repetitive peak off-state voltage, (see Note 1)
VALUE
‘4070
VDRM
±145
‘4220
±160
‘4240
±180
‘4260
±200
‘4300
±230
‘4350
±275
‘4400
±300
V
Non-repetitive peak on-state pulse current (see Notes 2, 3 and 4)
2/10 µs (GR-1089-CORE, 2/10 µs voltage wave shape)
300
8/20 µs (IEC 61000-4-5, combination wave generator, 1.2/50 voltage, 8/20 current)
220
10/160 µs (FCC Part 68, 10/160 µs voltage wave shape)
120
5/200 µs (VDE 0433, 10/700 µs voltage wave shape)
0.2/310 µs (I3124, 0.5/700 µs voltage wave shape)
110
ITSP
5/310 µs (ITU-T K20/21, 10/700 µs voltage wave shape)
100
A
100
5/310 µs (FTZ R12, 10/700 µs voltage wave shape)
100
5/320 µs (FCC Part 68, 9/720 µs voltage wave shape)
100
10/560 µs (FCC Part 68, 10/560 µs voltage wave shape)
75
10/1000 µs (GR-1089-CORE, 10/1000 µs voltage wave shape)
50
Non-repetitive peak on-state current (see Notes 2, 3 and 5)
20 ms (50 Hz) full sine wave
30
16.7 ms (60 Hz) full sine wave
ITSM
1000 s 50 Hz/60 Hz a.c.
Initial rate of rise of on-state current,
Exponential current ramp, Maximum ramp value < 100 A
Junction temperature
Storage temperature range
NOTES: 1.
2.
3.
4.
5.
A
diT/dt
300
A/µs
TJ
-40 to +150
°C
Tstg
-65 to +150
°C
See Applications Information and Figure 10 for voltage values at lower temperatures.
Initially the TISP4xxxM3LM must be in thermal equilibrium with TJ = 25°C.
The surge may be repeated after the TISP4xxxM3LM returns to its initial conditions.
See Applications Information and Figure 11 for current ratings at other temperatures.
EIA/JESD51-2 environment and EIA/JESD51-3 PCB with standard footprint dimensions connected with 5 A rated printed wiring
track widths. See Figure 8 for the current ratings at other durations. Derate current values at -0.61 %/°C for ambient temperatures
above 25 °C
PRODUCT
2
32
2.1
INFORMATION
TISP4070M3LM THRU TISP4095M3LM, TISP4125M3LM THRU TISP4220M3LM,
TISP4240M3LM THRU TISP4400M3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED APRIL 1999
electrical characteristics for the T and R terminals, TA = 25°C (unless otherwise noted)
PARAMETER
IDRM
V(BO)
TEST CONDITIONS
Repetitive peak offstate current
Breakover voltage
VD = ±VDRM
dv/dt = ±750 V/ms,
RSOURCE = 300 Ω
dv/dt ≤ ±1000 V/µs, Linear voltage ramp,
V(BO)
Impulse breakover
Maximum ramp value = ±500 V
voltage
di/dt = ±20 A/µs, Linear current ramp,
Maximum ramp value = ±10 A
MIN
TYP
±5
TA = 85°C
±10
‘4070
±70
‘4080
±80
‘4095
±95
‘4125
±125
‘4145
±145
‘4165
±165
‘4180
±180
‘4220
±220
‘4240
±240
‘4260
±260
‘4300
±300
‘4350
±350
‘4400
±400
‘4070
±78
‘4080
±88
‘4095
±102
‘4125
±132
‘4145
±151
‘4165
±171
‘4180
±186
‘4220
±227
‘4240
±247
‘4260
±267
‘4300
±308
‘4350
±359
RSOURCE = 300 Ω
Breakover current
dv/dt = ±750 V/ms,
VT
On-state voltage
IT = ±5 A, tW = 100 µs
Holding current
IT = ±5 A, di/dt = +/-30 mA/ms
IH
dv/dt
ID
Critical rate of rise of
off-state voltage
Off-state current
VD = ±50 V
f = 100 kHz,
f = 100 kHz,
Coff
Off-state capacitance
f = 100 kHz,
f = 100 kHz,
f = 100 kHz,
±0.15
Vd = 1 V rms, VD = -1 V
Vd = 1 V rms, VD = -2 V
Vd = 1 V rms, VD = -50 V
Vd = 1 V rms, VD = -100 V
µA
V
V
±0.6
A
±3
V
±0.6
A
±5
kV/µs
TA = 85°C
Vd = 1 V rms, VD = 0,
(see Note 6)
NOTE
±0.15
Linear voltage ramp, Maximum ramp value < 0.85VDRM
UNIT
±410
‘4400
I(BO)
MAX
TA = 25°C
±10
‘4070 thru ‘4095
86
110
‘4125 thru ‘4220
60
80
‘4240 thru ‘4400
54
70
‘4070 thru ‘4095
80
96
‘4125 thru ‘4220
56
74
‘4240 thru ‘4400
50
64
‘4070 thru ‘4095
74
90
‘4125 thru ‘4220
52
70
‘4240 thru ‘4400
46
60
‘4070 thru ‘4095
36
47
‘4125 thru ‘4220
26
36
‘4240 thru ‘4400
20
30
‘4125 thru ‘4220
20
30
‘4240 thru ‘4400
16
24
µA
pF
6: To avoid possible voltage clipping, the ‘4125 is tested with VD = -98 V.
PRODUCT
INFORMATION
3
TISP4070M3LM THRU TISP4095M3LM, TISP4125M3LM THRU TISP4220M3LM,
TISP4240M3LM THRU TISP4400M3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED APRIL 1999
thermal characteristics
PARAMETER
MIN
TEST CONDITIONS
TYP
MAX
EIA/JESD51-3 PCB, IT = ITSM(1000),
RθJA
265 mm x 210 mm populated line card,
4-layer PCB, IT = ITSM(1000), TA = 25 °C
NOTE
120
TA = 25 °C, (see Note 7)
Junction to free air thermal resistance
°C/W
57
7: EIA/JESD51-2 environment and PCB has standard footprint dimensions connected with 5 A rated printed wiring track widths.
PARAMETER MEASUREMENT INFORMATION
+i
Quadrant I
ITSP
Switching
Characteristic
ITSM
IT
V(BO)
VT
I(BO)
IH
VDRM
-v
IDRM
ID
VD
ID
IDRM
VD
VDRM
+v
IH
I(BO)
VT
V(BO)
IT
ITSM
Quadrant III
ITSP
Switching
Characteristic
-i
Figure 1. VOLTAGE-CURRENT CHARACTERISTIC FOR T AND R TERMINALS
ALL MEASUREMENTS ARE REFERENCED TO THE R TERMINAL
PRODUCT
4
UNIT
INFORMATION
PMXXAAB
TISP4070M3LM THRU TISP4095M3LM, TISP4125M3LM THRU TISP4220M3LM,
TISP4240M3LM THRU TISP4400M3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED APRIL 1999
TYPICAL CHARACTERISTICS
OFF-STATE CURRENT
vs
JUNCTION TEMPERATURE
TCMAG
100
1.10
NORMALISED BREAKOVER VOLTAGE
vs
JUNCTION TEMPERATURE TC4MAF
Normalised Breakover Voltage
VD = ±50 V
|ID| - Off-State Current - µA
10
1
0·1
0·01
1.05
1.00
0.95
0·001
-25
0
25
50
75
100
TJ - Junction Temperature - °C
125
-25
150
Figure 2.
ON-STATE CURRENT
vs
ON-STATE VOLTAGE
TC4MAJ
2.0
50
40
30
20
15
10
7
5
4
3
2
1.5
1
0.7
'4125
THRU
'4220
'4240
THRU
'4400
1
'4070
THRU
'4095
1.5
2
3
4 5
VT - On-State Voltage - V
1.0
0.9
0.8
0.7
0.6
0.5
0.4
7
10
Figure 4.
PRODUCT
NORMALISED HOLDING CURRENT
vs
JUNCTION TEMPERATURE TC4MAD
1.5
Normalised Holding Current
IT - On-State Current - A
TA = 25 °C
tW = 100 µs
150
Figure 3.
100
70
0
25
50
75
100 125
TJ - Junction Temperature - °C
-25
0
25
50
75
100 125
TJ - Junction Temperature - °C
150
Figure 5.
INFORMATION
5
TISP4070M3LM THRU TISP4095M3LM, TISP4125M3LM THRU TISP4220M3LM,
TISP4240M3LM THRU TISP4400M3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED APRIL 1999
TYPICAL CHARACTERISTICS
NORMALISED CAPACITANCE
vs
OFF-STATE VOLTAGE
TC4MAK
DIFFERENTIAL OFF-STATE CAPACITANCE
vs
RATED REPETITIVE PEAK OFF-STATE VOLTAGE
TC4MAL
Capacitance Normalised to VD = 0
Vd = 1 Vrms
0.7
0.6
0.5
'4070 THRU '4095
0.4
'4125 THRU '4220
0.3
'4240 THRU '4400
0.2
0.5
'4300
'4350
'4400
'4260
'4240
'4165
'4180
'4220
'4145
'4125
45
40
∆ C = Coff(-2 V) - Coff(-50 V)
35
30
25
1
2
3
5
10
20 30
50
100150
VD - Off-state Voltage - V
Figure 6.
PRODUCT
6
'4095
TJ = 25°C
0.8
∆ C - Differential Off-State Capacitance - pF
0.9
'4070
'4080
50
1
INFORMATION
50
60 70 80 90100
150
200 250 300
VDRM - Repetitive Peak Off-State Voltage - V
Figure 7.
TISP4070M3LM THRU TISP4095M3LM, TISP4125M3LM THRU TISP4220M3LM,
TISP4240M3LM THRU TISP4400M3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED APRIL 1999
RATING AND THERMAL INFORMATION
THERMAL IMPEDANCE
vs
POWER DURATION
30
150
- Transient Thermal Impedance - °C/W
VGEN = 600 Vrms, 50/60 Hz
RGEN = 1.4*VGEN/ITSM(t)
20
EIA/JESD51-2 ENVIRONMENT
EIA/JESD51-3 PCB
TA = 25 °C
15
10
9
8
7
6
5
4
θ JA(t)
3
2
1.5
0·1
Z
ITSM(t) - Non-Repetitive Peak On-State Current - A
NON-REPETITIVE PEAK ON-STATE CURRENT
vs
CURRENT DURATION
TI4MAF
1
10
100
1000
100
90
80
70
60
50
40
30
20
15
10
9
8
7
6
5
4
0·1
t - Current Duration - s
ITSM(t) APPLIED FOR TIME t
EIA/JESD51-2 ENVIRONMENT
EIA/JESD51-3 PCB
TA = 25 °C
1
10
100
1000
t - Power Duration - s
Figure 8.
Figure 9.
VDRM DERATING FACTOR
IMPULSE RATING
vs
AMBIENT TEMPERATURE
vs
MINIMUM AMBIENT TEMPERATURE
TI4MAH
1.00
TI4MAG
TC4MAA
400
BELLCORE 2/10
300
0.99
250
'4125 THRU '4220
Impulse Current - A
Derating Factor
0.98
0.97
0.96
0.95
'4070 THRU '4095
IEC 1.2/50, 8/20
200
150
FCC 10/160
120
100
90
80
70
ITU-T 10/700
FCC 10/560
60
0.94
'4240 THRU '4400
50
BELLCORE 10/1000
0.93
-40 -35 -30 -25 -20 -15 -10 -5 0 5 10 15 20 25
TAMIN - Minimum Ambient Temperature - °C
Figure 10.
PRODUCT
40
-40 -30 -20 -10 0
10 20 30 40 50 60 70 80
TA - Ambient Temperature - °C
Figure 11.
INFORMATION
7
TISP4070M3LM THRU TISP4095M3LM, TISP4125M3LM THRU TISP4220M3LM,
TISP4240M3LM THRU TISP4400M3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED APRIL 1999
APPLICATIONS INFORMATION
deployment
These devices are two terminal overvoltage protectors. They may be used either singly to limit the voltage
between two conductors (Figure 12) or in multiples to limit the voltage at several points in a circuit (Figure 13).
Th3
Th1
Th1
Th2
Figure 12. TWO POINT PROTECTION
Figure 13. MULTI-POINT PROTECTION
In Figure 12, protector Th1 limits the maximum voltage between the two conductors to ±V(BO). This
configuration is normally used to protect circuits without a ground reference, such as modems. In Figure 13,
protectors Th2 and Th3 limit the maximum voltage between each conductor and ground to the ±V(BO) of the
individual protector. Protector Th1 limits the maximum voltage between the two conductors to its ±V(BO)
value. If the equipment being protected has all its vulnerable components connected between the conductors
and ground, then protector Th1 is not required.
impulse testing
To verify the withstand capability and safety of the equipment, standards require that the equipment is tested
with various impulse wave forms. The table below shows some common values.
STANDARD
GR-1089-CORE
PEAK VOLTAGE
VOLTAGE
PEAK CURRENT
CURRENT
TISP4xxxM3
SERIES
SETTING
WAVE FORM
VALUE
WAVE FORM
25 °C RATING
RESISTANCE
Ω
V
µs
A
µs
A
2500
2/10
500
2/10
300
1000
10/1000
100
10/1000
50
11
1500
10/160
200
10/160
120
FCC Part 68
800
10/560
100
10/560
75
3
(March 1998)
1500
9/720 †
37.5
5/320 †
100
0
1000
9/720 †
25
5/320 †
100
0
I3124
1500
0.5/700
37.5
0.2/310
100
0
5/310
100
0
ITU-T K20/K21
1500
4000
10/700
37.5
100
2x5.6
† FCC Part 68 terminology for the waveforms produced by the ITU-T recommendation K21 10/700 impulse generator
If the impulse generator current exceeds the protectors current rating then a series resistance can be used to
reduce the current to the protectors rated value and so prevent possible failure. The required value of series
resistance for a given waveform is given by the following calculations. First, the minimum total circuit
impedance is found by dividing the impulse generators peak voltage by the protectors rated current. The
impulse generators fictive impedance (generators peak voltage divided by peak short circuit current) is then
subtracted from the minimum total circuit impedance to give the required value of series resistance.
For the FCC Part 68 10/560 waveform the following values result. The minimum total circuit impedance is
800/75 = 10.7 Ω and the generators fictive impedance is 800/100 = 8 Ω. This gives a minimum series
resistance value of 10.7 - 8 = 2.7 Ω. After allowing for tolerance, a 3 Ω ±10% resistor would be suitable. The
10/160 waveform needs a standard resistor value of 5.6 Ω per conductor. These would be R1a and R1b in
PRODUCT
8
INFORMATION
TISP4070M3LM THRU TISP4095M3LM, TISP4125M3LM THRU TISP4220M3LM,
TISP4240M3LM THRU TISP4400M3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED APRIL 1999
Figure 15 and Figure 16. FCC Part 68 allows the equipment to be non-operational after the 10/160 (conductor
to ground) and 10/560 (inter-conductor) impulses. The series resistor value may be reduced to zero to pass
FCC Part 68 in a non-operational mode e.g. Figure 14. In some cases the equipment will require verification
over a temperature range. By using the rated waveform values from Figure 11, the appropriate series resistor
value can be calculated for ambient temperatures in the range of -40 °C to 85 °C.
a.c. power testing
The protector can withstand currents applied for times not exceeding those shown in Figure 8. Currents that
exceed these times must be terminated or reduced to avoid protector failure. Fuses, PTC (Positive
Temperature Coefficient) resistors and fusible resistors are overcurrent protection devices which can be used
to reduce the current flow. Protective fuses may range from a few hundred milliamperes to one ampere. In
some cases it may be necessary to add some extra series resistance to prevent the fuse opening during
impulse testing. The current versus time characteristic of the overcurrent protector must be below the line
shown in Figure 8. In some cases there may be a further time limit imposed by the test standard (e.g. UL
1459 wiring simulator failure).
capacitance
The protector characteristic off-state capacitance values are given for d.c. bias voltage, VD, values of 0, -1 V,
-2 V and -50 V. Where possible values are also given for -100 V. Values for other voltages may be calculated
by multiplying the VD = 0 capacitance value by the factor given in Figure 6. Up to 10 MHz the capacitance is
essentially independent of frequency. Above 10 MHz the effective capacitance is strongly dependent on
connection inductance. In many applications, such as Figure 15 and Figure 17, the typical conductor bias
voltages will be about -2 V and -50 V. Figure 7 shows the differential (line unbalance) capacitance caused by
biasing one protector at -2 V and the other at -50 V.
normal system voltage levels
The protector should not clip or limit the voltages that occur in normal system operation. For unusual
conditions, such as ringing without the line connected, some degree of clipping is permissible. Under this
condition about 10 V of clipping is normally possible without activating the ring trip circuit.
Figure 10 allows the calculation of the protector VDRM value at temperatures below 25 °C. The calculated
value should not be less than the maximum normal system voltages. The TISP4260M3LM, with a VDRM of
200 V, can be used for the protection of ring generators producing 100 V rms of ring on a battery voltage of
-58 V (Th2 and Th3 in Figure 17). The peak ring voltage will be 58 + 1.414*100 = 199.4 V. However, this is the
open circuit voltage and the connection of the line and its equipment will reduce the peak voltage. In the
extreme case of an unconnected line, clipping the peak voltage to 190 V should not activate the ring trip. This
level of clipping would occur at the temperature when the VDRM has reduced to 190/200 = 0.95 of its 25 °C
value. Figure 10 shows that this condition will occur at an ambient temperature of -28 °C. In this example, the
TISP4260M3LM will allow normal equipment operation provided that the minimum expected ambient
temperature does not fall below -28 °C.
JESD51 thermal measurement method
To standardise thermal measurements, the EIA (Electronic Industries Alliance) has created the JESD51
standard. Part 2 of the standard (JESD51-2, 1995) describes the test environment. This is a 0.0283 m3 (1 ft3)
cube which contains the test PCB (Printed Circuit Board) horizontally mounted at the centre. Part 3 of the
standard (JESD51-3, 1996) defines two test PCBs for surface mount components; one for packages smaller
than 27 mm on a side and the other for packages up to 48 mm. The LM package measurements used the
smaller 76.2 mm x 114.3 mm (3.0 “ x 4.5 “) PCB. The JESD51-3 PCBs are designed to have low effective
thermal conductivity (high thermal resistance) and represent a worse case condition. The PCBs used in the
majority of applications will achieve lower values of thermal resistance and so can dissipate higher power
levels than indicated by the JESD51 values.
PRODUCT
INFORMATION
9
TISP4070M3LM THRU TISP4095M3LM, TISP4125M3LM THRU TISP4220M3LM,
TISP4240M3LM THRU TISP4400M3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED APRIL 1999
typical circuits
TIP
WIRE
MODEM
FUSE
TIP
WIRE
RING DETECTOR
R1a
Th3
HOOK SWITCH
TISP4350
OR
TISP4400
RING
WIRE
PROTECTED
EQUIPMENT
Th1
D.C. SINK
Th2
SIGNAL
AI6XBM
RING
WIRE
Figure 14. MODEM INTER-WIRE PROTECTION
E.G. LINE CARD
R1b
AI6XBK
Figure 15. PROTECTION MODULE
R1a
Th3
SIGNAL
Th1
Th2
R1b
AI6XBL
D.C.
Figure 16. ISDN PROTECTION
OVERCURRENT
PROTECTION
TIP
WIRE
RING/TEST
PROTECTION
TEST
RELAY
RING
RELAY
SLIC
RELAY
S3a
R1a
Th3
S1a
SLIC
PROTECTION
Th4
S2a
SLIC
Th1
Th2
RING
WIRE
Th5
R1b
S3b
S1b
S2b
TISP6xxxx,
TISPPBLx,
½TISP6NTP2
C1
220 nF
TEST
EQUIPMENT
RING
GENERATOR
Figure 17. LINE CARD RING/TEST PROTECTION
PRODUCT
10
INFORMATION
VBAT
AI6XBJ
TISP4070M3LM THRU TISP4095M3LM, TISP4125M3LM THRU TISP4220M3LM,
TISP4240M3LM THRU TISP4400M3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED APRIL 1999
MECHANICAL DATA
device symbolization code
Devices will be coded as below.
DEVICE
SYMOBLIZATION
CODE
TISP4070M3
4070M3
TISP4080M3
4080M3
TISP4095M3
4095M3
TISP4125M3
4125M3
TISP4145M3
4145M3
TISP4165M3
4165M3
TISP4180M3
4180M3
TISP4220M3
4220M3
TISP4240M3
4240M3
TISP4260M3
4260M3
TISP4300M3
4300M3
TISP4350M3
4350M3
TISP4400M3
4400M3
carrier information
Devices are shipped in one of the carriers below. A reel contains 2 000 devices.
PRODUCT
PACKAGE TYPE
CARRIER
Straight Lead DO-92
Bulk Pack
ORDER #
TISP4xxxM3LM
Straight Lead DO-92
Tape and Reeled TISP4xxxM3LMR
Formed Lead DO-92
Tape and Reeled TISP4xxxM3LMFR
INFORMATION
11
TISP4070M3LM THRU TISP4095M3LM, TISP4125M3LM THRU TISP4220M3LM,
TISP4240M3LM THRU TISP4400M3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED APRIL 1999
MECHANICAL DATA
LM002 (DO-92)
2-pin cylindrical plastic package
This single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic
compound. The compound will withstand soldering temperature with no deformation, and circuit performance
characteristics will remain stable when operated in high humidity conditions. Leads require no additional
cleaning or processing when used in soldered assembly.
.
LM002 Package (DO-92)
5,21
4,44
3,43 MIN.
4,19
3,17
2,67
2,03
2,67
2,03
5,34
4,32
2,20 MAX.
A
2
2
12,7 MIN.
0,56
0,40
1
3
3
1
VIEW A
0,41
0,35
1,40
1,14
2,67
2,41
ALL LINEAR DIMENSIONS IN MILLIMETERS
MD4XARA
PRODUCT
12
INFORMATION
TISP4070M3LM THRU TISP4095M3LM, TISP4125M3LM THRU TISP4220M3LM,
TISP4240M3LM THRU TISP4400M3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED APRIL 1999
MECHANICAL DATA
LM002 (DO-92) - Formed Leads Version
2-pin cylindrical plastic package
This single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic
compound. The compound will withstand soldering temperature with no deformation, and circuit performance
characteristics will remain stable when operated in high humidity conditions. Leads require no additional
cleaning or processing when used in soldered assembly.
LMF002 (DO-92) - Formed Leads Version of LM002
5,21
4,44
3,43 MIN.
4,19
3,17
2,67
2,03
2,67
2,03
5,34
4,32
2,20 MAX.
4,00 MAX.
A
2
2
0,56
0,40
1
3
3
1
VIEW A
2,90
2,40
0,41
0,35
2,90
2,40
ALL LINEAR DIMENSIONS IN MILLIMETERS
MD4XASA
PRODUCT
INFORMATION
13
TISP4070M3LM THRU TISP4095M3LM, TISP4125M3LM THRU TISP4220M3LM,
TISP4240M3LM THRU TISP4400M3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED APRIL 1999
MECHANICAL DATA
tape dimensions
LM002 Package (Straight Lead DO-92) Tape
LM002 Tape Dimensions Conform to
the Requirements of EIA-468-B
13,70
11,70
Body Indent Visible
32,00
23,00
0,50
0,00
2,50 MIN.
27,68
17,66
11,00
8,50
9,75
8,50
3,14
2,14
19,00
5,50
19,00
17,50
4,30
Adhesive Tape on Reverse
Side - Shown Dashed
VIEW A
φ 3,70
5,48
4,68
13,00
12,40
Tape Section
Shown in
View A
Flat of DO-92 Body
Towards Reel Axis
Direction of Feed
ALL LINEAR DIMENSIONS IN MILLIMETERS
MD4XAPC
PRODUCT
14
INFORMATION
TISP4070M3LM THRU TISP4095M3LM, TISP4125M3LM THRU TISP4220M3LM,
TISP4240M3LM THRU TISP4400M3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED APRIL 1999
MECHANICAL DATA
tape dimensions
LMF002 Package (Formed Lead DO-92) Tape
LMF002 Tape Dimensions Conform to
the Requirements of EIA-468-B
13,70
11,70
Body Indent Visible
32,00
23,00
27,68
17,66
0,50
0,00
2,50 MIN.
16,53
15,50
11,00
8,50
9,75
8,50
5,28
4,88
Adhesive Tape on Reverse
Side - Shown Dashed
19,00
5,50
19,00
17,50
4,30
φ 3,70
VIEW A
4,21
3,41
13,00
12,40
Tape Section
Shown in
View A
Flat of DO-92 Body
Towards Reel Axis
Direction of Feed
ALL LINEAR DIMENSIONS IN MILLIMETERS
MD4XAQC
PRODUCT
INFORMATION
15
TISP4070M3LM THRU TISP4095M3LM, TISP4125M3LM THRU TISP4220M3LM,
TISP4240M3LM THRU TISP4400M3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED APRIL 1999
IMPORTANT NOTICE
Power Innovations Limited (PI) reserves the right to make changes to its products or to discontinue any semiconductor product
or service without notice, and advises its customers to verify, before placing orders, that the information being relied on is
current.
PI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with
PI's standard warranty. Testing and other quality control techniques are utilized to the extent PI deems necessary to support this
warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government
requirements.
PI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents
or services described herein. Nor is any license, either express or implied, granted under any patent right, copyright, design
right, or other intellectual property right of PI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used.
PI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORISED, OR WARRANTED TO BE SUITABLE
FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS.
Copyright © 1999, Power Innovations Limited
PRODUCT
16
INFORMATION