RF3105 Preliminary 2 3V 900MHZ LINEAR AMPLIFIER MODULE Typical Applications • 3V CDMA/AMPS Cellular Handsets • Spread-Spectrum Systems POWER AMPLIFIERS 2 Product Description The RF3105 is a high-power, high-efficiency linear amplifier IC targeting 3V handheld systems. The device is manufactured on an advanced Gallium Arsenide Heterojunction Bipolar Transistor (HBT) process, and has been designed for use as the final RF amplifier in dual-mode 3V CDMA/AMPS handheld digital cellular equipment, spread-spectrum systems, and other applications in the 824MHz to 849MHz band. The RF3105 has a digital bias control voltage for low current in standby mode. The device is self-contained with 50Ω input and output that is matched to obtain optimum power, efficiency, and linearity characteristics. The module is an ultra-small 6mmx6mm land grid array with backside ground. Optimum Technology Matching® Applied ! Si BJT Si Bi-CMOS GaAs HBT GaAs MESFET SiGe HBT Si CMOS 3.000 0.100 0.800 sq typ 1.700 4.390 6.0 sq 2.500 0.100 NOTE: Nominal thickness, 1.55 mm. 0.600 Dimensions in mm. Package Style: LGM (6mmx6mm) Features • Input/Output Internally Matched @ 50Ω VCC1 1 7 GND • Single 3V Supply • 29dBm Linear Output Power • 28dB Linear Gain 2 VREG 3 4 6 RF OUT 5 VCC2 VMODE RF IN • 35% Linear Efficiency Ordering Information RF3105 RF3105 PCBA Functional Block Diagram Rev A1 001030 3V 900MHz Linear Amplifier Module Fully Assembled Evaluation Board RF Micro Devices, Inc. 7625 Thorndike Road Greensboro, NC 27409, USA Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com 2-253 RF3105 Preliminary Absolute Maximum Ratings Parameter POWER AMPLIFIERS 2 Rating Unit Supply Voltage (RF off) Supply Voltage (POUT ≤31dBm) Control Voltage (VREG) +8.0 +4.5 +4.2 VDC VDC VDC Input RF Power Mode Voltage (VMODE) Operating Ambient Temperature Storage Temperature +10 +3.5 -30 to +85 -30 to +150 dBm VDC °C °C Parameter Specification Min. Typ. Max. Caution! ESD sensitive device. RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s). Unit T=25°C Ambient, VCC =3.4V, VREG =2.75V, VMODE =0, Freq=824MHz to 849MHz unless otherwise specified Overall Frequency Range Linear Gain Second Harmonic Third Harmonic Maximum Linear Output Power (CDMA Modulation) Total Linear Efficiency Adjacent Channel Power Rejection Condition 824 27 29 28 29 32 35 -58 <2:1 Input VSWR Output VSWR 849 32.5 -30 -40 -44 % dBc ACPR @ 885kHz -56 dBc ACPR @1980kHz 10:1 6:1 8 -89 Noise Figure Noise Power MHz dB dBc dBc dBm No damage. No oscillations. dB dBm/30kHz At 45MHz offset. FM Mode Frequency Range Second Harmonic Third Harmonic Max CW Output Power Total Efficiency (AMPS) Large Signal Gain Input VSWR Output VSWR 824 31.5 45 849 -30 -40 32 27 MHz dBc dBc dBm % dB <2:1 10:1 6:1 VCC =3.4V, POUT =31.5dBm No damage. No oscillations. Power Supply Power Supply Voltage Quiescent Current VREG Current Turn On/Off time Total Current (Power down) VREG “Low” Voltage VREG “High” Voltage 2-254 3.2 2.65 3.4 100 0 2.75 4.5 8 40 10 0.2 2.85 V mA mA µs µA V V Pin 3, VREG =2.75V VREG =Low Rev A1 001030 RF3105 Preliminary Function VCC1 2 3 4 RF IN VREG VMODE 5 VCC2 6 RF OUT 7 GND Pkg Base GND Rev A1 001030 Description Interface Schematic First stage collector supply. A low frequency decoupling capacitor (e.g., 4.7µF) is required. RF input internally matched to 50Ω. This input is internally AC coupled. Regulated voltage supply for amplifier bias. For nominal operation, VMODE is set to LOW. When set HIGH: VMODE will increase the bias current by approximately 50%; and, large signal gain is increased by approximately 1.5dB. Output stage collector supply. A low frequency decoupling capacitor (e.g., 4.7µF) is required. RF output internally matched to 50Ω. This output is internally AC coupled. Ground connection. Connect to package base ground. For best performance, keep traces physically short and connect immediately to ground plane. Ground connection. The backside of the package should be soldered to a top side ground pad which is connected to the ground plane with multiple vias. The pad should have a short thermal path to the ground plane. 2 POWER AMPLIFIERS Pin 1 2-255 RF3105 Preliminary Evaluation Board Schematic (Download Bill of Materials from www.rfmd.com.) Er = 4.7 H = 14 mils t = 1 mil 2 POWER AMPLIFIERS C1 4.7 µF VCC1 J1 RF IN 1 7 2 6 50 Ω µstrip VREG 50 Ω µstrip 3 C3 4.7 µF 4 5 C2 4.7 µF 3105400- VMODE 2-256 J2 RF OUT VCC2 VCC = 3.4 V VREG = 2.75 V VMODE = 0 Rev A1 001030 RF3105 Preliminary Evaluation Board Layout Board Size 2.0” x 2.0” Board Thickness 0.028”, Board Material FR-4, Multi-Layer Assembly Top POWER AMPLIFIERS 2 Inner 1 Rev A1 001030 Back 2-257 RF3105 Preliminary POWER AMPLIFIERS 2 2-258 Rev A1 001030