ULN2003V12 www.ti.com SLRS060A – MAY 2012 – REVISED JUNE 2012 7-Channel Relay and Inductive Load Sink Driver Check for Samples: ULN2003V12 FEATURES 1 • • • • • • • • • • • • (1) 7-Channel High Current Sink Drivers Supports up to 20V Ouput Pull-up Voltage Supports Wide Range of Low and High Voltage Relays and Inductive Coils Low Output VOL of 0.6V (Typical) with – 100mA (Typical) Current Sink per Channel at 3.3V Logic Input(1) – 140mA (Typical) Current Sink per Channel at 5.0V Logic Input(1) Compatible to 3.3V and 5.0V Micro-controllers and Logic Interface Internal Free-wheeling Diodes for Inductive Kick-back Protection Input Pull-down Resistors Allows Tri-stating the Input Driver Input RC-Snubber to Eliminate Spurious Operation in Noisy Environment Low Input and Output Leakage Currents Easy to use Parallel Interface ESD Protection Exceeds JESD 22 – 2kV HBM, 500V CDM Available in 16-pin SOIC and TSSOP Packages Total current sink may be limited by the internal junction temperature, absolute maximum current levels etc - refer to the Electrical Specifications section for details. APPLICATIONS • • • Relay and Inductive Load Driver in Various Telecom, Consumer, and Industrial Applications Lamp and LED Displays Logic Level Shifter DESCRIPTION The ULN2003V12 is a low power upgrade of TI’s popular ULN2003 family of 7-channel Darlington transistor array. The ULN2003V12 sink driver features 7 low output impedance drivers that minimize on-chip power dissipation. When driving a typical 12V relay coil a ULN2003V12 will dissipate up to 12 times lower power than an equivalent ULN2003A. The ULN2003V12 driver is pin-to-pin compatible with ULN2003 family of devices in similar packages. The ULN2003V12 supports 3.3V to 5V CMOS logic input interface thus making it compatible to a wide range of micro-controllers and other logic interfaces. The ULN2003V12 features an improved input interface that minimizes the input DC current drawn from the external drivers. The ULN2003V12 features an input RC snubber that greatly improves its performance in noisy operating conditions. The ULN2003V12 channel inputs feature an internal input pull-down resistor thus allowing input logic to be tristated. The ULN2003V12 also supports other logic input levels, e.g. TTL and 1.8V; see typical characteristics section for details. As shown in the , each output of the ULN2003V12 features an internal free-wheeling diode connected in a common-cathode configuration at the COM pin. The ULN2003V12 provides flexibility of increasing current sink capability through combining several adjacent channels in parallel. Under typical conditions the ULN2003V12 can support up to 1.0A of load current when all 7-channels are connected in parallel. The ULN2003V12 can also be used in a variety of other applications requiring a sink drivers. The ULN2003V12 is available in 16-pin SOIC and 16-pin TSSOP packages. Table 1. ULN2003V12 Function Table(1) Functional Diagram INPUT (IN1 – IN7) OUTPUT (OUT1–OUT7) IN1 1 16 OUT1 L H+(2) IN2 2 15 OUT2 H L IN3 3 14 OUT3 Z H+(2) IN4 4 13 OUT4 IN5 5 12 OUT5 (1) L = Low-level (GND); H= High-level; Z= High-impedance; IN6 6 11 OUT6 (2) H+ = Pull-up-level IN7 7 10 OUT7 GND 8 9 COM ULN2003V12 SOIC/TSSOP 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2012, Texas Instruments Incorporated ULN2003V12 SLRS060A – MAY 2012 – REVISED JUNE 2012 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1) TA –40°C to 85°C (1) PART NUMBER PACKAGE TOP-SIDE MARKING ULN2003V12DR 16-Pin SOIC Reel of 2500 U2003V12 ULN2003V12PWR 16-Pin TSSOP Reel of 2000 U2003V12 For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. ABSOLUTE MAXIMUM RATINGS (1) Specified at TJ = –40°C to 125°C unless otherwise noted. VALUE VIN Pins IN1- IN7 to GND voltage VOUT Pins OUT1 – OUT7 to GND voltage VCOM Pin COM to GND voltage IGND PD MAX –0.3 5.5 V 20 V 20 V Max GND-pin continuous current (100ºC < TJ < +125°C) 700 mA Max GND-pin continuous current (TJ < +100°C) 1.0 A 16 Pin - SOIC 0.86 W 16 Pin - TSSOP 0.68 W 2 kV Total device power dissipation at TA = 85°C ESD Rating – HBM ESD UNIT MIN 500 V TA Operating free-air ambient temperature range –40 85 °C TJ Operating virtual junction temperature –55 150 °C Tstg Storage temperature range –55 150 °C (1) ESD Rating – CDM Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. DISSIPATION RATINGS (1) (2) PACKAGE θJC θJA (3) DERATING FACTOR ABOVE TA = 25ºC TA < 25°C TA = 70°C TA = 85°C High-K 16-Pin SOIC 46°C/W 75°C/W 13.33 mW/ºC 1.66 W 1.06 W 0.86 W High-K 16-Pin TSSOP 49°C/W 95°C/W 10.44 mW/ºC 1.31 W 0.84 W 0.68 W BOARD (1) (2) (3) Maximum dissipation values for retaining device junction temperature of 150°C Refer to TI’s design support web page at www.ti.com/thermal for improving device thermal performance Operating at the absolute TJ-max of 150°C can affect reliability– for higher reliability it is recommended to ensure TJ < 125°C RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) PARAMETER MIN TYP MAX UNIT VOUT Channel off-state output pull-up voltage 16 V VCOM COM pin voltage 16 V VINx = 3.3V 100 (1) VINx = 5.0V 140 (1) IOUT(ON) Per channel continuous sink current TA Operating ambient temperature –40 85 ºC TJ Operating junction temperature –40 125 ºC (1) 2 mA 1) Refer to ABSOLUTE MAXIMUM RATINGS for TJ dependent absolute maximum GND-pin current Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): ULN2003V12 ULN2003V12 www.ti.com SLRS060A – MAY 2012 – REVISED JUNE 2012 ELECTRICAL CHARACTERISTICS Specified over the recommended junction temperature range TJ = –40°C to 125°C unless otherwise noted. Typical values are at TJ = 25°C. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT INPUTS IN1 THROUGH IN7 PARAMETERS VI(ON) IN1–IN7 logic high input voltage Vpull-up = 3.3 V, Rpull-up = 1 kΩ, IOUTX = 3.2 mA VI(OFF) IN1–IN7 logic low input voltage Vpull-up = 3.3 V, Rpull-up = 1 kΩ, (IOUTX < 20 µA) II(ON) IN1–IN7 ON state input current Vpull-up = 12 V, VINx = 3.3 V II(OFF) IN1–IN7 OFF state input leakage Vpull-up = 12 V, VINx = 0 V 1.65 V 0.6 12 25 uA 250 nA OUTPUTS OUT1 THROUGH OUT7 PARAMETERS VINX = 3.3 V, IOUTX = 20 mA 0.12 0.15 VINX = 3.3 V, IOUTX = 100 mA 0.60 0.75 VINX = 5.0 V, IOUTX = 20 mA 0.09 0.11 0.60 0.75 VOL(VCE-SAT) OUT1–OUT7 low-level output voltage IOUT(ON) OUT1–OUT7 ON-state continuous current (1) (2) at VOUTX = 0.6V VINX = 3.3 V, VOUTX = 0.6 V 80 100 VINX = 5.0 V, VOUTX = 0.6 V 95 140 IOUT(OFF)(ICEX) OUT1–OUT7 OFF-state leakage current VINX = 0 V, VOUTX = VCOM = 16 V VINX = 5.0 V, IOUTX = 140 mA V mA 0.5 µA ns SWITCHING PARAMETERS (3) (4) tPHL OUT1–OUT7 logic high propagation delay VINX = 3.3V, Vpull-up = 12 V, Rpull-up = 1 kΩ 50 tPLH OUT1–OUT7 logic low propagation delay VINX = 3.3V, Vpull-up = 12 V, Rpull-up = 1 kΩ 121 RPD IN1–IN7 input pull-down Resistance ζ IN1–IN7 Input filter time constant COUT OUT1–OUT7 output capacitance 210k VINX = 3.3 V, VOUTX = 0.4 V 300k ns 390k Ω 9 ns 15 pF FREE-WHEELING DIODE PARAMETERS (5) (4) VF Forward voltage drop IF-peak Diode peak forward current (1) (2) (3) (4) (5) IF-peak = 140 mA, VF = VOUTx – VCOM 1.2 V 140 mA The typical continuous current rating is limited by VOL= 0.6V. Whereas, absolute maximum operating continuous current may be limited by the Thermal Performance parameters listed in the Dissipation Rating Table and other Reliability parameters listed in the Recommended Operating Conditions Table. Refer to the Absolute Maximum Ratings Table for TJ dependent absolute maximum GND-pin current. Rise and Fall propagation delays, tPHL and tPLH, are measured between 50% values of the input and the corresponding output signal amplitude transition. Guaranteed by design only. Not rated for continuous current operation – for higher reliability use an external freewheeling diode for inductive loads resulting in more than specified maximum free-wheeling. diode peak current across various temperature conditions Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): ULN2003V12 3 ULN2003V12 SLRS060A – MAY 2012 – REVISED JUNE 2012 www.ti.com DEVICE INFORMATION IN1 1 16 OUT1 IN2 2 15 OUT2 IN3 3 14 OUT3 COM RIN = 3 kW INx Array of Transistors OUTx RPD = 300 kW IN4 4 IN5 CPD 16-Pin SOIC/TSSOP 13 OUT4 5 12 OUT5 IN6 6 11 OUT6 IN7 7 10 OUT7 GND 8 9 COM CIN = 9 pF COUT GND Figure 2. Channel Block Diagram Figure 1. ULN2003V12 PINOUT ULN2003V12 PIN DESCRIPTION NAME PIN NUMBER IN1 – IN7 16-SOIC 16-TSSOP DESCRIPTION 1–7 1–7 GND 8 8 Ground Reference Pin COM 9 9 Internal Free-Wheeling Diode Common Cathode Pin 10–16 10–16 OUT7 – OUT1 4 Logic Input Pins IN1 through IN7 Channel Output Pins OUT7 through OUT1 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): ULN2003V12 ULN2003V12 www.ti.com SLRS060A – MAY 2012 – REVISED JUNE 2012 APPLICATION INFORMATION TTL and other Logic Inputs ULN2003V12 input interface is specified for standard 3V and 5V CMOS logic interface. However, ULN2003V12 input interface may support other logic input levels as well. Refer to Figure 10 and Figure 11 to establish VOL and the corresponding typical load current levels for various input voltage ranges. Application Information section shows an implementation to drive 1.8V relays using ULN2003V12. Input RC Snubber ULN2003V12 features an input RC snubber that helps prevent spurious switching in noisy environment. Connect an external 1kΩ to 5kΩ resistor in series with the input to further enhance ULN2003V12’s noise tolerance. High-impedance Input Drivers ULN2003V12 features a 300kΩ input pull-down resistor. The presence of this resistor allows the input drivers to be tri-stated. When a high-impedance driver is connected to a channel input the ULN2003V12 detects the channel input as a low level input and remains in the OFF position. The input RC snubber helps improve noise tolerance when input drivers are in the high-impedance state. On-chip Power Dissipation Use the below equation to calculate ULN2003V12 on-chip power dissipation PD: N PD = å VOLi ´ ILi i=1 Where: N is the number of channels active together. VOLi is the OUTi pin voltage for the load current ILi. (1) Thermal Reliability It is recommended to limit ULN2003V12 IC’s die junction temperature to less than 125°C. The IC junction temperature is directly proportional to the on-chip power dissipation. Use the following equation to calculate the maximum allowable on-chip power dissipation for a target IC junction temperature: PD(MAX) = (T J(MAX) - TA ) qJA Where: TJ(MAX) is the target maximum junction temperature. TA is the operating ambient temperature. θJA is the package junction to ambient thermal resistance. (2) Improving Package Thermal Performance The package θJA value under standard conditions on a High-K board is listed in the DISSIPATION RATINGS. θJA value depends on the PC board layout. An external heat sink and/or a cooling mechanism, like a cold air fan, can help reduce θJA and thus improve device thermal capabilities. Refer to TI’s design support web page at www.ti.com/thermal for a general guidance on improving device thermal performance. Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): ULN2003V12 5 ULN2003V12 SLRS060A – MAY 2012 – REVISED JUNE 2012 www.ti.com Application Examples Inverting Logic Level Shifter To use ULN2003V12 as an open-collector or an open-drain inverting logic level shifter configure the device as shown in Figure 3. The ULN2003V12’s each channel input and output logic levels can also be set independently. When using different channel input and output logic voltages connect the ULN2003V12 COM pin to the maximum voltage. VSUP Level Shift Supply(Up to 20V) Logic Inputs (1.8V to 5V) ULN2003V12 IN1 OUT1 IN2 OUT2 IN3 OUT3 IN4 OUT4 IN5 OUT5 IN6 OUT6 IN7 OUT7 GND OUT1_VSUP OUT2_VSUP OUT3_VSUP OUT4_VSUP OUT5_VSUP OUT6_VSUP OUT7_VSUP COM Figure 3. ULN2003V12 as Inverting Logic Level Shifter 6 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): ULN2003V12 ULN2003V12 www.ti.com SLRS060A – MAY 2012 – REVISED JUNE 2012 Max Supply Selector Figure 4 implements a max supply selector along with a 4-channel logic level shifter using a single ULN20003V12. This setup configures ULN2003V12’s channel clamp diodes OUT5 – OUT7 in a diode-OR configuration and thus the maximum supply among VSUP1, VSUP2 and VSUP3 becomes available at the COM pin. The maximum supply is then used as a pull-up voltage for level shifters. Limit the net GND pin current to less than 100mA DC to ensure reliability of the conducting diode. The unconnected inputs IN5-IN7 are pulled to GND potential through 300kΩ internal pull-down resistor. VSUP _MAX (Up to 20V) Logic Inputs (1.8V to 5V) ULN2003V12 IN1 OUT1 IN2 OUT2 IN3 OUT3 IN4 OUT4 IN5 OUT5 IN6 OUT6 IN7 OUT7 GND VSUP3 VSUP2 VSUP1 VSUP_MAX COM VSUP_MAX = Max of {VSUP1, VSUP2, VSUP3} – VF VF = Diode forward drop@ Total ground-pin current Figure 4. ULN2003V12 as Max Supply Selector Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): ULN2003V12 7 ULN2003V12 SLRS060A – MAY 2012 – REVISED JUNE 2012 www.ti.com Constant Current Generation When configured as per Figure 5 the ULN2003V12 outputs OUT1-OUT6 act as independent constant current sources. The current flowing through the resistor R1 is copied on all other channels. To increase the current sourcing connect several output channels in parallel. To ensure best current copying set voltage drop across connected load such that VOUTx matches to VOUT7. VSUP VIN (Up to 5.5V) VSUP LED Supply(Up to 20V) IREF7 R1 = (VIN-VOUT7)/IREF7 Use plot to estimate VOUT7 for the desired IREF7 R1 OUT7 ULN2003V12 IN1 OUT 1 IN2 OUT 2 IN3 OUT 3 IN4 OUT 4 IN5 OUT 5 IN6 OUT 6 IN7 OUT 7 GND OUT 7 VSUP COM Figure 5. ULN2003V12 as a Constant Current Driver Figure 6. ULN2003V12 VOUT vs IREF 8 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): ULN2003V12 ULN2003V12 www.ti.com SLRS060A – MAY 2012 – REVISED JUNE 2012 Unipolar Stepper Motor Driver Figure 7 shows an implementation of ULN2003V12 for driving a uniploar stepper motor. The unconnected input channels can be used for other functions. When an input pin is left open the internal 300kΩ pull down resistor pulls the respective input pin to GND potential. For higher noise immunity use an external short across an unconnected input and GND pins. Motor Motor Supply(Up to 20V) VSUP Motor Control Pulses (3V to 5V) ULN2003V12 IN1 OUT1 IN2 OUT2 IN3 OUT3 IN4 OUT4 IN5 OUT5 IN6 OUT6 IN7 OUT7 GND Phase_A Phase_C Phase_B Phase_D VSUP COM Figure 7. ULN2003V12 as a Stepper Motor Driver Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): ULN2003V12 9 ULN2003V12 SLRS060A – MAY 2012 – REVISED JUNE 2012 www.ti.com NOR Logic Driver Figure 8 shows a NOR Logic driver implementation using ULN2003V12. The output channels sharing a common pull-up resistor implement a logic NOR of the respective channel inputs. The LEDs connected to outputs OUT5OUT7 light up when any of the inputs IN5-IN7 is logic-high ( > VIH). VSUP (Up to 20V) Logic Inputs (1.8V to 5V) ULN2003V12 IN1 OUT1 IN2 OUT2 IN3 OUT3 IN4 OUT4 IN5 OUT5 IN1 NOR IN2 IN3 NOR IN4 VSUP IN1 NOR IN2 NOR IN3 IN6 OUT6 IN7 OUT7 GND VSUP COM Figure 8. ULN2003V12 as a NOR driver 10 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): ULN2003V12 ULN2003V12 www.ti.com SLRS060A – MAY 2012 – REVISED JUNE 2012 TYPICAL CHARACTERISTICS TA = +25ºC Figure 9. Load Current 1-Channel; VOL=0.6V Figure 10. Load Current 7-Channels in parallel; VOL=0.6V Figure 11. Freewheeling Diode VF versus IF Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): ULN2003V12 11 PACKAGE OPTION ADDENDUM www.ti.com 13-Jun-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) ULN2003V12DR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM ULN2003V12PWR ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 13-Jun-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device ULN2003V12PWR Package Package Pins Type Drawing TSSOP PW 16 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2000 330.0 12.4 Pack Materials-Page 1 7.0 B0 (mm) K0 (mm) P1 (mm) 5.6 1.6 8.0 W Pin1 (mm) Quadrant 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 13-Jun-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ULN2003V12PWR TSSOP PW 16 2000 364.0 364.0 27.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. 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