SLUS482B - APRIL 2001 − REVISED DECEMBER 2004 D Controls Boost Preregulator to Near-Unity D D D D D D D D D D D D, DW, N, and PW PACKAGES (TOP VIEW) Power Factor World Wide Line Operation Over-Voltage Protection Accurate Power Limiting Average Current Mode Control Improved Noise Immunity Improved Feed-Forward Line Regulation Leading Edge Modulation 150-µA Typical Start-Up Current Low-Power BiCMOS Operation 10.8-V to 17-V Operation Programmable Output Voltage (Tracking Boost Topology) GND PKLMT CAOUT CAI MOUT IAC VAOUT VFF 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 DRVOUT VCC CT VAI RT VSENSE OVP/EN VREF description The UCC2819/UCC3819 provides all the functions necessary for active power factor corrected preregulators. The controller achieves near unity power factor by shaping the ac-input line current waveform to correspond to that of the ac-input line voltage. Average current mode control maintains stable, low distortion sinusoidal line current. Designed in Texas Instrument’s BiCMOS process, the UCC3819 offers new features such as lower start-up current, lower power dissipation, overvoltage protection, a shunt UVLO detect circuitry and a leading-edge modulation technique to reduce ripple current in the bulk capacitor. The UCC3819 allows the output voltage to be programmed by bringing out the error amplifier noninverting input. Available in the 16-pin D, DW, N, and PW packages. block diagram VCC 15 OVP/EN 10 7.5 V REFERENCE 1.9 V VAOUT VSENSE 11 VAI 13 VFF ENABLE − − + 0.33 V VOLTAGE ERROR AMP ZERO POWER VCC + X ÷ MULT X CURRENT AMP 8.0 V − + X2 8 − VREF UVLO 10.2 V/9.7 V + 7 9 − + OVP S Q 16 DRVOUT PWM PWM LATCH R R OSC CLK MIRROR 2:1 + − 1 GND 2 PKLMT CLK IAC 6 MOUT 5 OSCILLATOR 4 CAI 12 14 CAOUT RT 3 CT − + UDG-01009 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. ! " #$%! " &$'(#! )!%* )$#!" # ! "&%##!" &% !+% !%" %," "!$%!" "!)) -!.* )$#! &#%""/ )%" ! %#%""(. #($)% !%"!/ (( &%!%"* Copyright 2004, Texas Instruments Incorporated www.ti.com 1 SLUS482B - APRIL 2001 − REVISED DECEMBER 2004 absolute maximum ratings over operating free-air temperature (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Gate drive current, continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.2 A Gate drive current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 A Input voltage, CAI, MOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V Input voltage, PKLMT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 V Input voltage, VSENSE, OVP/EN, VAI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 V Input current, RT, IAC, PKLMT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 mA Maximum negative voltage, DRVOUT, PKLMT, MOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 W † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. AVAILABLE OPTIONS PACKAGE DEVICES TJ D PACKAGE DW PACKAGE N PACKAGE PW PACKAGE 0°C to 70°C UCC3819D UCC3819DW UCC3819N UCC3819PW −40°C to 85°C UCC2819D UCC2819DW UCC2819N UCC2819PW † The D, DW, and PW packages are available taped and reeled. Add TR suffix to device type (e.g. UCC3819DTR) to order quantities of 2500 devices per reel. electrical characteristics, TA = 0°C to 70°C for the UCC3819, −40°C to 85°C for the UCC2819, VCC = 12 V, RT = 22 kΩ, CT = 270 pF, (unless otherwise noted) supply current PARAMETER TEST CONDITIONS MIN TYP MAX UNITS 150 300 µA 2 4 6 mA MIN TYP MAX UNITS VCC turnon threshold 9.7 10.2 10.8 V VCC turnoff threshold 9.4 9.7 V UVLO hysteresis 0.3 0.5 V MIN TYP MAX 15 mV 50 200 nA 50 200 nA Supply current, off VCC = (VCC turnon threshold −0.3 V) Supply current, on VCC = 12 V, No load on DRVOUT UVLO PARAMETER TEST CONDITIONS voltage amplifier PARAMETER TEST CONDITIONS VIO VAOUT = 2.75 V, VCM = 3.75 V VAI bias current VAOUT = 2.75 V, VCM = 3.75 V VSENSE bias current CMRR VSENSE = VREF, VAOUT = 2.5 V VCM = 1 V to 7.5 V 50 70 dB Open loop gain VAOUT = 2 V to 5 V 50 90 dB High-level output voltage IL = −150 µA IL = 150 µA 5.3 5.5 5.6 V 0 50 150 mV Low-level output voltage 2 www.ti.com −15 UNITS SLUS482B - APRIL 2001 − REVISED DECEMBER 2004 electrical characteristics, TA = 0°C to 70°C for the UCC3819, −40°C to 85°C for the UCC2819, VCC = 12 V, RT = 22 kΩ, CT = 270 pF, (unless otherwise noted) over voltage protection and enable PARAMETER TEST CONDITIONS MIN TYP MAX UNITS VREF +0.48 VREF +0.50 VREF +0.52 V Hysteresis 300 500 600 mV Enable threshold 1.7 1.9 2.1 V Enable hysteresis 0.1 0.2 0.3 V MIN TYP MAX −3.5 0 2.5 mV −50 −100 nA 25 100 nA Over voltage reference current amplifier PARAMETER Input offset voltage Input bias current Input offset current Open loop gain Common-mode rejection ratio High-level output voltage Low-level output voltage Gain bandwidth product TEST CONDITIONS VCM = 0 V, VCM = 0 V, VCAOUT = 3 V VCAOUT = 3 V VCM = 0 V, VCM = 0 V, VCAOUT = 3 V VCAOUT = 2 V to 5 V VCM = 0 V to 1.5 V, IL = −120 µA VCAOUT = 3 V IL = 1 mA See Note 1 90 UNITS dB 60 80 5.6 6.5 6.8 dB V 0.1 0.2 0.5 V 2.5 MHz voltage reference PARAMETER Input voltage, (UCC3819) Input voltage, (UCC2819) Load regulation TEST CONDITIONS TA = 0°C to 70°C TA = −40°C to 85°C Line regulation IREF = 1 mA to 2 mA VCC = 10.8 V to 15 V, Short-circuit current VREF = 0 V MIN TYP MAX UNITS 7.387 7.5 7.613 V 7.369 7.5 7.631 0 See Note 2 0 V 10 mV 10 mV −20 −25 −50 mA MIN TYP MAX UNITS 85 100 115 oscillator PARAMETER Initial accuracy TEST CONDITIONS Voltage stability TA = 25°C VCC = 10.8 V to 15 V Total variation Line, temp, See Note 1 kHz −1 1 80 120 kHz % Ramp peak voltage 4.5 5 5.5 V Ramp amplitude voltage (peak to peak) 3.5 4 4.5 V NOTES: 1. Ensured by design, Not production tested. 2. Reference variation for VCC < 10.8 V is shown in Figure 2. www.ti.com 3 SLUS482B - APRIL 2001 − REVISED DECEMBER 2004 electrical characteristics, TA = 0°C to 70°C for the UCC3819, −40°C to 85°C for the UCC2819, VCC = 12 V, RT = 22 kΩ, CT = 270 pF, (unless otherwise noted) peak current limit PARAMETER TEST CONDITIONS MIN PKLMT reference voltage −15 PKLMT propagation delay 150 TYP MAX UNITS 15 mV 350 500 ns MIN TYP MAX UNITS −6 −20 µA −23 µA multiplier PARAMETER TEST CONDITIONS IMOUT, high line, low power output current, (0°C to 85°C) IAC = 500 µA, VFF = 4.7 V, VAOUT = 1.25 V 0 IMOUT, high line, low power output current, (−40°C to 85°C) IAC = 500 µA, VFF = 4.7 V, VAOUT = 1.25 V 0 IMOUT, high line, high power output current IAC = 500 µA, VFF = 4.7 V, VAOUT = 5 V −70 −90 −105 µA IMOUT, low line, low power output current IAC = 150 µA, VFF = 1.4 V, VAOUT = 1.25 V −10 −19 −50 µA IMOUT, low line, high power output current IAC = 150 µA, VFF = 1.4 V, VAOUT = 5 V −268 −300 −346 µA IMOUT, IAC limited Gain constant (K) IAC = 150 µA, IAC = 300 µA, VFF = 1.3 V, VFF = 3 V, VAOUT = 5 V −250 −300 −400 µA VAOUT = 2.5 V 0.5 1 1.5 1/V IAC = 150 µA, IAC = 500 µA, VFF = 1.4 V, VFF = 4.7 V, VAOUT = 0.25 V 0 −2 IMOUT, zero current µA VAOUT = 0.25 V 0 −2 µA IMOUT, zero current, (0°C to 85°C) IMOUT, zero current, (−40°C to 85°C) IAC = 500 µA, IAC = 500 µA, VFF = 4.7 V, VFF = 4.7 V, VAOUT = 0.5 V 0 −3 µA Power limit (IMOUT x VFF) IAC = 150 µA, VFF = 1.4 V, VAOUT = 5 V 0 −3.5 µA −375 −420 −485 µW MIN TYP MAX UNITS −140 −150 −160 µA MIN TYP MAX UNITS 5 12 VAOUT = 0.5 V feed-forward PARAMETER VFF output current TEST CONDITIONS IAC = 300 µA gate driver PARAMETER Pullup resistance TEST CONDITIONS Pulldown resistance IO = –100 mA to −200 mA IO = 100 mA Output rise time CL = 1 nF, RL = 10 Ω, Output fall time CL = 1 nF, RL = 10 Ω, VDRVOUT = 0.7 V to 9 V VDRVOUT = 9 V to 0.7 V Maximum duty cycle Minimum controlled duty cycle 93 Ω 2 10 Ω 25 50 ns 10 50 ns 95 100 % 2 % At 100 kHz zero power PARAMETER Zero power comparator threshold 4 TEST CONDITIONS Measured on VAOUT www.ti.com MIN TYP MAX UNITS 0.20 0.33 0.50 V SLUS482B - APRIL 2001 − REVISED DECEMBER 2004 pin descriptions CAI: (current amplifier noninverting input) Place a resistor between this pin and the GND side of current-sense resistor. This input and the inverting input (MOUT) remain functional down to and below GND. CAOUT: (current amplifier output) This is the output of a wide bandwidth operational amplifier that senses line current and commands the PFC pulse-width modulator (PWM) to force the correct duty cycle. Compensation components are placed between CAOUT and MOUT. CT: (oscillator timing capacitor) A capacitor from CT to GND sets the PWM oscillator frequency according to: f[ ǒRT0.6CTǓ The lead from the oscillator timing capacitor to GND should be as short and direct as possible. DRVOUT: (gate drive) The output drive for the boost switch is a totem-pole MOSFET gate driver on DRVOUT. Use a series gate resistor to prevent interaction between the gate impedance and the output driver that might cause the DRVOUT to overshoot excessively. See characteristic curve (Figure 13) to determine minimum required gate resister value. Some overshoot of the DRVOUT output is always expected when driving a capacitive load. GND: (ground) All voltages measured with respect to ground. VCC and REF should be bypassed directly to GND with a 0.1-µF or larger ceramic capacitor. IAC: (current proportional to input voltage) This input to the analog multiplier is a current proportional to instantaneous line voltage. The multiplier is tailored for very low distortion from this current input (IIAC) to multiplier output. The recommended maximum IIAC is 500 µA. MOUT: (multiplier output and current amplifier inverting input) The output of the analog multiplier and the inverting input of the current amplifier are connected together at MOUT. As the multiplier output is a current, this is a high-impedance input so the amplifier can be configured as a differential amplifier. This configuration improves noise immunity and allows for the leading-edge modulation operation. The multiplier output current ǒ is limited to 2 I Ǔ . The multiplier output current is given by the equation: IAC I (V * 1) VAOUT I + IAC MOUT 2 K V VFF where K + 1 is the multiplier gain constant. V OVP/EN: (over-voltage/enable) A window comparator input that disables the output driver if the boost output voltage is a programmed level above the nominal or disables both the PFC output driver and resets SS if pulled below 1.9 V (typ). PKLMT: (PFC peak current limit) The threshold for peak limit is 0 V. Use a resistor divider from the negative side of the current sense resistor to VREF to level shift this signal to a voltage level defined by the value of the sense resistor and the peak current limit. Peak current limit is reached when PKLMT voltage falls below 0 V. RT: (oscillator charging current) A resistor from RT to GND is used to program oscillator charging current. A resistor between 10 kΩ and 100 kΩ is recommended. Nominal voltage on this pin is 3 V. www.ti.com 5 SLUS482B - APRIL 2001 − REVISED DECEMBER 2004 pin descriptions (continued) VAI: (voltage amplifier non-inverting input) This input can be tied to the VREF or any other voltage reference (≤7.5 V) to set the boost regulator output voltage. VAOUT: (voltage amplifier output) This is the output of the operational amplifier that regulates output voltage. The voltage amplifier output is internally limited to approximately 5.5 V to prevent overshoot. VCC: (positive supply voltage) Connect to a stable source of at least 20 mA between 10 V and 17 V for normal operation. Bypass VCC directly to GND to absorb supply current spikes required to charge external MOSFET gate capacitances. To prevent inadequate gate drive signals, the output devices are inhibited unless VVCC exceeds the upper under-voltage lockout voltage threshold and remains above the lower threshold. VFF: (feed-forward voltage) The RMS voltage signal generated at this pin by mirroring 1/2 of the IIAC into a single pole external filter. At low line, the VFF roll should be 14 V. VSENSE: (voltage amplifier inverting input) This is normally connected to a compensation network and to the boost converter output through a divider network. VREF: (voltage reference output) VREF is the output of an accurate 7.5-V voltage reference. This output is capable of delivering 20 mA to peripheral circuitry and is internally short-circuit current limited. VREF is disabled and remains at 0 V when VVCC is below the UVLO threshold. Bypass VREF to GND with a 0.1-µF or larger ceramic capacitor for best stability. Please refer to Figures 8 and 9 for VREF line and load regulation characteristics. APPLICATION INFORMATION The UCC3819 is based on the UCC3818 PFC preregulator. For a more detailed application information for this part, please refer to the UCC3818 datasheet product folder. The main difference between the UCC3818 and the UCC3819 is that the non-inverting input of the voltage error amplifier is made available to the user through an external pin (VAI) in the UCC3819. The SS pin and function were eliminated to accommodate this change. The benefit of VAI pin is that it can be used to dynamically change the PFC output voltage based on the line voltage (RMS) level or other conditions. Figure 1 shows one suggested implementation of the tracking boost PFC converter as this approach is sometimes referred to. The VAI pin is tied to the VFF pin and hence output voltage scales up with the line voltage. The benefit of this approach is that at lower line voltages the output voltage is lower and that leads to smaller boost inductor value, lower MOSFET conduction losses and reduced component stresses. In order for this feature to work, the downstream converter has to operate over a wider input range. 6 www.ti.com SLUS482B - APRIL 2001 − REVISED DECEMBER 2004 APPLICATION INFORMATION R21 R13 IAC VO D1 AC2 F1 + D2 C14 VLINE C13 Q1 D3 VOUT AC1 C12 R14 − R17 UCC3819 R9 R12 R10 1 GND DRVOUT 16 D4 2 PKLIMIT 3 CAOUT 4 CAI 5 MOUT CT 14 6 IAC VAI 13 RT 12 D5 R11 VCC 15 VREF C9 R8 C2 C1 C4 C8 VFF C7 D6 R7 VCC (FROM BIAS SUPPLY) C3 C15 R1 VSENSE 11 7 VAOUT 8 VFF R3 R2 R19 C6 R20 VO R4 OVP/EN 10 R6 C5 VREF R5 9 VREF UDG−01008 Figure 1. Suggested Implementation of UCC3819 in a Tracking Boost PFC Preregulator www.ti.com 7 SLUS482B - APRIL 2001 − REVISED DECEMBER 2004 APPLICATION INFORMATION REFERENCE VOLTAGE vs REFERENCE CURRENT REFERENCE VOLTAGE vs SUPPLY VOLTAGE 7.510 VREF − Reference Voltage − V VREF − Reference Voltage − V 7.60 7.55 7.50 7.505 7.500 7.45 7.495 7.40 7.490 9 10 11 12 13 0 14 5 Figure 2 20 25 MULTIPLIER GAIN vs VOLTAGE ERROR AMPLIFIER OUTPUT 1.5 350 300 1.3 IAC = 150 µ A IAC = 150 µ A 250 1.1 200 IAC = 300 µ A 150 100 50 Multiplier Gain − K IMOUT - Multiplier Output Current − µA 15 Figure 3 MULTIPLIER OUTPUT CURRENT vs VOLTAGE ERROR AMPLIFIER OUTPUT 0.9 IAC = 300 µ A IAC = 500 µ A 0.7 IAC = 500 µ A 0.5 0 0.0 1.0 2.0 3.0 4.0 5.0 VAOUT − Voltage Error Amplifier Output − V 1.0 2.0 3.0 www.ti.com 4.0 5.0 VAOUT − Voltage Error Amplifier Output − V Figure 5 Figure 4 8 10 IVREF − Reference Current − mA VCC − Supply Voltage − V SLUS482B - APRIL 2001 − REVISED DECEMBER 2004 APPLICATION INFORMATION 500 (VFF × IMOUT) − µW 400 VAOUT = 5 V 300 VAOUT = 4 V 200 VAOUT = 3 V 100 VAOUT = 2 V 0 0.0 1.0 2.0 3.0 4.0 5.0 RGATE - Recommended Minimum Gate Resistance − Ω MULTIPLIER CONSTANT POWER PERFORMANCE RECOMMENDED MINIMUM GATE RESISTANCE vs SUPPLY VOLTAGE 17 16 15 14 13 12 11 10 9 8 10 12 14 16 18 20 VCC − Supply Voltage − V VFF − Feedforward Voltage − V Figure 6 Figure 7 www.ti.com 9 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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