SLS SL311D

SL311
High Performance Voltage Comparators
LOGIC DIAGRAM
Input polarity is reversed when GND pin is used as an output.
ORDERING INFORMATION
SL311N Plastic
SL311D SOIC
TA = -45°C to 85°C for
all packages
PIN ASSIGNMENT
MAXIMUM RATINGS
Symbol
Value
Unit
Total Supply Voltage
36
V
VO - VEE
Output to Negative Supply Voltage
40
V
VEE
Ground to Negative Supply Voltage
30
V
VID
Input Differential Voltage
± 30
V
VIN
Input Voltage (Note)
± 15
V
-
Voltage at Strobe Pin
VCC to VCC - 5
V
VCC + VEE
Parameter
PD
1/θJA
Power Dissipation and Thermal Characteristics
Plastic Dual In-Line Packages
Derate above TA =+25°C
625
5.0
mW
mW/°C
TJ(max)
Operating Junction Temperature
+150
°C
Tstg
Storage Temperature Range
-60 to +150
°C
Note: This rating applies for ±15 volt supplies. The positive input voltage limit is 30 volts above the negative
supply. The negative input voltage limit is equal to the negative supply voltage or 30 volts below the
positive supply, whichever is less.
SLS
System Logic
Semiconductor
SL311
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC + VEE
TA
Parameter
Min
Total Supply Voltage
Operating Temperature, All Package Types
- 45
Max
Unit
30
V
+85
°C
ELECTRICAL CHARACTERISTICS (VCC=+15 V, VEE= -15 V, TA =+25°C unless otherwise noted
[Note 1])
Symbol
Parameter
Test Conditions
Guaranteed Limits
Min
Unit
Max
VIO
Input Offset Voltage
(Note 2)
RS ≤ 50 kΩ, TA = +25°C
RS ≤ 50 kΩ, -45°C ≤ TA ≤ 85°C
7.5
10
mV
IIO
Input Offset Current
(Note 2)
TA = +25°C
-45°C ≤ TA ≤ 85°C
50
100
nA
IIB
Input Bias Current
TA = +25°C
TA = -45°C
TA = +85°C
250
375
500
nA
AV
Voltage Gain
tDLH
Propagation Delay Time
300
ns
VDS
Saturation Voltage
1.5
V
VIR
Input Voltage Range
13.0
V
ICC
Positive Supply Current
+7.5
mA
IEE
Negative Supply Current
-5.0
mA
150000
TA = +25°C
VID ≤ -10 mV, IO=50 mA
-14.5
NOTES:
1. Offset voltage, offset current and bias current specifications apply for a supply voltage range from a single
5.0 volt supply up to ±15 volt supplies.
2. The offset voltages and offset currents given are the maximum values required to drive the output within a volt
of either supply with a 1.0 mA load. Thus, these parameters define an error band and take into account the
“worst case” effects of voltage gain and input impedance.
SLS
System Logic
Semiconductor