Power Management IC Series for Automotive Body Control Regulator with Voltage Detector IC No.09039EAT05 BD3951F ●Description BD3951F is a 5V LDO system regulator particularly developed for automotive applications. The output current of the regulator can be drawn up to 150mA, and it has built-in power-on reset and input voltage sense. This device can withstand 50V surge input voltage as well as wide ambient temperature operations from -40℃ to +125℃. The adjustable reset delay time and detection input voltage allow to meet with wide range of design requirements. ●Features 1) Micro processor power supply 5.0V, Adjustable Reset, Adjustable Comparator. 2) 5V is Pch DMOS type low drop out voltage regulator. Iomax=150mA. 3) Low ESR capacitor (Ceramic Capacitor) is available for the Output Capacitor. 4) Over Current Protection built in to prevent the destruction of IC. 5) Thermal Shut Down is built in to prevent the heat runaway. 6) VCC absolute Maximum Ratings 36V. 7) Vcc peak input voltage 50V (*1) 8) Small surface mount package SOP8. ●Applications Automotive application (Rain Sensor and Cluster Panel etc.) and all other electronics application. ●Absolute Maximum Ratings (Ta=25℃) Parameter Vcc Input Voltage Out Terminal Voltage RES Terminal Voltage SOUT Terminal Voltage RES Output Current SOUT Output Current SIN Input Voltage Power Dissipation Operating Temperature Range Storage Temperature Range Vcc Peak Input Voltage Symbol Vcc Vout Vres Limit -0.3～+36 -0.3～+7 -0.3～+7 Unit V V V Vsout -0.3～+7 V Ires Isout Vsin Pd Topr Tstg Vccpeak 0.2 2.5 -0.3～+36 *3 687 *2 -40～+125 -55～+150 50*1 mA mA V mV ℃ ℃ V *1 tr (rising time) is over 1msec, applied voltage is less than 400msec *2 Pd is derated at 5.5mW/℃ for temperature above Ta=25℃, mounted on 70mm×70mm×1.6mm PCB. *3 Input current from Vcc to SIN PIN has to be equal and less than 5mA when Vcc voltage is less than SIN PIN voltage. ●Operating Conditions (Ta=-40℃～+125℃) Parameter Symbol *4 Recommended Supply Voltage Operatinal Supply Voltage *5 Reset Adjustable Range Reset Delay Time Controllable Range Vcc Detection Adjustable Range *4 *5 Min. 6.0 5.5 4 5 Vcc Vcc Vdet Cct Vcc Limit Typ. 13.5 13.5 - Max. 20 36 4.7 10 - Unit V V V μF V The range within test condition of the electrical characteristics. The range exceeding the test condition of the electrical characteristics. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 1/9 2009.07 - Rev.A Technical Note BD3951F ●Electrical Characteristics（Unless otherwise specified Ta=-40℃～+125℃，Vcc=13.5V） Limit Parameter Symbol Unit Condition Min. Typ. Max. [Whole Device] Input Current Icc 135 210 μA Iout=0.3mA [Regulator Block] Output Voltage Vout 4.90 5.00 5.10 V Vcc=6～20V,Iout=1～100mA Line Regulation Lin.Reg 10 20 mV Vcc=6～20V Load Regulation Load.Reg 15 30 mV Iout=1～100mA Dropout Voltage ΔVd 0.31 0.50 V Vcc=4.75V, Io=100mA Output Peak Current Iomax 150 mA (Current Limit) [Reset Block] Vout Vout Vout Threshold Voltage Vdet V ×0.92 ×0.94 ×0.96 Hysteresis Voltage Vhys 50 100 150 mV Reset Delay Time L->H TdLH 17 30 mS CT=0.1μF *6 Reset Delay Time H->H TdHL 4 μS CT=0.1μF RES Pull Up Resistor Rrst 10 20 40 kΩ RES Low Output Voltage VrL 0.08 0.40 V 4V<Vout<Vdet, Input Current is 0.2mA Reset Adjustable Voltage Vradj 1.18 1.26 1.34 V [Vcc Detection Block] Threshold Voltage Vsdet 1.19 1.26 1.33 V Hysteresis Voltage Vsdet off 1.240 1.335 1.430 V SOUT Pull Up Resistor Rso 10 20 40 kΩ Vout>4V, Vsin<Vsdet SOUT Low Output Voltage VsL 0.06 0.40 V Input Current is 1.5mA SIN Input Current Isin -1 0 1 μA Vsin=2V *6 TdLH set by Cct terminal capacitor. TdLH ≈ 300k×Cct www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 2/9 2009.07 - Rev.A Technical Note BD3951F Ta=-40℃～+125℃，Vcc=13.5V） 6 OUTPUT VOLTAGE: OUT [V] 3 2 -40℃ 25℃ 125℃ 1 0 5 4 125℃ 25℃ -40℃ 3 2 1 ＊Io=0mA 5 10 15 20 25 30 0 5 10 15 20 25 30 2 1 35 0 0.6 125℃ 25℃ 0.2 4 3 2 1 25 50 75 0 100 1 2 3 4 5 0.2 125℃ 25℃ 0.05 0.1 0.15 ＊Vcc=OUT=4.0V 5 4 3 2 1 0.5 Fig.7 RES Sink Current 5 4 3 2 1 1 1.5 0 2 DROPOUT VOLTAGE: SOUT [V] 25℃ -40℃ 3 2 ＊VOUT=5.0V 0 0 25 50 75 100 ＊Vcc=OUT=4.0V 0.3 0.2 -40℃ 25℃ 125℃ 0.1 0 0 0.5 1 SINK CURRENT; ISOUT [mA] Fig.10 SOUT Pull Up Resistor Fig.11 SOUT Sink Current www.rohm.com 1.5 2 6 SOURCE CURRENT; ISOUT [μA] © 2009 ROHM Co., Ltd. All rights reserved. 1 Fig.9 SIN Detect Voltage Fig.8 RADJ Detect Voltage 4 1 0.5 INPUT VOLTAGE: SIN [V] 0.4 125℃ 100 Fig.6 RES Pull Up Resistor INPUT VOLTAGE: RADJ [V] 6 75 0 0 0.2 50 6 SINK CURRENT: IRES [mA] 5 25 SOURCE CURRENT: IRES [μA] 0 0 0 ＊VOUT=5.0V 1 0 OUTPUT VOLTAGE: SOUT [V] OUTPUT VOLTAGE: RES [V] ＊Vcc=OUT=4.0V -40℃ 2 6 6 0.3 -40℃ 3 Fig.5 Reset Detection Voltage Fig.4 Drop Out Voltage 0.4 25℃ 4 INPUT VOLTAGE: OUT [V] OUTPUT CURRENT: IOUT [mA] 0.1 125℃ 5 0 0 0 300 6 5 0 200 Fig.3 Load Regulation OUTPUT VOLTAGE: RES [V] OUTPUT VOLTAGE: RES [V] ＊Vcc=4.75V -40℃ 100 OUTPUT CURRENT: IOUT [mA] 6 0.4 25℃ 3 Fig.2 Line Regulation 1 0.8 125℃ SUPPLY VOLTAGE: Vcc [V] Fig.1 Circuit Current DROPOUT VOLTAGE: △Vd [V] -40℃ 4 0 35 SUPPLY VOLTAGE: Vcc [V] OUTPUT VOLTAGE: RES [V] 5 0 0 OUTPUT VOLTAGE: SOUT [V] 6 OUTPUT VOLTAGE: OUT [V] CIRCUIT CURRENT: Icc [mA] 4 OUTPUT VOLTAGE: OUT [V] ●Reference Data（Unless otherwise specified 3/9 1.5 5 4 3 2 1 0 100 120 140 160 180 200 AMBIENT TEMPERATURE: Ta [ ℃] Fig.12 Thermal Shut Down 2009.07 - Rev.A Technical Note BD3951F ●Block Diagram, Application Circuit, Pin Description Vcc 1 PreReg 0.33μF OUT SOUT RES GND Vref R2:36kΩ OUT 8 3.3μF R1:10kΩ VCC RADJ 20kΩ 6 RES Vcc SIN RADJ CT 3 4 CT 0.1μF PIN VCC 20kΩ 2 7 SOUT SIN GND 5 External Component ・ 0.33μF～ 10mF 3.3μF～ 2200μF Vcc Capacitor :Cin OUT Capacitor :Co CT Capacitor :Cct 0.01μF～10μF SIN Resistor :R1,R2 0Ω～100kΩ RADJ Resistor :R3,R4 0Ω～100kΩ Fig.13 ・ ・ Value Fig.14 ESR range of the output capacitor Co is 0 (ceramic capacitor) to 100Ω. VCC must be more than 5V under the condition SIN is used for VCC voltage drop detection. Ex. Vcc=5.8V detection, Since 1.26V＊(R1+R2)/R1=5.8V, R1=10kΩ,R2=36kΩ Reset detection voltage must be more than 4V under the condition RADJ is used for OUT voltage drop detection. Ex. OUT=4.5V detection, Since 1.26V＊(R3+R4)/R3=4.5V, R3=10kΩ,R4=26kΩ OUT (8PIN) R4=26kΩ 3.3μF R3=10kΩ RADJ (3PIN) RESET function can be discarded while RADJ terminal pulls up to OUT terminal, which in case RES terminal output “H”. Battery detection function can be discarded while SIN terminal pulls up to OUT terminal, which in case SOUT terminal output “H”. 0～47KΩ pull up resistors are recommended in both condition. Set application board test is necessary to select the right pull up resistor value. ●Terminal Description Pin. No Pin Name 1 Vcc Function Battery power supply Battery voltage detection input terminal. Must be connected to OUT terminal while this function is not employed. RESET voltage adjustment terminal. Connect to GND in case internal detect voltage is employed RESET delay time control terminal 2 SIN 3 RADJ 4 CT 5 GND IC GND terminal 6 RES RESET output terminal. Built in 20KΩ pull up. 7 SOUT 8 OUT www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. Battery voltage detection output terminal. Built in 20KΩ pull up. 5.0V output terminal 4/9 2009.07 - Rev.A Technical Note BD3951F ●Input/Output terminal Circuit SIN(2pin) RADJ(3pin) CT(4pin) Vcc Vcc 300k 200k SIN(2pin) Vcc 340 RADJ(3pin) 4.1k CT(4pin) RES(6pin) SOUT(7pin) OUT(8pin) OUT(8pin) OUT(8pin) Vcc 20k 20k OUT(8pin) SOUT(7pin) RES(6pin) 1260k 420k Fig.15 ●How to set RESET delay time using CT terminal capacitor There are three factors to define the RESET delay time TdLH. External capacitor value Cct of the CT terminal, internal charge resistor and internal reference voltage. RESET delay time is approximately described as below equation. (TYP): TdLH≒300K × Cct(sec) Internal charge resistor 300k has some inaccuracy. The deviation of this inaccuracy is shown in Fig. 16. However, as TdLH delay time may be effected by application board, application board test is recommended to select the right Cct. 10,000 (MAX): TdLH≒530k×Cct (TYP): TdLH≒300k×Cct TdLH[ms] 1,000 (MIN): TdLH≒170k×Cct 100 10 1 0.01 0.1 1 10 Cct[μF] Fig.16 www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 5/9 2009.07 - Rev.A Technical Note BD3951F ●Thermal Design 1000 Glass Epoxy Board (70mm×70mm×1.6mm) Mount Condition Θj-a=181.8 (℃/W) 800 [mW] Pd 687 600 400 200 0 0 25 50 75 Ta 100 125 150 [ ℃] Fig.17 Please consider about power dissipation de-rating curve for high temperature operations. IC characteristics receive great effect from operating ambient temperature. If junction temperature exceeds rating temperature (Tjmax), device might degrade or be demolished permanently. Heat design should take consideration from both instant demolish and long life reliability.To prevent thermal destroy, IC must be operated under the condition that junction temperature is less than Tjmax. SOP8 package power dissipation temperature de-rating curve is shown in Fig. 17. Operating condition must be less than power dissipation curve. Calculation formula is as below. Pc=(Vcc-VOUT)×IOUT+Vcc×Icc Power Dissipation Pd ≤ Pc Derive IOUT as operation is less than power dissipation curve, Pd-Vcc×Icc IOUT ≤ (Icc is shown in Fig. 1) Vcc-VOUT IOUT max is defined by Vcc and VOUT. Vcc VOUT IOUT Icc : : : : Input Voltage Output Voltage Output Current Circuit Current ·Example Ta=85℃, Vcc=13.5V and VOUT=5V IOUT ≤ 0.357-13.5×Icc 13.5-5 IOUT≤41.8mA (Icc=135μA) θja=181.8℃/W→-5.5mW/℃ 25℃=687mW→85℃=357mW Power consumption (Pc) has to be less than power dissipation curve along with the temperature. The equation under short circuit condition (VOUT-GND short) is as below. Pc=Vcc×(Icc+Ishort) Ishort=Short Current www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 6/9 2009.07 - Rev.A Technical Note BD3951F ●Notes for use 1. This product are produced with strict quality control, but might be destroyed in using beyond absolute maximum ratings. The destroyed IC failure mode cannot be defined (like Short mode, or Open mode). Therefore physical safety guard, like fuse, is recommended to prevent unexpected extreme condition which might beyond absolute maximum ratings. 2. BD3951F can operate within the operating supply voltage range and operating temperature range. The Limits over the input voltage is not warranted, however electric characteristics curve in operating condition should be within the expected linearity. 3. GND terminal voltage must be always forced with the lowest voltage among the terminals. 4. Power GND pattern and Small signal GND pattern should be separated each other and is recommended to supply one point GND on the board to eliminate the surge current influences. External components GND pattern should not be long to avoid electrical interferences. 5. For thermal design, refer to the thermal de-rating characteristics and be sure to use this IC within the power dissipation range at any conditions. 6. Short circuits among the output terminals and short circuits between output terminals and VCC/GND terminal due to metallic foreign particles would result in permanent damage to the device. And this IC’s Pin Assignment is 1pin=Vcc, 5pin=GND. So if this IC is mounted upside down, the device damaged permanently due to the huge current from GND pin to Vcc pin. 7. The extent electromagnetic condition might cause wrong operation of BD3951F. 8. Note that running set testing procedure using capacitors connected to low-impedance terminals may produce stress on the IC. Therefore, be certain to use proper discharge procedure before each process of the Testing. To prevent electrostatic stress in the assembly process, thoroughly ground yourself and any equipment that could sustain ESD potential, and continue observing ESD-prevention procedures in all handling, transfer and storage operations. Before attempting to any component to the test system, make certain that the power supply is OFF. Likewise, be sure to turn the power supply OFF before removing any component connected to the test system. 9. This IC is a Monolithic IC which has P+ isolation in the P substrate. A P-N junction is formed from this P layer and the N layer produces various types of parasitic devices. Fig. 18 shows parasitic devices around resistor and NPN transistor. f lower voltages than GND level are applied for A and B terminals, parasitic Di (P-N junction) would ON in both resistor and NPN transistor examples. Moreover, in above condition, parasitic NPN transistor which is formed with parasitic Di and adjoined N layer would ON in NPN transistor example. Parasitic devices are inevitable in the structure of the IC. The operation of parasitic devices can result in mutual interference among circuits as well as operation faults and physical damage. Accordingly, you must not use methods by which parasitic diodes operate, such as applying a voltage that is lower than the GND (P substrate) voltage to an input pin. Resistor NPN Transistor （Terminal A） B （Terminal B） P P＋ P＋ N N P layer C P＋ N N Parasitic E P P＋ N N P layer GND GND Parasitic （Terminal A） (Terminal B） B C E GND Adjoined N layer Parasitic GND Parasitic Fig.18 Bipolar Transistor www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 7/9 2009.07 - Rev.A Technical Note BD3951F 10. Output capacitor between output terminal and GND must be used to prevent undesirable oscillation. Ceramic Capacitor 3.3μF～2200μF can be used. When selecting the value of the output capacitor, please make sure that the operation on the actual application takes these conditions into account: rapid input or load transient response. 11. BD3951F might be damaged from the exceed inflow current from the terminals to VCC (for instance, VCC is short to GND while the output capacitor is charging.). In those cases, VCC series diode (to prevent inflow current) or bypass diode (connected from terminals to VCC) should be used externally in an application. 12. The over-current protection circuits are built in at the output to prevent the IC from being damaged when the load is short-circuited or over-current. This protection circuit is droop type and designed not to latch-up in an unexpected huge current driven. 13. BD3951F has thermal Shut Down protection (TSD) which performs Power Tr OFF in high Tj condition. If Tj increase more than TSD temperature, output power transistor would OFF. After Tj cooled down, the device would be recovered automatically. This function is designed for to protect the device at the accidental unexpected conditions. Since TSD setting is higher temperature than absolute maximum ratings, thermal design must has done not to use this function. 14. Bypass capacitor 0.33μF～10mF into the nearest position between VCC pin and GND is recommended. 15. Insert power zenner diode between VCC terminal and GND terminal is necessary, if more than 50V serge voltage would be supplied to VCC terminals. 16. The SOUT terminal is only activated (“H”/“L”) while the RESET is “H”. While the RESET terminal is “L”, the SOUT terminal is always “L”. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 8/9 2009.07 - Rev.A Technical Note BD3951F ●Ordering part number B D 3 Part No. 9 5 1 F Part No. 3951 - Package F: SOP8 E 2 Packaging and forming specification E2: Embossed tape and reel SOP8 <Tape and Reel information> 6 5 0.3MIN 7 4.4±0.2 6.2±0.3 8 +6° 4° −4° 1 2 3 0.9±0.15 5.0±0.2 (MAX 5.35 include BURR) Tape Embossed carrier tape Quantity 2500pcs Direction of feed E2 The direction is the 1pin of product is at the upper left when you hold ( reel on the left hand and you pull out the tape on the right hand ) 4 0.595 1.5±0.1 +0.1 0.17 -0.05 S S 0.11 0.1 1.27 1pin 0.42±0.1 Reel (Unit : mm) www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 9/9 Direction of feed ∗ Order quantity needs to be multiple of the minimum quantity. 2009.07 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. 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