DATA SHEET BIPOLAR ANALOG INTEGRATED CIRCUIT µPC1830 FILTER-CONTAINING VIDEO CHROMA, SYNCHRONIZING SIGNAL PROCESSING LSI COMPATIBLE WITH NTSC/PAL SYSTEM DESCRIPTION The µPC1830 is a filter-containing video chroma, synchronizing signal processing LSI compatible with the NTSC/ PAL system. A decoder which converts composite video or separate Y/C video signals into a brightness signal and a color difference signal and outputs the result, and a matrix which comprises independent brightness signal/color difference signal input pins are integrated on one chip. Decoder output can be used to drive an A/D converter; it is appropriate for picture-in-picture screen signal processing and multimedia boards. FEATURES • Contains a trap filter, band-pass filter, delay line, and color difference output low-pass filter. Peripheral parts can be drastically reduced. • Low power consumption Appropriate for use with digital boards because of 5-V single power supply operation. • DC control for user adjustment pins Centralized control can be performed by a microcontroller. • One chip compatible with both NTSC and PAL systems Boards common to NTSC and PAL systems can be easily constructed. • S pin input Supports composite and separate Y/C video signal inputs. • Demodulation ratio/demodulation angle change (matrix) Demodulation ratio/demodulation angle can be selected in response to the NTSC or PAL system. • Contains color difference tint control Fine adjustment of the demodulation axis can be made for both the NTSC and PAL systems. ORDERING INFORMATION Part Number Package µPC1830GT 42-pin plastic shrink SOP (375 mil) The information in this document is subject to change without notice. Document No. S11146EJ4V0DS00 (4th edition) Date Published April 1998 N CP(K) Printed in Japan The mark shows major revised points. © 1994 µPC1830 1. SYSTEM BLOCK DIAGRAM VIDEO CAPTURE SYSTEM BLOCK DIAGRAM NTSC PAL 3.58 4.43 RGB/Color difference decoder µPC1830 8-bit A/D µPC659A 8 HD VD BLK CLP Clamp pulse 8-bit A/D µPC659A 8 910 fH H lock clock generator 2 Divider 8-bit A/D µPC659A 8 Digital video (RGB or YUV) signal output RGB or YUV Composite video or Y/C separate signal input µPC1830 2. BLOCK DIAGRAM VCC VCC Sub color control + CVBS Contrast control VCC Separate/ composite switch Separate chroma + VCC + + 3.58/4.43 NTSC/PAL B G Clamp R pulse 25 24 23 + 42 41 40 39 38 37 36 35 Mode switch Sync. separate 31 Filter f0 adjust 5 Delay 7 50/60 + 26 3.58 MHz/4.43 MHz VCXO, PAL SW Y Contrast control 8 R Tint control Killer BLK HD detect VD Y 13 14 R-Y B-Y 15 B-Y R-Y Amp. color control Killer 12 B R-Y B-Y G-Y Y R-Y B-Y Y, R-Y, B-Y output buffer 11 G NTSC/PAL matrix LPF 10 + 9 22 RGB output buffer C R-Y, B-Y fSC modulate HD, VD, blanking pulse, killer output buffer 6 27 APC, killer detect, IDENT detect chroma BPF V H BLK 4 28 R-Y B-Y AFC wave detect 32 fH VCO 29 fSC Separate/composite switch H/V count 30 C chroma trap H 3 32 V H sync. detect 2 33 Separate/composite switch, ACC amp. subcolor control Clamp V filter 1 34 R-Y B-Y Y, R-Y, B-Y input clamp 16 Y 17 18 19 20 21 R-Y B-Y VCC + Color control VCC 3 µPC1830 3. PIN CONFIGURATION (Top View) 42-pin plastic shrink SOP (375 mil) µPC1830GT 4 32 fH VCO filter 1 42 NTSC/PAL switch 32 fH VCO filter 2 41 fSC switch 32 fH VCO filter 3 40 H sync. detect filter Horizontal AFC filter 4 39 Sync. separation input GND (synchronous section) 5 38 Contrast control fV 50/60 switch 6 37 Subcolor control Power supply (synchronous section) 7 36 Composite video signal input Color killer output 8 35 Power supply (chroma section) Blanking pulse output 9 34 Separate chroma input HD pulse output 10 33 GND (chroma section) VD pulse output 11 32 ACC filter Y output 12 31 fo adjustment filter R-Y output 13 30 Chroma APC filter B-Y output 14 29 fSC VCO input (4.43 MHz) GND (video section) 15 28 fSC VCO input (3.58 MHz) Y input 16 27 fSC VCO output Power supply (video section) 17 26 Color killer filter R-Y input 18 25 B output B-Y input 19 24 G output Color control 20 23 R output Tint control 21 22 Clamp pulse input µPC1830 4. PIN EQUIVALENT CIRCUIT DIAGRAMS Pin No. Pin name 1 32 f H VCO filter Equivalent circuit Function descriptions Pins for connecting a 32 f H oscillation filter. For resonator, use 500 kHz ceramic resonator in both NTSC and PAL modes. Bias of pin 1 is supplied from pin 2 via an external resistor between pins 1 and 2. VCC 2 3 1 VCC 2.2 kΩ 2 2.2 kΩ 3.3 kΩ VCC 3 1 mA 4 Horizontal AFC filter Pin for connecting filter of horizontal AFC detector. 300 Ω 30 kΩ 3 kΩ VCC 4 5 GND (synchronous section) Synchronous section ground. 5 µPC1830 Pin No. 6 Pin name Equivalent circuit f V 50/60 switch Function descriptions VCC 20 µ A Vertical frequency (f V ) switch pin. When the pin voltage is 2.2 V or less, the vertical frequency changes to 50 Hz; when 2.8 V or more, to 60 Hz. 5 kΩ 6 7 Power supply (synchronous section) Synchronous section power supply. 8 Color killer output Color killer output pin. VCC 9 Blanking pulse output 10 HD pulse output 11 VD pulse output 12 Y output 500 Ω 1 kΩ 8 9 10 11 40 kΩ 500 Ω Horizontal blanking pulse output pin. HD pulse output pin VD pulse output pin. Y signal is output. DC level is approx. 2.0 V. VCC 13 R-Y output 2 mA 12 13 14 6 14 B-Y output 15 GND (video section) Decoder R-Y and B-Y color difference signal output pins. DC level is approx. 2.5 V. 50 Ω Video section ground. µPC1830 Pin No. 16 Pin name Equivalent circuit Function descriptions Y input Matrix Y signal input pin. This pin also serves as a clamp pin. Input the signal with C coupling. DC level is approx. 2.0 V. VCC 5 kΩ 5 kΩ 16 40 µA 17 Power supply (video section) 18 R-Y input Video section power supply. VCC 5 kΩ 5 kΩ 19 B-Y input 18 19 20 Matrix R-Y and B-Y color difference signal input pins. These pins also serve as clamp pins. Input the signals with C coupling. DC level is approx. 2.5 V. Output in PAL mode is “pseud PAL”. 40 µ A Color control Pin for color adjustment of matrix circuit. VCC 10 kΩ 40 kΩ 21 Tint control 70 kΩ Pin for tint adjustment of matrix circuit. 20 21 7 µPC1830 Pin No. 22 Pin name Equivalent circuit Clamp pulse input Function descriptions Matrix clamp pulse input pin. Clamp operation is performed at 2.8 V or more. VCC 20 µ A 10 kΩ 22 23 R output VCC 24 2 mA G output Matrix R, G, and B output pins. DC level is approx. 2.0 V. Sync. signal component, added to Y-input (16 pin), appears in R, G, and B output pins. 23 24 25 B output 26 Color killer filter 25 50 Ω Filter connection pin of color killer sync detector. 500 Ω 10 kΩ VCC 10 kΩ 26 27 f SC VCO output f SC VCO oscillator output pin. Connect this pin to pin 28 via a 3.58 MHz oscillation filter and to pin 29 via a 4.43 MHz oscillation filter. VCC 125 Ω 125 Ω 3.3 kΩ 27 2.9 mA 8 µPC1830 Pin No. 28 29 Pin name Equivalent circuit f SC VCO input (3.58 MHz) Function descriptions f SC VCO input pins. Connect a 3.58 MHz oscillation filter between pins 27 and 28 and a 4.43 MHz oscillation filter between pins 27 and 29. Switch of pin 28 input and pin 29 input is suppressed in response to pin 41 (f SC switch) voltage. VCC f SC VCO input (4.43 MHz) 5 kΩ 5 kΩ 28 10 kΩ 60/0 µA 20 kΩ 20 kΩ 0/60 µA VCC VCC 10 kΩ 5 kΩ 29 5 kΩ 80 µA 30 Chroma APC filter VCC 500 Ω VCC Pin for connecting filter of chroma APC detector. 5 kΩ 50 kΩ 30 9 µPC1830 Pin No. 31 Pin name Equivalent circuit Function descriptions f O adjustment filter Pin for connecting filter of f O automatic adjustment loop. 30 kΩ 500 Ω VCC 31 32 ACC filter Pin for connecting filter of ACC detector. VCC 500 Ω 1 kΩ 5 kΩ VCC 32 33 GND (chroma Chroma section ground. section) 34 Separate chroma input VCC 80 µA 30 kΩ Separate chroma signal input pin. This pin also serves as a separate and composite switch input pin. If the pin voltage is set to 3.7 V or more, composite input mode is entered. 5 kΩ 34 35 10 Power supply (chroma section) Chroma section power supply. µPC1830 Pin No. 36 Pin name Equivalent circuit Function descriptions Composite video signal or separate Y signal input pin. This pin also serves as a clamp pin. Input the signal with C coupling. DC level is approx. 2.3 V. Composite video signal input VCC 5 kΩ 5 kΩ 36 37 Subcolor control Decoder color and contrast adjustment pins. VCC 10 kΩ 40 kΩ 38 Contrast control 70 kΩ 37 38 39 Sync. separation input Input pin of sync. separation circuit. VCC 5 kΩ 16 kΩ 100 Ω 167 Ω 5 kΩ VCC 5 kΩ 39 11 µPC1830 Pin No. Pin name 40 H sync. detect filter Equivalent circuit Function descriptions Pin for connecting filter of H sync. detector. VCC 1 kΩ 10 kΩ 10 kΩ VCC 40 41 f SC switch VCC 20 µ A Pin for controlling f SC VCO input (pins 28, 29) switch. When the pin voltage is 2.8 V or more, the mode changes to the 3.58 MHz mode; when 2.2 V or less, to the 4.43 MHz mode. 5 kΩ 41 42 NTSC/PAL switch VCC 5 kΩ 42 5 kΩ 20 µ A 12 Pin for controlling switch of NTSC and PAL modes of decoder and matrix. One of the following three combinations of decoder and matrix modes can be selected depending on the value of the pin 42 voltage V42: 1. When V42 = 0 V decoder = PAL matrix = PAL 2. When V42 = 2.5 V decoder = NTSC matrix = NTSC 3. When V42 = 5 V decoder = NTSC matrix = PAL µPC1830 5. BLOCK OPERATION 5.1 Video Signal Processing Section (1) Input signal After coupling by a capacitor (0.22 µF), a 1 Vp-p composite video signal is input to the composite video signal input pin (pin 36). (2) Clamp circuit The clamp circuit controls the pedestal voltage level to be constant to make it a reference voltage for the post-stage signal processing. (3) Chroma trap circuit Eliminates the chroma signal (NTSC system: approximately 3.58 MHz, PAL system: approximately 4.43 MHz) from a composite video signal and extracts a brightness signal. (4) Separate/composite switching circuit Operates as shown in Table 5-1 according to the voltage of the separate chroma input pin (pin 34). Table 5-1. Operation when Switching Separate/Composite Signals Separate chroma input pin (pin 34) voltage Mode Brightness signal processing ACC amp input Less than 3.7 V Y/C separate input Without chroma trap Input from separate chroma 3.7 V or higher Composite video input With chroma trap Input from chroma BPF (5) Delay circuit Compensates for the delay between the brightness signal and chroma signal by delaying the brightness signal. (6) Contrast adjustment circuit Adjusts the amplitude of the brightness signal output from the Y output pin (pin 12) according to the voltage of the contrast control pin (pin 38). The control characteristic is shown in Figure 5-1. 13 µPC1830 Figure 5-1. Contrast Control Characteristic (a) NTSC mode (b) PAL mode 400 mVp-p stair step (composite) input 400 mVp-p stair step (composite) input 2 2 VCC = 5 V Y output voltage (Vp-p) Y output voltage (Vp-p) VCC = 5 V 1 0 1 2 3 4 5 Contrast control pin voltage (V) 1 0 1 2 3 4 5 Contrast control pin voltage (V) 5.2 Chroma Signal Processing Section (1) Input signal • Composite video signal input After coupling by a capacitor (0.22 µF), a 1 Vp-p composite video signal is input to the composite video signal input pin (pin 36). • Separate chroma signal input After coupling by a capacitor (1000 pF), a chroma signal whose burst signal amplitude is 150 mVp-p is input to the separate chroma input pin (pin 34). (2) Chroma BPF circuit Separates the chroma signal from a composite video signal. (3) Separate/composite switching circuit When the potential of the separate chroma input pin (pin 34) is 3.7 V or higher (in composite mode), switches the ACC amp input from the chroma input pin to the chroma BPF circuit output. Processing of the brightness signal at this time is switched so that it passes through the chroma trap circuit. Operation when switching separate/composite signals is shown in Table 5-1. (4) ACC (Auto Color Control) amplification circuit Extracts the burst signal, detects its level and smoothes the voltage of the ACC filter pin (pin 32) by an external capacitor. This smoothed voltage controls color gain to keep the amplitude of the burst signal constant. 14 µPC1830 (5) Subcolor control circuit According to the voltage of the subcolor control pin (pin 37), controls the amplitude of the chroma signal output from the ACC amplification circuit after separating the burst signal from it, and adjusts the amplitude of the color difference signal output from the R-Y output pin (pin 13) and B-Y output pin (pin 14). This controls color density on the screen. The control characteristic is shown in Figure 5-2. Figure 5-2. Subcolor Control Characteristic (a) NTSC mode (b) PAL mode Color bar (composite, burst: 300 mVp-p) input Color bar (composite, burst: 300 mVp-p) input 3 3 VCC = 5 V B-Y output voltage (V) B-Y output voltage (V) VCC = 5 V 2 1 0 1 2 3 4 5 Subcolor control pin voltage (V) 2 1 0 1 2 3 4 5 Subcolor control pin voltage (V) (6) Chroma APC (Auto Phase Control) circuit Detects the phase difference between the burst signal extracted from the chroma signal and the signal from fSCVCXO and smoothes the chroma APC filter pin (pin 30) using a capacitor. This smoothed voltage is used to control the fSCVCXO oscillation frequency. (7) Killer detection circuit Detects the amplitude of the burst signal and executes a mute on the subcolor control circuit when there is no burst signal, preventing it from outputting a chroma signal to avoid color noise. In this case, the output of the color killer output pin (pin 8) is driven high. The color killer sensitivity is determined by the time constant of a resistor and capacitor connected to the color killer filter pin (pin 26). (8) IDENT detection circuit Performs IDENT detection. With IDENT detection, if an NTSC signal (PAL signal in NTSC mode) is input in PAL mode, the color killer turns on and no chroma signal is output. (9) 3.58 MHz/4.43 MHz VCXO, PAL SW circuit Switches the fSCVCO input pin between pin 28 (for 3.58 MHz) and pin 29 (for 4.43 MHz) by controlling the voltage of the fSC switching pin (pin 41) (2.8 V or higher: 3.58 MHz mode, 2.2 V or below: 4.43 MHz mode) to perform fSC oscillation at 3.58 MHz or 4.43 MHz. VCXO is controlled by the voltage of the chroma APC filter pin (pin 30) smoothed by the chroma APC circuit and its phase is synchronized with the input burst signal. The PAL SW circuit inverts the phase of a signal on the R-Y demodulation axis every 1H by IDENT detection. (10) R-Y, B-Y demodulation circuit Performs demodulation using the chroma signal output from the ACC circuit, an R-Y demodulation axis signal and a B-Y demodulation axis signal output from fSCVCXO, and multiplies R-Y by 1.4 and B-Y by 2.03. 15 µPC1830 5.3 Matrix Section (1) Input signal • Brightness input signal After coupling by a capacitor (0.22 µF), a brightness signal which has 1 Vp-p of video part is input to the Y input pin (pin 16). • Color difference input signal After coupling by a capacitor (0.22 µF), 1 Vp-p R-Y and B-Y signals are input to the R-Y and B-Y input pins (pins 18 and 19). (2) Y, R-Y and B-Y input clamp circuit Clamps Y, R-Y and B-Y signals when the voltage of the clamp pulse input pin (pin 22) is 2.8 V or higher. Input a clamp pulse to the clamp pulse input pin (pin 22) in synchronization with the burst section of an input signal as shown in Figure 5-3. In the application circuit example, adjust the position of the clamp pulse by DELAY (µPD4538B external variable resistor: 10 kΩ) and the clamp pulse width by PD (µPD4538B external variable resistor: 10 kΩ). Figure 5-3. 22-Pin Input Clamp Pulse Waveform Video signal Burst signal Composite video input Clamp operates at 2.8 V or higher. 22-pin input clamp pulse (3) Amplification color control circuit Adjusts the amplitude of a color difference signal input to the R-Y input pin (pin 18) and B-Y input pin (pin 19) according to the voltage of the color control pin (pin 20). This controls the color density on the screen. When using a matrix, adjust the color density mainly using this color control and fix the voltage of the subcolor control pin (pin 37) at 2 V (TYP.). The control characteristic is shown in Figure 5-4. 16 µPC1830 Figure 5-4. Color Control Characteristic (a) NTSC mode (b) PAL mode 400 mVp-p stair step B-Y input Tint control pin voltage: 2 V 400 mVp-p stair step B-Y input Tint control pin voltage: 2 V 1.0 VCC = 5 V VCC = 5 V 0.9 0.9 0.8 0.8 0.7 0.7 B output voltage (Vp-p) B output voltage (Vp-p) 1.0 0.6 0.5 0.4 0.3 0.6 0.5 0.4 0.3 0.2 0.2 0.1 0.1 0 1 2 3 4 0 5 1 2 3 4 5 Color control pin voltage (V) Color control pin voltage (V) (4) Tint control circuit Controls the phase of a color difference signal whose amplitude is adjusted by the color control circuit, in a range of ±45° according to the voltage of the tint control pin (pin 21), and adjusts tint on the screen. Table 5-2 shows the demodulation angle and demodulation ratio in each mode and Figure 5-5 shows the control characteristic. Table 5-2. Demodulation Angle and Demodulation Ratio when Tint Control Pin (Pin 21) Voltage = 2 V (TYP.) Mode Demodulation angle (∠R-Y) Demodulation ratio (R-Y/B-Y) NTSC 105° (TYP.) 0.75 (TYP.) PAL 90° (TYP.) 0.61 (TYP.) Figure 5-5. Tint Control Characteristic (a) NTSC mode (b) PAL mode 400 mVp-p stair step R-Y, B-Y input Tint control pin voltage: MAX. +90 VCC = 5 V B demodulation angle (deg) B demodulation angle (deg) +90 400 mVp-p stair step R-Y, B-Y input Tint control pin voltage: MAX. +45 0 _45 _90 0 1 2 3 Tint control pin voltage (V) 4 5 VCC = 5 V +45 0 _45 _90 0 1 2 3 4 5 Tint control pin voltage (V) 17 µPC1830 (5) G-Y demodulation circuit Demodulates G-Y using (R-Y)’, (B-Y)’ which is color difference signal after tint adjustment and the following expression. G-Y demodulation expression: (G-Y) = –0.51 × (R-Y)’ – 0.19 × (B-Y)’ (6) RGB matrix circuit Adds a brightness signal: Y to each of (R-Y)’, (B-Y)’ and G-Y to create R, G, and B signals. 5.4 Synchronizing Signal Processing Section (1) Input signal A composite video signal or brightness signal is input to the synchronizing separate input pin (pin 39) at 1 VP-P. (2) Sync. separation circuit Separates the sync. signal from a composite video signal. The slice level can be changed using an external resistor: RX (see Figure 5-6, TYP. = 220 Ω). The operation of the µPC1830 sync. separation circuit is explained below. Figure 5-6 is an equivalent circuit diagram of the µPC1830 sync. separation circuit. Figure 5-6. µPC1830 Sync. Separate Input Section Equivalent Circuit VCC 5 kΩ 16 kΩ 100 Ω 167Ω TR1 5 kΩ Approx. 2.5 V (when VCC = 5 V) VCC VCC 1.8 kΩ Rx + Isp 5 kΩ 39 Co A733 Ro Ix In Figure 5-6, the slice level of sync. separation is determined as follows: When a negative sync. video signal is input, charge current I SP flows from the µ PC1830 to C O so that the synchronization peak (minimum potential) becomes approximately 2.5 V. The voltage of the sync. separate input pin (pin 39) becomes 2.5 V or higher during a period other than the synchronization peak (minimum potential), thus cutting off transistor TR1 (reducing the collector current of TR1). Consequently, a charge in C O is discharged via R O and R X by current I X during this cut-off period. Figure 5-7 illustrates this situation. 18 µPC1830 Figure 5-7. Sync. Separation Waveform Charge by ISP Discharge by IX VS T1 (4.7 µ s) T2 (58.86 µ s) V S in Figure 5-7 represents the slice voltage and can be expressed in the following expression if it is assumed that C O is sufficiently large, and both I X and I SP are linear. V S = 2.5 × (R X/R O) × (T2/T1) [V] The µ PC1830 amplifies the part lower than this slice voltage (VS) to perform sync. separation. To determine sync. separation sensitivity, change R X to set V S . Decreasing V S is advantageous for separation of the horizontal sync. part, but disadvantageous for separation of the vertical sync. part. On the contrary, increasing V S may cause a sync. failure (jitter) due to noise (spikes) of the horizontal sync. part. Therefore, it is necessary to optimize the constant in accordance with a signal input. As capacitance CO, select a sufficiently large value compared with the charge/discharge current. However, an excessive value may deteriorate the excessive response characteristic, failing to catch up with drastic APL variations of the input signal. The larger R X , the larger the slice level becomes. However, with large RX if the sync. signal level drops (weak electric field signal, etc.) a video signal may be confused with a sync. signal and sliced, making synchronization unstable (abnormal). Caution Since the measuring circuit uses capacitor coupling for input for ease of measurement, it is susceptible to APL variations. Therefore, when configuring the actual circuit, use a Sync Tip clamp circuit in the stage prior to inputting to the emitter follower to stabilize the synchronization peak potential and this will make the circuit more resistant to APL variations. (3) Vertical filter circuit Separates the vertical sync. signal from the sync. signal separated by the sync. separation circuit. (4) Horizontal sync. detection circuit Detects the presence of a horizontal sync. signal and changes the AFC time constant. (5) AFC detection circuit Performs phase detection on an input sync. signal and fH and outputs the phase difference in voltage. Stops phase detection for 9H of the vertical blanking period. (6) 32fH VCO Controls VCO according to the voltage output by the AFC detection circuit and generates 32fH oscillation clocks. 19 µPC1830 (7) Horizontal/vertical counter circuit • Horizontal counter circuit Divides a 32fH signal to generate horizontal timing signals such as HD and BLK signals. • 525/625 counter circuit Performs counting at 4fH and generates a vertical timing signal. Generates VD in 0.75H delay from the falling edge of a vertical sync. signal in an odd field and in 0.75H delay from the falling edge of a vertical sync. signal in an even field. 20 µPC1830 6. ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings (TA = +25 °C unless otherwise specified) Parameter Symbol Ratings Unit Power supply voltage VCC 7.0 V Video input signal voltage VIY VCC V Chroma input signal voltage VIC VCC V Synchronous separation input signal voltage VIS VCC V Control signal voltage VIcnt VCC V Permissible package power dissipation PD 500 (on board, TA = +75 °C) mW Operating ambient temperature TA –20 to +75 °C Storage temperature Tstg –40 to +125 °C Caution Even if one of the parameters exceeds its absolute maximum rating even momentarily, the quality of the product may be degraded. The absolute maximum rating therefore specifies the upper or lower limit of the value at which the product can be used without physical damages. Be sure not to exceed or fall below this values when using the product. Recommended Operating Conditions Parameter Symbol Conditions MIN. TYP. MAX. Unit Power supply voltage V CC 4.5 5.0 5.5 V Composite video input voltage V YC — 1.0 — V p-p Separate chroma input signal voltage VC — 150 — mV p-p Synchronous separation input signal voltage VS — 1.0 — V p-p Control signal voltage V cont 0 — V CC V Color difference input voltage V R-Y V B-Y 1.0 V P-P 21 µPC1830 ELECTRICAL SPECIFICATIONS (TA = +25 ±3 ˚C, VCC = +5 V unless otherwise specified) VIDEO SIGNAL PROCESSING SECTION Parameter Power supply current Symbol Composite f SC PAL or MIN. /Separate (MHz) NTSC MAX. Unit – 50 70 90 mA Stair step 1 (400 mV p-p) Both 3.58/ 4.43 – 10.0 12.0 14.0 dB Max./min. contrast ratio Stair step 1 (400 mV p-p) Both 3.58/ 4.43 – 30 – – dB Sync. signal (300 mV p-p) only Both 3.58/ 4.43 – – 0 ±400 mV Sine wave 1 (400 mV p-p) Composite 4.43 – –4 –2 0 dB 3.58 – –5 –3 0 dB 4.43 – 0 +2 +4 dB f v4 200 kHz/1.8 MHz gain difference, Contrast = max. 200 kHz/5.5 MHz gain difference, Contrast = max. 3.58 – –1 +1 +3 dB Video input DC voltage E YI DC voltage of pin 36 Both 3.58/ 4.43 – 2.1 2.5 3.0 V Video output DC voltage EYO Scan period voltage of pin 12 Contrast = max. Sync. signal (300 mV p-p) only – 1.7 2.0 2.4 V Video output DC power supply voltage fluctuation ∆E YOV E YO change when V CC changes from 4.5 to 5.5 V Contrast = max. Sync. signal ( 300 m V p-p) only Both 3.58/ 4.43 – – 0 ±100 mV Video output gain power supply voltage fluctuation ∆AVV Video voltage gain Stair step 1 change when V CC (400 mV p-p) changes from 4.5 to 5.5 V, Contrast = max. – – – –0.5 0.0 +0.5 dB Composite 3.58/ 4.43 – –20 – – dB Video output DC voltage fluctuation when contrast is variable Video frequency characteristics A v(comp) Contrast = max. evc ∆E OYC Output DC fluctuation, Contrast = max./min. f v1 f v2 f v3 Trap attenuation amount ∆d t Gain difference of 200 kHz/3.58 MHz and 200 kHz/4.43 MHz Contrast = max. – TYP. – Contrast variable range With no input signal Input signal – Video voltage gain I CC Conditions Separate Sine wave 1 (400 mV p-p) Remark For the input signal, see Measuring Input Signal. 22 µPC1830 CHROMA SECTION (1/3) Parameter A CC amplitude characteristics Symbol Conditions ACC1 B-Y output level fluctuation. With reference to burst 300 mV p-p . ACC2 Input signal Color Burst Composite bar 600 mVp-p 2 Burst 30 mVp-p ACC3 Burst 600 mVp-p ACC4 Burst 30 mVp-p ACC5 ACC6 B-Y output level fluctuation. With reference to burst 300 mV p-p . Composite f S C PAL or MIN. /Separate (MHz) NTSC 4.43 Burst 300 mVp-p ACC8 Burst Unit –2.0 0.0 +2.0 dB – –7.0 –3.0 +1.0 dB – –2.0 0.0 +2.0 dB – –7.0 –3.0 +1.0 dB – –2.0 0.0 +2.0 dB – –7.0 –3.0 +1.0 dB – –2.0 0.0 +2.0 dB – –7.0 –3.0 +1.0 dB 4.43 PAL –48 –40 –32 dB 3.58 NTSC –48 –40 –32 dB 4.43 PAL –48 –40 –32 dB 3.58 NTSC –48 –40 –32 dB 50 mV p-p 4.43 Burst 15 mVp-p ACC7 MAX. – 3.58 Burst Separate 300 mVp-p TYP. 3.58 15 mVp-p Color killer setting point e KPC e KPS Level at which killer output goes high with burst signal 300 mV p-p set to 0 dB. Color bar 1 Level at which killer output goes high with burst signal 150 mV p-p set to 0 dB. Composite Separate Color killer color remainder e OK B-Y output remaining level when killer output is high. Color bar 1 – – – 0 – Color killer output, high ECKH Color killer output level when color killer is ON, – – – – 3.9 4.05 V I OH = –200 µ A. Color killer output, low ECKL Color killer output level when color killer is OFF, IOL = +200 µ A. – – – – Subcolor control variable range e CC B-Y output level ratio of max./min. subcolor. Color bar 1 Composite 4.43 – Subcolor control color remainder e OC B-Y output remaining subcolor difference level, Color = min. Color bar 1 Composite 4.43 APC pull-in range f SP APC pull-in frequency range when burst chroma frequency changes. (f sc = reference) Color bar 1 Composite VCO control sensitivity βS Calculate from oscillation freq. when APC filter pin voltage is 2.3/2.7 V. Separate – – 0.5 0.6 V 30 45 – dB – 0 – 50 mV p-p 4.43 PAL ±400 ±600 – Hz 3.58 NTSC ±400 ±600 – Hz 4.43 PAL ±400 ±600 – Hz 3.58 NTSC ±400 ±600 – Hz 4.43 – 1.0 1.2 1.4 Hz/mV 3.58 – 1.0 1.2 1.4 Hz/mV Remark For the input signal, see Measuring Input Signal. 23 µPC1830 (2/3) Parameter VCO free-running frequency Symbol fS Conditions VCO oscillator freq. PAL mode demodulation ratio R-Y R-Y/B-Y output ratio B-Y DP Input signal Composite f S C PAL or MIN. /Separate (MHz) NTSC Unit – ±400 – – Hz 3.58 – ±400 – – Hz 4.43 PAL 0.9 1.0 1.1 Times 3.58 NTSC 0.9 1.0 1.1 Times 4.43 PAL 85 90 95 deg 3.58 NTSC 85 90 95 deg Composite 4.43 – 1.3 1.6 1.9 V p-p – 3.58 NTSC 0 – 100 mV p-p Composite NTSC mode demodulation ratio R-Y B-Y DN PAL mode demodulation angle ∠R-YDP R-Y demodulation angle Rainbow color bar (300 mV p-p) ∠R-YDN Composite Maximum color difference output e BYM Subcolor = max. Color difference output remaining carrier level e CAR R-Y, B-Y output remaining carrier level Color difference output remaining e HAR Output remaining harmonic level, R-Y, B-Y = 1 Vp-p Color bar 1 – 3.58 NTSC 0 – 100 mV p-p ∆f = 50/500 kHz R-Y, B-Y output level ratio Since wave 2 (400 mV p-p) Composite 4.43 PAL –5 –3 0 dB 3.58 NTSC 4.43 PAL –5 –3 0 dB 3.58 NTSC harmonic level Color difference output frequency characteristics f CP f CS Blanking stage difference Rainbow color bar (300 mV p-p) MAX. 4.43 – Sync. signal (300 mVp-p ) only Rainbow color bar (300 mV p-p) NTSC mode demodulation angle TYP. – ∆f = 50 kHz/1 MHz R-Y, B-Y output level ratio Separate Burst (300 mV p-p) only – 4.43 PAL – 0 20 mV ∆E ORY Subcolor = max. Burst (300 Scan period DC voltage mV p-p) only difference at every horizontal scanning period of R-Y output – 4.43 PAL – 0 20 mV – – 4.43 PAL 2.2 2.5 3.0 V – – 4.43 PAL 0 ±100 mV 0 ±100 mV e BLK Subcolor = max. R-Y/B-Y output blank period/scan period DC voltage difference Line fluctuation Color difference output pin voltage Color difference output pin voltage fluctuation with power supply fluctuation EORY R-Y output DC voltage, With no signal EOBY B-Y output DC voltage, With no signal ∆EORYV E ORY change when VCC changes from 4.5 to 5.5 V ∆EOBYV E OBY change when VCC changes from 4.5 to 5.5 V Remark For the input signal, see Measuring Input Signal. 24 µPC1830 (3/3) Parameter Symbol Conditions Input signal Composite f S C PAL or MIN. /Separate (MHz) NTSC TYP. MAX. Unit Separate chroma input pin voltage E IC DC voltage of pin 34 – Separate – – 1.2 1.5 1.8 V Separate chroma input resistance RIC Calculate from input when EIC → EIC + 2 V – Separate – – 26 35 44 kΩ Voltage of pin 34 at which separate/ composite mode is changed – – 3.58 NTSC 3.1 3.4 3.7 V Separate/composite change threshold voltage EICTH Remark For the input signal, see Measuring Input Signal. 25 µPC1830 SYNCHRONOUS SECTION (1/2) Parameter Symbol Conditions Sync. separation input DC voltage E IS Sync. separation input DC voltage at no signal H sync. pull-in range f HP Frequencies at which horizontal AFC can be pulled, H sync width = 4.8 µ s Horizontal VCO control sensitivity βH Calculated from HD output frequency change when horizontal AFC filter pin voltage changes from 2.9 to 3.4 V, With no signal Horizontal VCO free-running freq. fH Horizontal VCO free-running freq. fluctuation with power supply voltage fluctuation ∆f HV HD pulse output, E HDH I OH = –200 µ A HD pulse output, low E HDL I OL = +200 µ A HD pulse output width t WHD Blanking pulse EBLH Unit – 2.25 2.55 2.85 V – – – ±400 – – Hz _ – – – 1.2 1.5 1.9 Hz/mV Difference for 15.680 kHz of HD output frequency, With no signal – – – – –200 0 +200 Hz Change of fH when VCC changes from 4.5 to 5.5 V – – – – 0 ±50 Hz Sync. signal (300 mVp-p) only – – – 3.9 4.05 – V Sync. signal (300 mVp-p) only – – – – 0.5 0.6 V When HD pulse rising, falling is 2.5 V Sync. signal (300 mVp-p) only – – – 3.9 4.4 4.9 µs I OH = –200 µ A Sync. signal – – – 3.9 4.05 – V Sync. signal (300 mVp-p) only – – – – 0.5 0.6 V When blanking pulse rising, falling is 2.5 V Sync. signal (300 mVp-p) only – – – 9.9 10.4 10.9 µs f v1 H sync. detect filter pin voltage = 0 V Sync. separate input of 3.5 V – – – – f H/368 – Hz f v2 H sync. detect filter pin voltage = 5 V – – – – f H/352 – Hz f v3 H sync. detect filter pin voltage = 0 V – – – – f H/272 – Hz f v4 H sync. detect filter pin voltage = 5 V – – – – f H/288 – Hz Sync. signal (300 mV p-p) only (300 mVp-p) only Blanking pulse output, low E BLL Blanking pulse output, width t WBL I OL = +200 µ A Sync. separate input of –1 mA Remark For the input signal, see Measuring Input Signal. 26 MAX. – output, high – TYP. – high Vertical free-running frequency (in 50-Hz mode) Composite f S C PAL or Input signal MIN. /Separate (MHz) NTSC µPC1830 (2/2) Parameter Vertical free-running frequency (in 60-Hz mode) Symbol Conditions f v5 H sync. detect filter pin voltage = 0 V f v6 H sync. detect filter pin voltage = 5 V f v7 H sync. detect filter pin voltage = 0 V f v8 H sync. detect filter pin voltage = 5 V VD pulse output, high EVDH I OH = –200 µ A VD pulse output, low EVDL I OL = +200 µ A Even field VD pulse output width t WVDE Odd field VD pulse output width t WVDO Input signal Composite f S C PAL or MIN. /Separate (MHz) NTSC Sync. separate input of 3.5 V Sync. separate input of –1 mA Sync. signal of 300 mV p-p Sync. signal of 300 mV p-p TYP. MAX. Unit – – – – f H/296 – Hz – – – – f H/288 – Hz – – – – f H/232 – Hz – – – – f H/240 – Hz – – – 3.9 4.05 – V – – – – 0.5 0.6 V – – – – 5.5 – H – – – – 6.0 – H Remark For the input signal, see Measuring Input Signal. 27 µPC1830 MODE CONTROL SECTION Composite f S C PAL or MIN. /Separate (MHz) NTSC Symbol Conditions Input signal EPN1 Voltage of pin 42 at which both decoder and matrix changes to NTSC or PAL mode simultaneously. – – – – EPN2 Voltage of pin 42 at which only matrix changes to NTSC or PAL mode and decoder remains in NTSC mode. – – – NTSC/PAL mode switch input pin current I IPN Input current of pin 42. – – Subcarrier frequency switch threshold voltage E SC Voltage of pin 41 at which f SC 3.58/4.43 mode is changed. – Subcarrier frequency switch input pin I ISC Input current of pin 41. Vertical frequency switch threshold voltage E FV Vertical frequency switch input pin current I IFV Parameter NTSC/PAL mode switch threshold voltage TYP. MAX. Unit 1.37 1.67 1.97 V – 3.03 3.33 3.63 V – – –0.5 +0.2 +2.0 µA – – – 2.2 2.5 2.8 V – – – – –2.0 –0.2 +0.5 µA Voltage of pin 6 at which fV 50/60 mode is changed. – – – – 2.2 2.5 2.8 V Input current of pin 6. – – – – –2.0 –0.2 +0.5 µA current NTSC/PAL MODE SETTING SW setting of pin 42 Mode 1 Mode 2 Mode 3 Voltage of pin 42 Decoder mode Matrix mode Lower than EPN1 Between EPN1 and EPN2 Higher than EPN2 PAL NTSC NTSC PAL NTSC PAL VERTICAL FREQUENCY (fV) SWITCHING Voltage of pin 6 Lower than EFV Higher than EFV Vertical frequency fv 50 Hz 60 Hz SUBCARRIER FREQUENCY (fSC) SWITCHING Voltage of pin 41 Lower than ESC Higher than ESC 28 Subcarrier frequency fSC 4.43 MHz 3.58 MHz µPC1830 MATRIX SECTION (1/2) Parameter Symbol Original color output Y voltage gain AY Y voltage gain RGB output mutual difference Y voltage gain fluctuation with power supply voltage fluctuation Conditions B output voltage gain. TYP. MAX. Unit Y:stair step 2 (1 V p-p) – – – –2.0 0.0 +2.0 dB Y:stair step 2 (1 V p-p) – – – –1.0 0.0 +1.0 dB Difference between B Y:stair step 2 output voltage gain and A Y (1 V p-p) under the same conditions as AY except that V CC = 4.5 V, 5.5 V. – – – –0.5 0.0 +0.5 dB ∆A YRGB Mutual difference of R, G, and B output voltage gains. ∆A YV Composite f S C PAL or Input signal MIN. /Separate (MHz) NTSC Y frequency characteristics fY 200 kHz/6 MHz B output gain difference. Sine wave 4 (1 V p-p) – – – 0 –3 –5 dB B output color difference voltage gain AB B output voltage gain. Tint control voltage 2.0 V, Color = max. B-Y: stair step 1 (400 mVp-p) – – – 4.0 6.0 8.0 dB Color control variable range e CM Difference between B output B-Y: stair step 1 gain and AB . (400 mVp-p) Tint control voltage 2.0 V, Color = min. – – – 35 45 – dB Color control color remainder e OCM B output remaining color difference level. Tint control voltage 2.0 V, Color = min. B-Y: stair step 1 (400 mVp-p) – – – 0 5 50 mV p-p Color difference voltage gain fluctuation with power supply voltage fluctuation ∆A BV Difference between each B B-Y: stair step output voltage gain and A B 1 under the same condition (400 mVp-p) as AB except that V CC is changed from 4.5 to 5.5 V – – – –0.5 0.0 +0.5 dB B output gain difference when freq. changes from 200 kHz to 6 MHz. Tint control voltage 2.0 V, Color = max. B-Y: sine wave 3 (400 mVp-p ) – – – 0 –3 –5 dB Stair step 1 (400 mVp-p) – – PAL/ NTSC +35 – – deg – – –35 deg Color difference freq. characteristics Tint control variable range Note fB e TMAX. See Note. e TMIN. Color = max. B demodulation angle φB is obtained from B output signal voltages using the following expressions: B1 B demodulation angle φB = tan–1 B2 Where, B1: B output signal voltage when signal is input only to R-Y B2: B output signal voltage when signal is input only to B-Y, eTMAX. and eTMIN. are obtained from the φB values using the following expressions: eTMAX. = φB(4) – φB(2), eTMIN. = φB(2) – φB(10) Where, φB(0), φB(2), φB(4): φB values when tint control voltage is 0, 2, 4 V, respectively. Remark For the input signal, see Measuring Input Signal. 29 µPC1830 (2/2) Parameter PAL mode demodulation ratio Symbol Conditions Input signal R-Y Tint control = 2 V, Color Stair step 1 B-Y P = max. (400 mV p-p) See Note1. G-Y Composite f S C PAL or MIN. /Separate (MHz) NTSC – – PAL TYP. MAX. Unit 0.50 0.56 0.62 Times 0.31 0.35 0.39 Times B-Y P PAL mode demodulation angle ∠R-Y MP 85 90 95 deg ∠G-Y MP 228 237 246 deg NTSC mode demodulation ratio R-Y B-Y MN 0.69 0.75 0.83 Times G-Y B-Y MN 0.22 0.25 0.28 Times ∠R-Y MN 100 105 110 deg ∠G-Y MN 238 247 256 deg NTSC mode demodulation angle Clamp pulse input threshold voltage E CLP R-Y input pin voltage NTSC – – – – 2.1 2.5 2.9 V E RYI – – – – 2.1 2.5 2.9 V B-Y input pin voltage E BYI – – – – 2.1 2.5 2.9 V R output pin voltage E RO – – – – 1.6 2.0 2.4 V G output pin voltage E GO – – – – 1.6 2.0 2.4 V B output pin voltage E BO – – – – 1.6 2.0 2.4 V – – – – 300 mV DC difference voltage between R, G, B outputs ∆EX-Y Note 2 Maximum value of difference voltages between E RO, E GO, and EBO RGB output DC fluctuation in color control mode ∆E RGBC Maximum value of E RO, E GO, E BO fluctuation Color control = max./min. Tint control = 2.0 V – – – – – 0 ±300 mV RGB output DC fluctuation in tint control mode ∆E RGBT Maximum value of E RO, E GO, EBO fluctuation Tint control = max./typ./min. Color control = max. – – – – – 0 ±300 mV Y input DC fluctuation in color control mode ∆EYIC Color control = max./min. Tint control = 2.0 V – – – – – 0 ±300 mV Y input DC fluctuation in tint control mode ∆EYIT Tint control = max./typ./min. Color control = max. – – – – – 0 ±300 mV – – – – 1.6 2.0 2.4 V Y input pin voltage EYI Notes 1. From R, G and B output voltages R1, G1 and B1 when signal is input only to R-Y and R, G, and B output voltages R2, G2 and B2 when signal is input only to B-Y, R, G, B demodulation ratio and demodulation angles are obtained by the following expressions: R–Y B–Y = R 12 + R 22 √ B 12 + B 22 , G–Y B–Y = G 12 + G22 √ B 12 + B 22 ∠R – Y = –tan–1 R2 B1 – tan–1 + 90° R1 B2 ∠G – Y = –tan–1 G1 – √3G2 B1 – tan–1 + 240° B2 √3G1 + G2 2. Clamp pulse input voltage which gets 80 µA or more at Y input pin voltage = VCC. Remark For the input signal, see Measuring Input Signal. 30 µPC1830 Measuring Input Signal • Stair step 1 2 400 mV p-p 1 V p-p 400 mVp-p 1 Vp-p 300 mVp-p 300 mVp-p • Sync. signal (300 mVp-p) only 300 mVp-p • Sine wave 1 400 mV p-p 2 400 mV p-p 400 mVp-p 400 mVp-p Sine Wave Mono Tone Sine Wave Mono Tone 3 4 400 mV p-p 1 V p-p 400 mVp-p 1 Vp-p Sine Wave Mono Tone Sine Wave Mono Tone 31 µPC1830 • Color bar 1 2 Variable burst or chroma signal amplitude 1 Vp-p 1 Vp-p Variable burst or chroma signal amplitude • Rainbow color bar (300 mVp-p) Rainbow chroma signal 300 mVp-p • Burst (300 mVp-p) only 300 mVp-p 32 µPC1830 Timing chart (horizontal period) 1 µs Burst signal Composite video input H sync. output (HD) 4 µs Blanking output (BLK) 10 µs 33 µPC1830 Timing chart (vertical period/standard signal input) Odd field Composite video input H sync. output (HD) Blanking output (BLK) 6H V sync. output (VD) 0.75H Even field Composite video input H sync. output (HD) Blanking output (BLK) V sync. output (VD) 5.5H 0.75H 1.25H Remark H represents horizontal scanning period. 34 VCC 1.8 kΩ 18 kΩ 75 150 Ω Ω 75 Ω VCC 1 kΩ 220 pF 0.01 µF 22 kΩ 1 kΩ 180 kΩ A733 43 kΩ C945 220 Ω + 42 41 1 µF 40 38 37 1000 pF + 22 µF 36 0.1 µF 35 1 µF 34 4.43 MHz 680 + kΩ 33 15 kΩ 820 Ω 0.01 µF 32 31 30 3.58 MHz + C945 1 kΩ Clamp Vcc 470 Ω 2.4 kΩ 0.22 µF 29 28 27 26 C945 25 24 23 Delay AFC wave detect Mode 2 1 2 3 4 330 Ω 4700 2.2 kΩ pF 3.58 MHz FSC 5 HD, VD, blanking pulse, killer output buffer 6 7 270 pF 60 Hz FV + 390 pF 2.2 µF 500 kHz 2.7 kΩ 50 Hz COMP + 0.1 µF 22 µF 9 10 BLK HD 11 14 R-Y B-Y Y PD 10 kΩ 22 µF + R-Y B-Y Y, R-Y, B-Y input clamp 15 16 17 18 19 20 21 0.1 0.22 0.22 µF µF µF VD 0.1 µF 0.22 µF 0.1 µF 180 pF 5.1 kΩ VCC 16 15 14 13 12 11 10 9 µ PD4538B 1 2 3 4 5 6 7 8 470 pF 5.1 kΩ VCC VCC Note 2 BNC R-OUT 470 µF 68 Ω Amp. color control LPF 13 0.22 µ F + Tint control killer Y R-Y B-Y Y, R-Y, B-Y output buffer 12 G + 22 µF 0.1 µF 20 kΩ Color control 20 kΩ Tint control Delay 10 kΩ 35 µPC1830 SEP VCC 8 Killer detect 4.3 kΩ 4.43 MHz SEP-SW modulate Y 32 f H VCO Vcc C945 R-Y B-Y G-Y C R-Y, B-Y fSC Contrast control B R BNC G-OUT 470 µF NTSC/PAL matrix R-Y B-Y V H BLK H/V count Mode 1 20 kΩ VCC fSC APC, killer detect, IDENT detect Separate/composite switch H 20 kΩ 0.22 µF + 22 RGB output buffer 3.58 MHz/4.43 MHz VCXO, PAL SW C V H sync. detect Mode 3 Filter f0 adjust chroma BPF chroma trap V filter VCC Separate/composite switch, ACC amp. subcolor control BNC B-OUT 470 µF 68 Ω 910 kΩ 68 Ω Sync. separate 27 kΩ 0.22 µF + 15 pF 15 pF + 4.7 µF Vcc Mode switch 10 kΩ 100 µ F VCC 0.1 µF C945 0.22 µ F 39 Note 1 10 kΩ 20 kΩ C945 VCC BNC Y-IN 75 Ω + Vcc Subcolor control 0.1 0.1 µF µF Contrast 2.2 control VCC µF VCC 20 kΩ 7. APPLICATION CIRCUIT EXAMPLE Vcc BNC SEP-C-IN Example 1 Notes 1. Crystal resonator for load of 16 pF. 4.433 619 MHz (PAL) : DAISHINKU CORP. (Type: HC-49/U) 3.579 545 MHz (NTSC) : Toyo Communication Equipment Co., Ltd. (Type: TQC203A-8R) 2. CSB500F23: Murata Mfg. Co.,Ltd. 36 Vcc BNC SEP-C-IN VCC 1.8 kΩ 18 kΩ 75 150 Ω Ω 75 Ω VCC 1 kΩ 220 pF 0.01 µF C945 22 kΩ 1 kΩ + 42 41 220 Ω 1 µF 40 10 kΩ 38 37 1000 pF + 36 0.1 µF 35 1 µF 34 3.58 MHz 680 + kΩ 22 µF 33 31 Vcc 2.4 kΩ 0.22 µF NC 30 29 28 27 26 C945 25 24 23 10 kΩ 100 µ F + C945 1 kΩ 27 kΩ Clamp V filter chroma trap 22 Delay 2 2.2 kΩ 270 pF 3 330 Ω 4700 pF 5 HD, VD, blanking pulse, killer output buffer 2.2 µF 500 kHz 2.7 kΩ 6 7 8 Killer detect 4.3 kΩ + 390 pF + 0.1 µF 22 µF 9 10 BLK HD 11 R-Y B-Y Amp. color control R-Y B-Y Y Y, R-Y, B-Y output buffer 12 13 14 PD 10 kΩ 22 µF + R-Y B-Y Y, R-Y, B-Y input clamp 15 16 17 18 19 20 0.22 0.22 µF µF VD 21 0.1 µF 0.1 µF 0.22 µF 0.1 µF 180 pF 5.1 kΩ VCC 16 15 14 13 12 11 10 9 µ PD4538B 1 2 3 4 5 6 7 8 470 pF 5.1 kΩ VCC VCC Note 2 Tint control Killer LPF Y AFC wave detect 4 modulate BNC R-OUT 470 µF 68 Ω R-Y B-Y G-Y C R-Y, B-Y fSC Contrast control Vcc 0.22 µ F + NTSC/PAL matrix APC, killer detect, IDENT detect Y 20 kΩ SEP-SW 470 µF C945 B G R R-Y B-Y V H BLK 32 f H VCO 1 fSC chroma BPF BNC G-OUT RGB output buffer 3.58 MHz/4.43 MHz VCXO, PAL SW C Separate/composite switch H/V count 20 kΩ VCC Filter f0 adjust V H VCC Separate/composite switch, ACC amp. subcolor control Sync. separate H sync. detect SEP VCC 0.22 µF + 68 Ω Mode switch BNC B-OUT 470 µF 68 Ω 910 kΩ 15 kΩ 0.01 µF 32 0.22 µF + 15 pF + 4.7 µF Vcc 0.22 µ F 39 0.1 µF C945 20 kΩ C945 Note 1 VCC BNC Y-IN 75 Ω + 180 kΩ A733 43 kΩ Vcc Subcolor control 0.1 0.1 µF µF Contrast 2.2 control VCC µF VCC 20 kΩ Example 2 (for NTSC limited use) Notes 1. Crystal resonator for load of 16 pF. 3.579 545 MHz (NTSC) : Toyo Communication Equipment Co., Ltd. (Type: TQC203A-8R) 2. CSB500F23: Murata Mfg. Co.,Ltd. + 22 µF 0.1 µF 20 kΩ Delay 10 kΩ Color control 20 kΩ Tint control COMP µPC1830 Vcc BNC SEP-C-IN 75 150 Ω Ω 75 Ω VCC 1.8 kΩ 18 kΩ 1 kΩ 220 pF 0.01 µF 22 kΩ VCC 1 kΩ 180 kΩ A733 43 kΩ C945 + 42 41 220 Ω 1 µF 40 10 kΩ C945 38 37 1000 pF + 36 0.1 µF 35 1 µF 34 0.1 µF 15 pF + 4.43 MHz 680 + kΩ 22 µF 0.22 µ F 39 4.7 µF Vcc 20 kΩ C945 Note 1 33 15 kΩ 820 Ω 31 30 10 kΩ 100 µ F Sync. separate + 27 kΩ C945 1 kΩ 29 28 27 26 C945 25 24 23 2.2 kΩ 270 pF 3 22 V H BLK 4 330 Ω 4700 pF 5 Delay 2.2 µF Contrast control HD, VD, blanking pulse, killer output buffer 6 7 8 Killer detect + 0.1 µF 22 µF 9 10 BLK HD 11 14 Y 470 µF PD 10 kΩ 22 µF + R-Y B-Y Y, R-Y, B-Y input clamp 15 16 17 18 19 20 0.22 0.22 µF µF VD 21 0.1 µF 0.1 µF 0.22 µF 0.1 µF 180 pF 5.1 kΩ VCC 16 15 14 13 12 11 10 9 µ PD4538B 1 2 3 4 5 6 7 8 470 pF 5.1 kΩ VCC VCC + 22 µF 0.1 µF 20 kΩ Color control 20 kΩ Tint control Delay 10 kΩ 37 µPC1830 Note 2 BNC R-OUT R-Y B-Y R-Y B-Y 13 0.22 µ F + 68 Ω Amp. color control Y, R-Y, B-Y output buffer 12 G B Tint control Killer LPF Y Vcc C945 R-Y B-Y G-Y Y 4.3 kΩ + 390 pF R C R-Y, B-Y fSC modulate BNC G-OUT 470 µF NTSC/PAL matrix R-Y B-Y AFC wave detect 500 kHz 2.7 kΩ COMP fSC APC, killer detect, IDENT detect Separate/composite switch 32 f H VCO SEP-SW 0.22 µF + RGB output buffer 3.58 MHz/4.43 MHz VCXO, PAL SW C V H/V count 2 Filter f0 adjust chroma BPF chroma trap H 1 Separate/composite switch, ACC amp. subcolor control Clamp V filter H sync. detect SEP VCC 470 µF 68 Ω Mode switch BNC B-OUT Vcc 0.22 µF 470 Ω NC 0.01 µF 32 0.22 µF + 68 Ω 910 kΩ VCC BNC Y-IN 75 Ω + Vcc Subcolor control 0.1 0.1 µF µF Contrast 2.2 control VCC µF VCC 20 kΩ Example 3 (for PAL limited use) Notes 1. Crystal resonator for load of 16 pF. 4.433 619 MHz (PAL) : DAISHINKU CORP. (Type: HC-49/U) 2. CSB500F23: Murata Mfg. Co.,Ltd. 38 BNC SEP-C-IN VCC 1.8 kΩ 18 kΩ 75 150 Ω Ω 75 Ω VCC 1 kΩ 220 pF 0.01 µF A733 43 kΩ C945 22 kΩ 1 kΩ + 42 41 220 Ω 40 38 37 + 36 0.1 µF 35 1 µF 34 4.43 MHz 680 + kΩ 22 µF Mode switch 10 kΩ 100 µ F Sync. separate + C945 1 kΩ 27 kΩ 33 32 31 30 3.58 MHz 910 kΩ 15 kΩ 820 Ω NC 470 Ω 2.4 kΩ 0.22 µF 0.01 µF 29 28 27 26 25 24 23 22 20 kΩ VCC Delay Mode 2 modulate R-Y B-Y Contrast control 1 3.58 MHz FSC 2 2.2 kΩ 3 4 330 Ω 4700 pF 5 7 270 pF 60 Hz FV Killer detect 4.3 kΩ + 390 pF 2.2 µF 500 kHz 2.7 kΩ 50 Hz SEP VCC 8 + 9 10 LPF BLK HD Y Y, R-Y, B-Y output buffer 11 12 VD Y 13 14 R-Y B-Y Amp. color control R-Y B-Y Y, R-Y, B-Y input clamp 15 16 17 18 19 20 21 R-Y B-Y 0.1 µF 22 µF VCC VCC Note 2 G Tint control Killer Y R-Y B-Y 6 B R-Y B-Y G-Y C R-Y, B-Y fSC HD, VD, blanking pulse, killer output buffer 4.43 MHz SEP-SW R NTSC/PAL matrix Y AFC wave detect 32 f H VCO Mode 1 20 kΩ fSC APC, killer detect, IDENT detect Separate/composite switch V H BLK RGB output buffer 3.58 MHz/4.43 MHz VCXO, PAL SW C V H/V count Mode 3 Filter f0 adjust chroma BPF chroma trap H VCC Separate/composite switch, ACC amp. subcolor control Clamp V filter H sync. detect VCC 1000 pF 15 pF 15 pF + 4.7 µF Vcc 0.22 µ F 39 0.1 µF C945 20 kΩ 1 µF Note 1 10 kΩ VCC BNC Y-IN 75 Ω + 180 kΩ Vcc Subcolor control 0.1 0.1 µF µF Contrast 2.2 control VCC µF VCC 20 kΩ Example 4 (When RGB matrix section not used) Notes 1. Crystal resonator for load of 16 pF. 4.433 619 MHz (PAL) : DAISHINKU CORP. (Type: HC-49/U) 3.579 545 MHz (NTSC) : Toyo Communication Equipment Co., Ltd. (Type: TQC203A-8R) 2. CSB500F23: Murata Mfg. Co.,Ltd. + 0.1 µF 22 µF COMP µPC1830 µPC1830 8. OPERATING PRECAUTIONS 8.1 µPC1830 External Components (1) Resistors Use E24 series resistors (approximately 5% precision) of 1/4 W or higher. (2) Capacitors • Ceramic capacitors of 1000 pF or below Capacitors used for the time constant circuit. Basically use E12 series (10% precision) ones with the center value = 0 in nominal temperature characteristic. • Ceramic capacitors of 1000 pF or higher Equivalent to capacitors for non-critical time constant circuits and for clamp, and bypass capacitors between power supply and GND. Use E12 series (10% precision) ones. Use a type whose capacitance is not extremely affected by temperature variations (ie. with an excellent temperature characteristic). • Electrolytic capacitors Use E6 series (20% precision) ones. Use ones whose capacitance is not extremely affected by temperature variations (ie. with an excellent temperature characteristic). (3) Crystal resonators Use crystal resonators of 16 pF load type as shown below. • For PAL : 4.433 619 MHz (model name: HC-49/U, manufactured by Kinseki, Ltd.) • For NTSC : 3.579 545 MHz (model name: TQC203A-8R (HC-49/U-10 type), manufactured by Toyo Communication Equipment Co., Ltd.) Note that use of crystal resonators other than the above may deteriorate electrical characteristics. (4) Ceramic resonators Use ceramic resonators as shown below. • CSB500 F23 (manufactured by Murata Mfg. Co., Ltd.) Note that use of ceramic resonators other than the above may deteriorate mainly electrical characteristics of the sync. section. 39 µPC1830 8.2 µPC1830 Pattern Wiring (1) GND line Solid grounding should be applied to three GNDs: synchronous section GND (pin 5), video section GND (pin 15) and chroma section GND (pin 33). They should not be connected to other digital GNDs except the one point of origin. Use thick connection (thick through hole) for each GND pin of the IC. When an emitter follower circuit, amplifier, etc. is connected to the color difference output stage or RGB output stage, separate the solid ground of the output stage from that of the IC output stage. (2) Power supply line The three analog power supplies, synchronous section power supply (pin 7), video section power supply (pin 17) and chroma section power supply (pin 35) should be independent of each other and unified at the supply source. Ensure that there is no unnecessary routing. Separate the digital section power supply from the analog section power supply and connect them only at one point. (3) Signal line In order to avoid signal cross talk, ensure that the color difference signal line (pins 12, 13, and 14) and RGB signal line (pins 23, 24, and 25) are not placed close to or in parallel with the digital signal line or HD (pin 10), VD (pin 11) and BLK (pin 9) lines, or cross those lines. (4) Placement of peripheral components of each pin Place components which are connected with pins 1, 2, 5, 7, 15, 16, 17, 18, 19, 23, 24, 25, 28, 29, 33, 34, and 35 close to the IC. When the placed components are connected to the power supply line or other lines, route low-impedance lines and make sure that the thickest possible lines are used for connection with the IC pins. 40 µPC1830 9. PACKAGE DRAWING 42 PIN PLASTIC SHRINK SOP (375 mil) 42 22 3°–+7° 3° detail of lead end 1 21 A H J E K F G I N C D M B L M S42GT-80-375B-1 NOTE Each lead centerline is located within 0.10 mm (0.004 inch) of its true position (T.P.) at maximum material condition. ITEM MILLIMETERS INCHES A 18.16 MAX. 0.715 MAX. B 1.13 MAX. 0.044 MAX. C 0.8 (T.P.) 0.031 (T.P.) D 0.35 +0.10 –0.05 0.014 +0.004 –0.003 E 0.125±0.075 0.005±0.003 F 2.9 MAX. 0.115 MAX. G 2.5±0.2 0.098+0.009 –0.008 H 10.3±0.3 0.406+0.012 –0.013 I 7.15±0.2 0.281+0.009 –0.008 J 1.6±0.2 0.063±0.008 K 0.15 +0.10 –0.05 0.006 +0.004 –0.002 L 0.8±0.2 0.031 +0.009 –0.008 M 0.10 0.004 N 0.10 0.004 41 µPC1830 10. RECOMMENDED SOLDERING CONDITIONS When soldering this product, it is highly recommended to observe the conditions as shown below. If other soldering processes are used, or if the soldering is performed under different conditions, please make sure to consult with our sales offices. For more details, refer to our document “SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL” (C10535E). Surface Mount Device µPC1830GT: 42-pin plastic shrink SOP (375 mil) Process Conditions Symbol Infrared ray reflow Peak temperature: 235 °C or below (Package surface temperature), Reflow time: 30 seconds or less (at 210 °C or higher), Maximum number of reflow processes: 2 times. IR35-00-2 Vapor phase soldering Peak temperature: 215 °C or below (Package surface temperature), Reflow time: 40 seconds or less (at 200 °C or higher), Maximum number of reflow processes: 2 times. VP15-00-2 Partial heating method Pin temperature: 300 °C or below, Heat time: 3 seconds or less (Per each side of the device). Caution Apply only one kind of soldering condition to a device, except for “partial heating method”, or the device will be damaged by heat stress. 42 — µPC1830 [MEMO] 43 µPC1830 [MEMO] The application circuits and their parameters are for reference only and are not intended for use in actual design-ins. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. Anti-radioactive design is not implemented in this product. M4 96.5