CXG1097EN Low Noise Amplifier with Bypass Switch/Mixer For the availability of this product, please contact the sales office. Description The CXG1097EN is a dual mode low noise amplifier with a bypass switch/ mixer MMIC for Japan CDMA cellular. This IC is designed using the Sony's GaAs J-FET process. 16 pin VSON (Plastic) Features • Dual mode low noise amplifier with a bypass switch • High gain Low noise amplifier high current mode: Gp = 14.5dB (Typ.) Mixer: Gc = 12.0dB (Typ.) • Low noise Low noise amplifier high current mode: NF = 1.6dB (Typ.) Mixer: NF = 4.5dB (Typ.) • Low distortion Low noise amplifier high current mode: IIP3 = +4.5dBm (Typ.) Mixer: IIP3 = +3dBm (Typ.) • Small package 16-pin VSON Absolute Maximum Ratings (Ta = 25°C) • Supply voltage VDD 4.5 • Input power PIN +5 • Operating temperature Topr –35 to +85 • Storage temperature Tstg –65 to +150 V dBm Recommended Operating Conditions • Supply voltage VDD 2.7 to 3.3 • Control voltage VCTL (H) 2.4 to 3.3 VCTL (L) 0 to 0.3 °C °C V V V Applications Japan CDMA cellular (J-CDMA) Element Structure GaAs J-FET MMIC Block Diagram Pin Configuration 9 8 RFOUT SW RFOUT 10 7 SW RFIN CTL1 11 6 CTL2 LNA RFIN 12 5 LNA RFOUT/VDD (LNA, Logic) CAP 13 4 GND GND 14 3 MIX RFIN VDD (LO AMP) 15 2 GND IFOUT/VDD (MIX) 16 1 LOIN RFIN RFIN 9 SW RFOUT 10 LNA RFIN 12 8 RFOUT 7 5 3 IFOUT 16 SW RFIN LNA RFOUT MIX RFIN 1 LOIN Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E99Z08A05-PS CXG1097EN Electrical Characteristics Conditions: VDD = 2.7V, VCTL (H) = 2.7V, VCTL (L) = 0V, fRF = 850MHz, fLO = 740MHz, PLO = –10dBm, unless otherwise specified (Ta = 25°C) Block Item VCTL1 VCTL2 Symbol Min. Typ. Max. Unit Control current for High state L L H L L or H H ICTLH — 50 70 IDDSW — 0.3 0.6 L IDDL — 3.8 5 H H IDDH — 10.5 17 L L or H GPSW H L GPL 11 12.5 14 H H GPH 13 14.5 16 H L NFL — 1.8 2.3 H H NFH — 1.6 2.1 L L or H IIP3SW 25 35 — H L IIP3L –3 0 — H H IIP3H 2 4.5 — H L H ISO 20 24 — dB When a small signal H Current consumption IDD — 7.5 10 mA When no signal Conversion gain GC 10.5 12 13.5 dB Noise figure NF — 4.5 6 dB Input IP3 IIP3 0.5 3 — LO to RF leak level PLK — –30 Current consumption Power gain Low noise amplifier block Noise figure Input IP3 Isolation Mixer block H Measurement condition µA When no signal mA –3.7 –3.2 –2.7 dB When a small signal dB dBm ∗1 When a small signal dBm ∗1 –25 dBm — ∗1 fRF=850MHz/850.9MHz, PRF = –25dBm (low noise amplifier mode, mixer)/0dBm (bypass switch mode) Conversion by the IM3 suppression ratio for two-wave input. Note) The values shown above are the specified values on the Sony's recommended evaluation board. –2– CXG1097EN Recommended Evaluation Circuit C3 C1 8 9 RFIN RFOUT C2 CTL1 10 7 11 6 12 5 CTL2 L1 13 4 14 3 L2 L3 L6 L4 VDD (LNA, Logic) C5 C4 VDD (LO AMP) C7 L8 C6 15 2 16 1 MIX RFIN L5 L7 L9 IFOUT C9 C8 L10 VDD (MIX) C10 L1 18nH C1 100pF L2 18nH C2 100pF L3 33nH C3 100pF L4 10nH C4 1000pF L5 15nH C5 1000pF L6 27nH C6 100pF L7 33nH C7 1000pF L8 33nH C8 6pF L9 220nH C9 1000pF L10 180nH C10 1000pF –3– LOIN CXG1097EN Example of Representative Characteristics (Ta = 25°C) Low Noise Amplifier Block GpH, NFH vs. fRF GpL, NFL vs. fRF GpL Gp [dB] 13 7 15 6 14 6 5 13 5 12 12 4 11 3 11 2 10 1 9 NFL 10 9 GpH 7 4 VDD = 2.7V VCTL1 = 2.7V VCTL2 = 2.7V 3 2 NFH 1 8 0 800 810 820 830 840 850 860 870 880 890 900 0 8 800 810 820 830 840 850 860 870 880 890 900 fRF [MHz] fRF [MHz] POUTL, IM3L vs. Pin POUTH , IM3H vs. Pin 30 30 20 20 10 10 0 0 POUTH POUTL –10 POUT [dBm] –10 POUT [dBm] 8 –20 –30 –40 IM3L VDD = 2.7V VCTL1 = 2.7V VCTL2 = 0V fRF1 = 850MHz fRF2 = 850.9MHz –50 –60 –70 –80 –40 NF [dB] 14 16 Gp [dB] 15 VDD = 2.7V VCTL1 = 2.7V VCTL2 = 0V 8 NF [dB] 16 –30 –20 –10 0 –20 –30 Pin [dBm] VDD = 2.7V VCTL1 = 2.7V VCTL2 = 2.7V fRF1 = 850MHz fRF2 = 850.9MHz –50 –60 –70 –80 –40 10 IM3H –40 –30 –20 –10 Pin [dBm] –4– 0 10 CXG1097EN Example of Representative Characteristics (Ta = 25°C) Mixer Block Gc, NF vs. fRF Gc, NF vs. PLO 9 13 12 8 12 8 11 7 11 7 13 9 9 6 Gc [dB] VDD = 2.7V fLO = fRF – 110MHz PLO = –10dBm 10 VDD = 2.7V fRF = 850MHz fLO = 740MHz 10 5 9 4 8 6 NF [dB] Gc NF [dB] Gc [dB] Gc 5 NF NF 8 3 7 800 810 820 830 840 850 860 870 880 890 900 7 –25 4 3 –20 fRF [MHz] –15 –10 –5 0 PLO [dBm] POUT, IM3 vs. Pin IIP3, Plk vs. PLO 30 4 –20 IIP3 20 3 10 2 POUT IIP3 [dBm] POUT [dBm] –10 –20 IM3 –30 –25 1 Plk –30 0 –1 VDD = 2.7V fRF1 = 850MHz fRF2 = 850.9MHz fLO = 740MHz PLO = –10dBm –40 VDD = 2.7V fRF1 = 850MHz fRF2 = 850.9MHz fLO = 740MHz PLO = –10dBm –50 –60 –70 –80 –40 –30 –20 –10 0 –2 –3 –4 –25 –40 –20 –15 –10 PLO [dBm] 10 Pin [dBm] –5– –35 –5 0 Plk [dBm] 0 CXG1097EN Recommended Evaluation Board Front 50mm RFIN RFOUT MIX RFIN LOIN IFOUT Glass fabric-base 4-layer epoxy board (thickness: 0.2mm × 2) GND for the whole 2nd and 3rd layers VDD (LO AMP) GND VDD (MIX) VCTL1 VCTL2 VDD (LNA, Logic) Enlarged Diagram of Center Part C1 C3 C2 L1 L2 C7 C6 C4 L6 L8 C8 L7 L9 L10 C10 C9 –6– L3 L5 C5 L4 CXG1097EN Package Outline Unit: mm 16PIN VSON(PLASTIC) 0.9 MAX 0.6 3.5 0.05 S A B 0.4 2x 0.35 ± 0.1 0.2 S B 4x 0.2 S A B 0.03 ± 0.03 0.2 ± 0.01 0.05 M S A-B 0.23 ± 0.02 1.4 0.5 ± 0.2 2.7 2.5 0.35 ± 0.1 S Soldrer Plating 0.13 ± 0.025 + 0.09 0.14 – 0.03 NOTE: 1) The dimensions of the terminal section apply to the ranges of 0.1mm and 0.25mm from the end of a terminal. TERMINAL SECTION PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN LEAD TREATMENT SOLDER PLATING EIAJ CODE LEAD MATERIAL COPPER ALLOY JEDEC CODE PACKAGE MASS 0.02 g SONY CODE VSON-16P-01 –7– Sony Corporation