CXG1130AER Triple Low Noise Amplifier/Dual Mixer Description The CXG1130AER is a triple low noise amplifier/ dual mixer. This IC is designed using the Sony’s GaAs J-FET process. Features • Single 3V power supply operation • 2-pin control by the on-chip logic circuit • High gain: Gp = 16.5dB (LNA typ.) Gc = 10dB (MIX typ.) • Low noise figure: NF = 1.5 to 1.6dB (LNA typ.) NF = 4.5dB (MIX typ.) • Low LO input power operation • 24-pin VQFN small package Applications 800MHz/1.5GHz Japan digital cellular phones (PDC) Structure GaAs J-FET MMIC 24 pin VQFN (Plastic) Absolute Maximum Ratings (Ta = 25°C) • Supply voltage VDD 4.5 V • Input power PIN +13 dBm • Current consumption IDD 15 mA • Operating temperature Topr –35 to +85 °C • Storage temperature Tstg –65 to +150 °C Recommended Operating Conditions 2.7 to 3.3 • Supply voltage VDD • Control voltage VCTL (H) 2.4 to 3.3 VCTL (L) 0 to 0.3 V V V GaAs MMICs are ESD sensitive devices. Special handling precautions are required. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E01827-PS CXG1130AER RFin1 CAP1 CAP2 RFin2 CAP3 RFin3 Block Diagram and Pin Configuration 12 11 10 9 8 7 CTL1 15 4 CTL2 MIXin1 16 3 GND GND 17 2 OPT VDD_LO1 18 1 MIXin2 19 20 21 22 23 24 VDD_LO2 GND GND 5 IFout GND 14 LOin2 RFout2 GND 6 LOin1 RFout1 13 Recommended Evaluation Circuit LNAin_885MHz LNAin_810MHz LNAin_1490MHz 2.7nH 27nH VDD_LNA800MHz-band 22pF 100pF 15nH VDD_LNA1500MHz-band 12pF 22nH 1nF 8.2nH 1nF 12 10nH LNAout_810/885MHz 11 10 9 8 7 3.9nH LNAout_1490MHz 6.8nH 100pF 13 6 14 5 15 4 16 3 17 2 18 1 18nH 100pF 4.7kΩ CTL1 MIXin_810/885MHz CTL2 4.7kΩ 2.7nH 22nH 10nH VDD_LO680/755MHz 1nF 33nH 470kΩ MIXin_1490MHz 8.2nH 1nH 19 20 21 22 23 24 2.7nH 8.2nH 39nH LOin_680/755MHz 8.2nH LOin_1360MHz 5pF VDD_LO1360MHz 1nF 150nH 3.9nH IFout_130MHz 100pF 100nH 1nF VDD_MIX –2– CXG1130AER Electrical Characteristics The normalized values are those when the Sony’s recommended evaluation board is used. 800MHz Band Low Noise Amplifier Conditions: Unless otherwise specified, VDD = 3.0V, VCTL (H) = 3.0V, VCTL (L) = 0V, fRF1 = 885MHz, fRF2 = 810MHz (Ta = 25°C) Item Symbol Current consumption IDD Control current ICTL1 Path — — RFIN1 → RFOUT1 Power gain Frequency VCTL1 VCTL2 Min. NF Input IP3 IIP3 Isolation ISO Max. — H L — 2.0 2.65 — L L — 2.0 2.65 — H L — 60 90 — L L –5 0 5 H L 14.5 16.5 18.5 L L — –20 –15 H L — –25 –20 L L 14.5 16.5 18.5 fRF1 Gp Noise figure Typ. RFIN2 → RFOUT1 fRF2 RFIN1 → RFOUT1 fRF1 H L — 1.3 2.0 RFIN2 → RFOUT1 fRF2 L L — 1.5 2.0 RFIN1 → RFOUT1 fRF1 H L –10 –6.5 — RFIN2 → RFOUT1 fRF2 L L –11 –8 — RFOUT1 → RFIN1 fRF1 H L 22 26 — RFOUT1 → RFIN2 fRF2 L L 18 22 — Unit Measurement condition mA When no signal µA dB When a small signal dB dBm ∗1 dB When a small signal ∗1 Conversion from the IM3 suppression ratio for two-wave input: fRFoffset = 100kHz, PRF = –30dBm. 1.5GHz Band Low Noise Amplifier Conditions: Unless otherwise specified, VDD = 3.0V, VCTL (H) = 3.0V, VCTL (L) = 0V, fRF3 = 1490MHz (Ta = 25°C) Item Symbol Path Frequency VCTL1 VCTL2 Min. Typ. Max. Unit Current consumption IDD — — — H — 2.9 3.7 mA Control current ICTL2 — — — H — 90 120 µA Power gain Gp RFIN3 → RFOUT2 fRF3 — H 14 16 18 dB Noise figure NF RFIN3 → RFOUT2 fRF3 — H — 1.6 2.1 dB Input IP3 IIP3 RFIN3 → RFOUT2 fRF3 — H –9 –6 — Isolation ISO RFOUT2 → RFIN3 fRF3 — H 20 23 — Measurement condition When no signal When a small signal dBm ∗1 dB When a small signal ∗1 Conversion from the IM3 suppression ratio for two-wave input: fRFoffset = 100kHz, PRF = –30dBm. –3– CXG1130AER 800MHz Band Mixer Conditions: Unless otherwise specified, VDD = 3.0V, VCTL (H) = 3.0V, VCTL (L) = 0V, fRF1 = 885MHz, fRF2 = 810MHz, fLO = fRF – 130MHz, PLO = –15dBm (Ta = 25°C) Item Symbol RF frequency VCTL1 VCTL2 Min. Typ. Max. Unit Measurement condition Current consumption IDD — — L — 5 6.5 mA Control current ICTL2 — — L –5 0 5 µA Conversion gain Gc fRF1 — L 9 10 11.5 fRF2 — L 8.5 9.5 11 fRF1 — L — 5 6.5 fRF2 — L — 4 5.5 fRF1 — L –1 +2 — fRF2 — L –0.5 +2.5 — fRF1 — L — –21 –18 fRF2 — L — –24 –21 Noise figure NF Input IP3 IIP3 LO → RF leak Plk When no signal dB When a small signal dB dBm ∗1 dBm fLO = 755MHz fLO = 680MHz ∗1 Conversion from the IM3 suppression ratio for two-wave input: fRFoffset = 100kHz, PRF = –25dBm. 1.5GHz Band Mixer Conditions: Unless otherwise specified, VDD = 3.0V, VCTL (H) = 3.0V, VCTL (L) = 0V, fRF3 = 1490MHz, fLO = 1360MHz, PLO = –15dBm Item Symbol RF frequency VCTL1 VCTL2 Min. Typ. Max. (Ta = 25°C) Unit Measurement condition Current consumption IDD — — H — 5.5 7.5 mA Control current ICTL2 — — H — 90 120 µA Conversion gain Gc fRF3 — H 9 10 11.5 dB Noise figure NF fRF3 — H — 4.5 6 dB Input IP3 IIP3 fRF3 — H –1 +2 — LO → RF leak Plk fRF3 — H — –24 –21 When no signal When a small signal dBm ∗1 dBm fLO = 1360MHz ∗1 Conversion from the IM3 suppression ratio for two-wave input: fRFoffset = 100kHz, PRF = –25dBm. Operation Logic VCTL1 VCTL2 LNA1 (800MHz_U) LNA2 (800MHz_L) LNA3 (1.5GHz) MIX1 (800MHz) MIX2 (1.5GHz) H L ON OFF OFF ON OFF L L OFF ON OFF ON OFF — H OFF OFF ON OFF ON –4– CXG1130AER Example of Representative Characteristics 1. CXG1130AER frequency characteristics of main items in LNA block (25°C) [Condition] VDD = 3V, 800MHz_L (Pin 9 input → Pin 13 output): VCTL1 = 0V, VCTL2 = 0V, 800MHz_U (Pin 12 input → Pin 13 output): VCTL1 = 3V, VCTL2 = 0V, 1500MHz (Pin 7 input → Pin 6 output): VCTL2 = 3V Gp and NF are those when a small signal is input. The input IP3 is converted from the IM3 suppression ratio for two-wave input: fRFoffset = 100kHz, PRF = –30dBm. Power gain Gp 19 18 18 800MHz (U) 17 16 Gp [dB] Gp [dB] Power gain Gp 19 800MHz (L) 15 14 780 17 1500MHz 16 15 800 820 840 860 880 900 14 1440 920 1460 f [MHz] 1480 1500 1520 1540 f [MHz] Noise figure NF Noise figure NF 2.5 2.5 2.0 2.0 1.5 1.5 NF [dB] NF [dB] 1500MHz 800MHz (U) 1.0 800MHz (L) 0.5 0 780 1.0 0.5 800 820 840 860 880 900 0 1440 920 1460 f [MHz] 1480 –2 –4 –4 1540 1500MHz Input IP3 [dBm] 800MHz (U) Input IP3 [dBm] 1520 Input IP3 Input IP3 –2 –6 –8 800MHz (L) –6 –8 –10 –10 –12 780 1500 f [MHz] 800 820 840 860 f [MHz] 880 900 –12 1440 920 –5– 1460 1480 1500 f [MHz] 1520 1540 CXG1130AER 2. CXG1130AER frequency characteristics of main items in MIX block (25°C) [Condition] VDD = 3V, fLO = fRF – 130MHz, PLO = –15dBm, 800MHz: VCTL2 = 0V, 1500MHz: VCTL2 = 3V Gc and NF are those when a small signal is input. The input IP3 is converted from the IM3 suppression ratio for two-wave input: fRFoffset = 100kHz, PRF = –25dBm. Conversion gain Gc Conversion gain Gc 12 12 11 11 1500MHz 10 Gc [dB] Gc [dB] 800MHz 10 9 9 8 8 7 780 800 820 840 860 880 900 7 1440 920 1460 f [MHz] 8 8 6 6 800MHz 4 2 1540 1520 1540 1500MHz 4 2 800 820 840 860 880 900 0 1440 920 1460 f [MHz] 1480 1500 f [MHz] Input IP3 Input IP3 4 4 3 3 Input IP3 [dBm] Input IP3 [dBm] 1520 Noise figure NF 10 NF [dB] NF [dB] Noise figure NF 2 800MHz 1 1500MHz 2 1 0 0 –1 780 1500 f [MHz] 10 0 780 1480 800 820 840 860 880 900 –1 1440 920 1460 1480 1500 f [MHz] f [MHz] –6– 1520 1540 CXG1130AER Recommended Evaluation Board LNA_800MHz (U) in LNA_800MHz (L) in LNA_1500MHz in LNA_1500MHz out LNA_800MHz out VDD_LNA800MHz VDD_LNA1500MHz CTL1 MIX_800MHz in MIX_1500MHz in CTL2 VDD_Lo800MHz VDD_Lo1500MHz VDD_MIX LO_800MHz in SONY IFout G1130 Glass fabric-base 4-layer epoxy board Thickness of film between layers 1 and 2: 0.2mm Dimension: 50mm × 66mm LNA15 A15 CTL2 LO15 MIX LO8 CTL1 LNA8 A8 LO_1500MHz in Enlarged Diagram of External Circuit Block C3 L2 L10 L7 L6 L9 C4 C4 C2 L3 C4 L5 L4 L8 C5 L2 L9 C5 R1 L6 L2 L11 C5 L5 L12 L5 L1 L5 C5 C1 L3 L1 = 1nH L2 = 2.7nH L3 = 3.9nH L4 = 6.8nH L5 = 8.2nH L6 = 10nH L7 = 15nH L8 = 18nH L9 = 22nH L10 = 27nH L11 = 33nH L12 = 39nH L13 = 100nH L14 = 150nH C1 C2 C3 C4 C5 = = = = = 5pF 12pF 22pF 100pF 1nF R1 = 470Ω L14 L13 C5 C4 –7– Series resistors of 4.7kΩ to CTL1 and CTL2 are attached on the solder side of the board. CXG1130AER Package Outline Unit: mm 24PIN VQFN(PLASTIC) 0.9 ± 0.1 4.0 0.6 ± 0.1 3.6 18 A 19 0.05 S 0.7 C 13 12 B 9) .3 (0 78 4. PIN 1 INDEX 24 ˚ 45 S x4 .1 1.0 0.2 S A-B C (0 0.4 5) 6 C 1 0. 6 7 x4 0.2 ± 0.01 0.03 ± 0.03 (∗1) (Stand Off) 0.05 M S A-B C 0.225 ± 0.03 0.2 S A-B C Solder Plating 0.13 ± 0.025 + 0.09 0.14 – 0.03 TERMINAL SECTION PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN LEAD TREATMENT SOLDER PLATING EIAJ CODE LEAD MATERIAL COPPER ALLOY JEDEC CODE PACKAGE MASS 0.04g VQFN-24P-03 SONY CODE LEAD SPECIFICATIONS ITEM SPEC. LEAD MATERIAL COPPER ALLOY SOLDER PLATING Sn-Bi Bi:1-4wt% LEAD TREATMENT THICKNESS 5-18µm –8– Sony Corporation