SONY CXG1131ER

CXG1131ER
High Power 3 × 5 Antenna Switch MMIC with Integrated Control Logic
Description
The CXG1131ER is a high power antenna switch
MMIC for PDC full packet 1.5GHz handsets. This IC is
suited to connect Tx/Rx/duplexer to one of 4 antennas.
The CXG1131ER has on-chip logic circuit for operation
with 4 CMOS inputs. The Sony's GaAs J-FET process
is used for low insertion loss and low voltage operation.
24 pin VQFN (Plastic)
Features
• Low insertion loss: 1.0dB @1.5GHz
• High linearity: Harmonic < – 65dBc
• CMOS compatible input control
• Small package: 24-pin VQFN (4.0mm × 4.0mm)
Applications
3 × 5 antenna switch for digital cellular such as PDC handsets
Structure
GaAs J-FET MMIC
Absolute Maximum Ratings (Ta = 25°C)
• Bias voltage
VDD
• Control voltage
• Operating temperature
• Storage temperature
Vctl
Topr
Tstg
7
5
–35 to +85
–65 to +150
V
V
°C
°C
GaAs MMICs are ESD sensitive devices. Special handling precautions are required.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E02110-PS
CXG1131ER
Block Diagram
F13
F1
Ext
Tx
F15
Dup_In
F14
F2
F9
F16
GND3
F3
Ant
Dup_Out
F4
F17
F10
F5
GND4
F6
GND1
F7
D_Ant
Rx
F11
F8
GND2
D_Ext
F12
–2–
CXG1131ER
Dup_In
10
9
Ant
CRF (100pF)
GND
11
Z1
GND
12
GND
CRF (100pF)
GND1
Tx
Pin Configuration/Recommended Circuit
8
7
13
GND3
GND4
CRF (100pF)
Z3
14
5
GND
15
4
GND
16
3
Z4
17
2
18
1
Dup_Out
Ext
6
CRF (100pF)
CRF (100pF)
GND
D_Ext
GND
Z2
D_Ant
CRF (100pF)
Cbypass
(100pF)
VDD
CTLD
CTLC
24
Cbypass
(100pF)
23
Cbypass
(100pF)
22
CTLB
Cbypass
(100pF)
CTLA
Rx
21
Cbypass
(100pF)
20
CRF (100pF)
19
When using this IC, the following external components should be used:
CRF:
This capacitor is used for RF de-coupling and must be used for all applications.
100pF is recommended.
Cbypass: This capacitor is used for DC line filtering. 100pF is recommended.
Z1 to Z4: It is recommended that these pins be directly grounded.
–3–
GND2
CXG1131ER
Truth Table
A: Rx/Tx
B: Main/diversity
C: External/antenna
D: TDMA/28.8k
State
On Pass
A
B
C
D
F1 F2 F3 F4 F5 F6
F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17
1
Tx – Ext
H
—
L
L
H
L
L
L
L
L
L
L
L
H
H
H
H
L
L
H
H
2
Tx – Ant
H
—
H
L
L
H
L
L
L
L
L
L
H
L
H
H
H
L
L
H
H
3
Rx – Ext
L
L
L
L
L
L
L
L
H
L
L
L
L
H
H
H
L
H
L
H
H
4
Rx – Ant
L
L
H
L
L
L
L
L
L
H
L
L
H
L
H
H
L
H
L
H
H
5
Rx – D_Ext
L
H
L
L
L
L
L
L
L
L
L
H
H
H
H
L
L
H
L
H
H
6
Rx – D_Ant
L
H
H
L
L
L
L
L
L
L
H
L
H
H
L
H
L
H
L
H
H
—
L
H
H
L
L
L
H
L
H
L
L
H
L
H
H
L
H
H
L
L
—
H
H
H
L
L
L
H
L
L
H
L
H
L
L
H
L
H
H
L
L
—
L
L
H
L
L
H
L
H
L
L
L
L
H
H
H
L
H
H
L
L
—
H
L
H
L
L
H
L
L
L
L
H
L
H
H
L
L
H
H
L
L
7
Dup_Out – Ant
Rx – Ant
8
Dup_Out – Ant
Rx – D_Ant
9
Dup_Out – Ext
Rx – Ext
10
Dup_Out – Ext
Rx – D_Ext
DC Bias Condition
Item
(Ta = 25°C)
Min.
Typ.
Max.
Unit
VDD
2.7
3.0
3.3
V
Vctl (H)
2.0
3.0
3.6
V
Vctl (L)
0
0.4
V
–4–
CXG1131ER
Electrical Characteristics
Item
Insertion loss
Isolation
(Ta = 25°C)
Symbol
IL
ISO.
Port
Condition
Min. Typ. Max. Unit
Tx – Ext
∗1
—
1.0
1.3
dB
Tx – Ant
∗1
—
1.0
1.3
dB
Tx – Dup_In
∗1
—
0.35 0.65
dB
Rx – Ext
∗2
—
0.85 1.15
dB
Rx – Ant
∗2
—
0.85 1.15
dB
Rx – D_Ext
∗2
—
0.7
1.0
dB
Rx – D_Ant
∗2
—
0.7
1.0
dB
Dup_Out – Ext
∗1 , ∗4
—
1.2
1.5
dB
Rx – Ext
∗2 , ∗5
—
1.2
1.5
dB
Dup_Out – Ant
∗1 , ∗4
—
1.3
1.6
dB
Rx – Ant
∗2 , ∗5
—
1.3
1.6
dB
Dup_Out – Ext
∗1 , ∗4
—
0.75 1.05
dB
Rx – D_Ext
∗2 , ∗5
—
0.75 1.05
dB
Dup_Out – Ant
∗1 , ∗4
—
0.75 1.05
dB
Rx – D_Ant
∗2 , ∗5
—
0.75 1.05
dB
Tx – Ext
∗1
30
33
—
dB
Tx – Ant
∗1
30
33
—
dB
Tx – Dup_In
∗1
26
29
—
dB
Rx – Ext
∗2
35
38
—
dB
Rx – Ant
∗2
35
38
—
dB
Rx – D_Ext
∗2
30
33
—
dB
Rx – D_Ant
∗2
27
30
—
dB
Dup_Out – Ext
∗1 , ∗4
30
33
—
dB
Rx – Ext
∗2 , ∗5
35
38
—
dB
Dup_Out – Ant
∗1 , ∗4
27
30
—
dB
Rx – Ant
∗2 , ∗5
35
38
—
dB
Dup_Out – Ext
∗1 , ∗4
30
33
—
dB
Rx – D_Ext
∗2 , ∗5
30
33
—
dB
Dup_Out – Ant
∗1 , ∗4
30
33
—
dB
Rx – D_Ant
∗2 , ∗5
27
30
—
dB
Tx – Rx (Full packet)
∗1
47
50
—
dB
Tx – Rx (TDMA)
∗1
14
17
—
dB
–5–
CXG1131ER
Item
Symbol
2fo
Harmonics
3fo
±50kHz
ACP
±100kHz
P1dB
P1dB
Port
Condition
Min. Typ. Max. Unit
Tx – Ext
∗3
—
–75
–60
dBc
Tx – Ant
∗3
—
–75
–60
dBc
Tx – Dup_In
∗3
—
–80
–60
dBc
Dup_Out – Ext
∗3 , ∗4
—
–75
–60
dBc
Dup_Out – Ant
∗3 , ∗4
—
–75
–60
dBc
Tx – Ext
∗3
—
–67
–60
dBc
Tx – Ant
∗3
—
–67
–60
dBc
Tx – Dup_In
∗3
—
–75
–60
dBc
Dup_Out – Ext
∗3 , ∗4
—
–67
–60
dBc
Dup_Out – Ant
∗3 , ∗4
—
–67
–60
dBc
Tx – Ext
∗3
—
–65
–57
dBc
Tx – Ant
∗3
—
–65
–57
dBc
Tx – Dup_In
∗3
—
–65
–57
dBc
Dup_Out – Ext
∗3 , ∗4
—
–65
–57
dBc
Dup_Out – Ant
∗3 , ∗4
—
–65
–57
dBc
Tx – Ext
∗3
—
–73
–65
dBc
Tx – Ant
∗3
—
–73
–65
dBc
Tx – Dup_In
∗3
—
–73
–65
dBc
Dup_Out – Ext
∗3 , ∗4
—
–73
–65
dBc
Dup_Out – Ant
∗3 , ∗4
—
–73
–65
dBc
Tx – Ext
VDD = 3V
33
34
—
dBm
Tx – Ant
VDD = 3V
33
34
—
dBm
Tx – Dup_In
VDD = 3V
33
34
—
dBm
Dup_Out – Ext
VDD = 3V
33
34
—
dBm
Dup_Out – Ant
VDD = 3V
33
34
—
dBm
—
2
—
µs
Switching speed
TSW
—
Bias current
IDD
—
VDD = 3V
—
350
500
µA
Control current
Ictl
—
Vctl (H) = 3V
—
35
75
µA
∗1 Pin = 29.5dBm, 0/3V control, VDD = 2.8V to 3.6V, 1,429MHz to 1,453MHz
∗2 Pin = 10dBm, 0/3V control, VDD = 2.8V to 3.6V, 1,477MHz to 1,501MHz
∗3 π/4-shifted DQPSK, Pin = 29.5dBm, 0/3V control, VDD = 3.0V, 1,429MHz to 1,453MHz,
ACP (±50kHz) < – 70dBc, ACP (±100kHz) < – 75dBc, 2nd harmonics < – 75dBc, 3rd harmonics < – 75dBc
∗4 Rx is open.
∗5 Dup_Out is open.
–6–
CXG1131ER
Package Outline
Unit: mm
24PIN VQFN(PLASTIC)
0.9 ± 0.1
4.0
0.6 ± 0.1
3.6
18
A
19
0.05 S
0.7
C
13
12
B
9)
.3
(0
78
4.
PIN 1 INDEX
24
˚
45
5)
S
x4
1.0
0.2 S A-B C
(0
0.4
.1
6
C
1
0.
6
7
x4
0.2 ± 0.01
0.03 ± 0.03 (∗1)
(Stand Off)
0.05 M S A-B C
0.225 ± 0.03
0.2 S A-B C
Solder Plating
0.13 ± 0.025
+ 0.09
0.14 – 0.03
TERMINAL SECTION
PACKAGE STRUCTURE
PACKAGE MATERIAL
EPOXY RESIN
LEAD TREATMENT
SOLDER PLATING
EIAJ CODE
LEAD MATERIAL
COPPER ALLOY
JEDEC CODE
PACKAGE MASS
0.04g
VQFN-24P-03
SONY CODE
LEAD PLATING SPECIFICATIONS
ITEM
LEAD MATERIAL
SPEC.
COPPER ALLOY
SOLDER COMPOSITION
Sn-Bi Bi:1-4wt%
PLATING THICKNESS
5-18µm
–7–
Sony Corporation