ICX084AK Diagonal 6mm (Type 1/3) Progressive Scan CCD Image Sensor with Square Pixel for Color Cameras Description The ICX084AK is a diagonal 6mm (Type 1/3) interline CCD solid-state image sensor with a square pixel array which supports VGA format. Progressive scan allows all pixels signals to be output independently within approximately 1/30 second. This chip features an electronic shutter with variable charge-storage time which makes it possible to realize full-frame still image without a mechanical shutter. High resolution and high color reproductivity are achieved through the use of R, G, B primary color mosaic filters. Further, high sensitivity and low dark current are achieved through the adoption of HAD (Hole-Accumulation Diode) sensors. This chip is suitable for applications such as electronic still cameras, PC input cameras, etc. Features • Progressive scan allows individual readout of the image signals from all pixels. • High vertical resolution (480TV-lines) still image without a mechanical shutter. • Square pixel unit cell • Supports VGA format • Horizontal drive frequency: 12.27MHz • No voltage adjustments (reset gate and substrate bias are not adjusted.) • R, G, B primary color mosaic filters on chip • High resolution, high color reproductivity, high sensitivity, low dark current • Continuous variable-speed shutter 1/30 (typ.) to 1/10000s • Low smear • Excellent antiblooming characteristics • Horizontal register: 5V drive • 16-pin high precision plastic package (enables dualsurface standard) Device Structure • Interline CCD image sensor • Image size: • Number of effective pixels: • Total number of pixels: • Chip size: • Unit cell size: • Optical black: • Number of dummy bits: • Substrate material: 16 pin DIP (Plastic) AAAAA AAAAA AAAAA AAAAA AAAAA Pin 1 2 V 2 Pin 9 H 8 31 Optical black position (Top View) Diagonal 6mm (Type 1/3) 659 (H) × 494 (V) approx. 330K pixels 692 (H) × 504 (V) approx. 350K pixels 5.84mm (H) × 4.94mm (V) 7.4µm (H) × 7.4µm (V) Horizontal (H) direction: Front 2 pixels, rear 31 pixels Vertical (V) direction: Front 8 pixels, rear 2 pixels Horizontal 16 Vertical 5 Silicon ∗ Wfine CCD is a registered trademark of Sony Corporation. Represents a CCD adopting progressive scan, primary color filter and square pixel. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E95101E99 GND CGG GND NC Vφ1 Vφ2 Vφ3 8 7 6 5 4 3 2 1 Vertical register Block Diagram and Pin Configuration (Top View) VOUT ICX084AK G B G B R G R G G B G B R G R G G B G B R G R G Note) Horizontal register 12 13 14 SUBCIR GND φSUB VL RG Pin Description Pin No. Symbol Description Pin No. 15 16 Hφ2 11 Hφ1 10 VDD Note) 9 Symbol : Photo sensor Description 1 Vφ3 Vertical register transfer clock 9 2 Vφ2 Vertical register transfer clock 10 3 Vφ1 Vertical register transfer clock 11 GND GND 4 NC 12 φSUB Substrate clock 5 GND GND 13 VL Protective transistor bias 6 CGG Output amplifier gate∗1 14 RG Reset gate clock 7 GND GND 15 Hφ1 Horizontal register transfer clock 8 VOUT Signal output 16 Hφ2 Horizontal register transfer clock Supply voltage Supply voltage for the substrate SUBCIR voltage generation VDD ∗1 DC bias is applied within the CCD, so that this pin should be grounded externally through a capacitance of 1000pF or more. Absolute Maximum Ratings Item Ratings Unit –0.3 to +36 V VDD, VOUT, CGG, SUBCIR – GND –0.3 to +18 V VDD, VOUT, CGG, SUBCIR – φSUB –22 to +9 V Vφ1, Vφ2, Vφ3 – GND –15 to +16 V to +10 V Voltage difference between vertical clock input pins to +15 V Voltage difference between horizontal clock input pins to +16 V Hφ1, Hφ2 – Vφ3 –16 to +16 V Hφ1, Hφ2 – GND –10 to +15 V Hφ1, Hφ2 – φSUB –55 to +10 V VL – φSUB –65 to +0.3 V Vφ2, Vφ3 – VL –0.3 to +27.5 V RG – GND –0.3 to +20.5 V Vφ1, Hφ1, Hφ2, GND – VL –0.3 to +17.5 V Storage temperature –30 to +80 °C Operating temperature –10 to +60 °C Substrate clock φSUB – GND Supply voltage Clock input voltage Vφ1, Vφ2, Vφ3 – φSUB ∗2 +24V (Max.) when clock width < 10µs, clock duty factor < 0.1%. –2– Remarks ∗2 ICX084AK Bias Conditions Symbol Item Supply voltage VDD Protective transistor bias VL Substrate clock φSUB Min. Typ. Max. Unit Remarks 14.55 15.0 ∗1 15.45 V ∗2 ∗1 VL setting is the VVL voltage of the vertical transfer clock waveform, or the same power supply as the VL power supply for the V driver should be used. ∗2 Set SUBCIR pin to open when applying a DC bias to the substrate clock pin. DC Characteristics Symbol Item Supply current Min. IDD Typ. Max. Unit 6 8 mA Remarks Clock Voltage Conditions Min. Typ. Max. Unit Waveform diagram VVT 14.55 15.0 15.45 V 1 VVH02 –0.05 0 0.05 V 2 VVH1, VVH2, VVH3 –0.2 0 0.05 V 2 VVL1, VVL2, VVL3 –8.0 –7.5 –7.0 V 2 Vφ1, Vφ2, Vφ3 6.8 7.5 8.05 V 2 I VVL1 – VVL3 I 0.1 V 2 VVHH 1.0 V 2 High-level coupling VVHL 2.3 V 2 High-level coupling VVLH 1.0 V 2 Low-level coupling VVLL 1.0 V 2 Low-level coupling Item Readout clock voltage Vertical transfer clock voltage Horizontal transfer clock voltage Symbol Substrate clock voltage VVH = VVH02 VVL = (VVL1 + VVL3)/2 VφH 4.75 5.0 5.25 V 3 VHL –0.05 0 0.05 V 3 4.5 5.0 5.5 V 4 Input through 0.01µF capacitance 0.8 V 4 Low-level coupling VφRG Reset gate clock voltage Remarks VRGLH – VRGLL VRGH VDD +0.4 VDD +0.6 VDD +0.8 V 4 VφSUB 21.5 22.5 23.5 V 5 –3– ICX084AK Clock Equivalent Circuit Constant Symbol Item Min. Typ. Max. Unit CφV1 560 pF CφV2 470 pF CφV3 1500 pF CφV12 1500 pF CφV23 1500 pF CφV31 1000 pF Capacitance between horizontal transfer CφH1, CφH2 clock and GND 43 pF Capacitance between horizontal transfer CφHH clocks 39 pF Capacitance between reset gate clock and GND CφRG 5 pF Capacitance between substrate clock and GND CφSUB 570 pF R1, R2 20 Ω R3 56 Ω Vertical transfer clock ground resistor RGND 43 Ω Horizontal transfer clock series resistor RφH1, RφH2 10 Ω Reset gate clock series resistor RφRG 39 Ω Capacitance between vertical transfer clock and GND Capacitance between vertical transfer clocks Vertical transfer clock series resistor Vφ1 R1 CφV12 CφV1 R2 Vφ2 CφV2 RφH1 RφH2 Hφ1 RGND Cφv31 Remarks Hφ2 CφHH CφV3 Cφv23 CφH1 CφH2 R3 Vφ3 Vertical transfer clock equivalent circuit Horizontal transfer clock equivalent circuit RφRG RGφ CφRG Reset gate clock equivalent circuit –4– ICX084AK Drive Clock Waveform Conditions (1) Readout clock waveform VT 100% 90% II II φM VVT φM 2 10% 0% tr twh 0V tf Note) Readout clock is used by composing vertical transfer clocks Vφ2 and Vφ3. (2) Vertical transfer clock waveform Vφ1 VVH1 VVHH VVH VVHL VVLH VVL01 VVL VVL1 VVLL Vφ2 VVH02 VVH2 VVHH VVH VVHL VVLH VVL2 VVL VVLL Vφ3 VVH3 VVHH VVH VVHL VVLH VVL03 VVL VVLL VVH = VVH02 VVL = (VVL01 + VVL03)/2 VVL3 = VVL03 VφV1 = VVH1 – VVL01 VφV2 = VVH02 – VVL2 VφV3 = VVH3 – VVL03 –5– ICX084AK (3) Horizontal transfer clock waveform Hφ1, Hφ2 tr twh tf 90% VφH twl 10% VHL (4) Reset gate clock waveform φRG tr twh tf VRGH twl RG waveform Point A VφRG VRGL + 0.5V VRGLH VRGL VRGLL Hφ1 waveform 2.5V VRGLH is the maximum value and VRGLL is the minimum value of the coupling waveform during the period from Point A in the above diagram until the rising edge of RG. In addition, VRGL is the average value of VRGLH and VRGLL. VRGL = (VRGLH + VRGLL)/2 Assuming VRGH is the minimum value during the interval twh, then: VφRG = VRGH – VRGL (5) Substrate clock waveform φSUB 100% 90% φM VφSUB 10% VSUB 0% (A bias generated within the CCD) tr twh –6– φM 2 tf ICX084AK Clock Switching Characteristics Symbol Readout clock VT Vertical transfer clock Vφ1, Vφ2, Vφ3 Horizontal transfer clock Item Hφ1 During imaging Hφ2 twh twl tr tf Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. 0.5 2.3 2.5 24 30 26.5 31.5 φRG 11 Substrate clock φSUB 1.5 1.8 350 25 31.5 10 17.5 10 17.5 25 10 10 30 During parallel- Hφ1 serial conversion Hφ2 Reset gate clock µs 0.5 15 13 62.5 15 0.01 0.01 0.01 0.01 3 3 0.5 Unit Remarks During readout ns ∗1 ns ∗2 15 µs ns 0.5 µs During drain charge ∗1 When vertical transfer clock driver CXD1267AN is used. ∗2 tf ≥ tr – 2ns, and the cross-point voltage (VCR) for the Hφ1 rising side of the Hφ1 and Hφ2 waveforms must be at least 2.5V. Item Symbol two Min. Typ. Max. Horizontal transfer clock Hφ1, Hφ2 21.5 25.5 Unit ns Remarks ∗3 ∗3 The overlap period for twh and twl of horizontal transfer clocks Hφ1 and Hφ2 is two. –7– ICX084AK Image Sensor Characteristics Item (Ta = 25°C) Measurement method mV 1 Min. Typ. Sg 300 450 R Rr 0.3 0.45 0.6 1 B Rb 0.4 0.55 0.7 1 Saturation signal Vsat 500 Smear Sm Video signal shading SHg G sensitivity Sensitivity comparison Max. Unit Symbol Remarks Ta = 60°C mV 2 0.015 % 3 20 % 4 Zone 0 and I 25 % 4 Zone 0 to II' ∆Srg 8 % 5 ∆Sbg 8 % 5 Dark signal Vdt 4 mV 6 Ta = 60°C Dark signal shading ∆Vdt 1 mV 7 Ta = 60°C Line crawl G Lcg 3.8 % 8 Line crawl R Lcr 3.8 % 8 Line crawl B Lcb 3.8 % 8 Lag Lag 0.5 % 9 Uniformity between video signal channels 0.005 Zone Definition of Video Signal Shading 659 (H) 12 12 12 V 10 H 8 H 8 Zone 0, I Zone II, II' V 10 494 (V) 10 Ignored region Effective pixel region Measurement System CCD signal output [∗A] Gr/Gb CCD C.D.S AMP S/H Gr/Gb channel signal output [∗B] R/B S/H R/B channel signal output [∗C] Note) Adjust the amplifier gain so that the gain between [∗A] and [∗B], and between [∗A] and [∗C] equals 1. –8– ICX084AK Image Sensor Characteristics Measurement Method Measurement conditions 1) In the following measurements, the device drive conditions are at the typical values of the bias and clock voltage conditions. 2) In the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical black level (OB) is used as the reference for the signal output, which is taken as the value of the Gr/Gb signal output or the R/B signal output of the measurement system. Color coding and readout of this image sensor Gb B Gb B R Gr R Gr Gb B Gb B R Gr R Gr The primary color filters of this image sensor are arranged in the layout shown in the figure on the left (Bayer arrangement). Gr and Gb denote the G signals on the same line as the R signal and the B signal, respectively. Horizontal register Color Coding Diagram All pixels signals are output successively in a 1/30s period. The R signal and Gr signal lines and the Gb signal and B signal lines are output successively. –9– ICX084AK Definition of standard imaging conditions 1) Standard imaging condition I : Use a pattern box (luminance 706cd/m2, color temperature of 3200K halogen source ) as a subject. (Pattern for evaluation is not applicable.) Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter and image at F5.6. The luminous intensity to the sensor receiving surface at this point is defined as the standard sensitivity testing luminous intensity. 2) Standard imaging condition II : Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles. Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter. The luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm. 1. G sensitivity, sensitivity comparison Set to standard imaging condition I. After selecting the electronic shutter mode with a shutter speed of 1/100s, measure the signal outputs (VGr, VGb, VR and VB) at the center of each Gr, Gb, R and B channel screens, and substitute the values into the following formula. VG = (VGr + VGb)/2 Sg = VG × 100 [mV] 30 Rr = VR/VG Rb = VB/VG 2. Saturation signal Set to standard imaging condition II. After adjusting the luminous intensity to 20 times the intensity with the average value of the Gr signal output, 150mV, measure the minimum values of the Gr, Gb, R and B signal outputs. 3. Smear Set to standard imaging condition II. With the lens diaphragm at F5.6 to F8, first adjust the average value of the Gr signal output to 150mV. Measure the average values of the Gr signal output, Gb signal output, R signal output and B signal output (Gra, Gba, Ra and Ba), and then adjust the luminous intensity to 500 times the intensity with average value of the Gr signal output, 150mV. After the readout clock is stopped and the charge drain is executed by the electronic shutter at the respective H blankings, measure the maximum value (VSm [mV]), independent of the Gr, Gb, R and B signal outputs, and substitute the values into the following formula. Sm = VSm ÷ Gra + Gba + Ra + Ba 1 1 × × × 100 [%] (1/10V method conversion value) 4 500 10 4. Video signal shading Set to standard imaging condition II. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity so that the average value of the Gr signal output is 150mV. Then measure the maximum (Grmax [mV]) and minimum (Grmin [mV]) values of the Gr signal output and substitute the values into the following formula. SHg = (Grmax – Grmin)/150 × 100 [%] – 10 – ICX084AK 5. Uniformity between video signal channels After measuring 4, measure the maximum (Rmax [mV]) and minimum (Rmin [mV]) values of the R signal and the maximum (Bmax [mV]) and minimum (Bmin [mV]) values of the B signal, and substitute the values into the following formula. ∆Srg = (Rmax – Rmin)/150 × 100 [%] ∆Sbg = (Bmax – Bmin)/150 × 100 [%] 6. Dark signal Measure the average value of the signal output (Vdt [mV]) with the device ambient temperature 60°C and the device in the light-obstructed state, using the horizontal idle transfer level as a reference. 7. Dark signal shading After measuring 6, measure the maximum (Vdmax [mV]) and minimum (Vdmin [mV]) values of the dark signal output and substitute the values into the following formula. ∆Vdt = Vdmax – Vdmin [mV] 8. Line crawl Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the Gr signal output is 150mV, and then insert R, G, and B filters and measure the difference between G signal lines (∆Glr, ∆Glg, ∆Glb [mV]) as well as the average value of the G signal output (Gar, Gag, Gab). Substitute the values into the following formula. Lci = ∆Gli × 100 [%] (i = r, g, b) Gai 9. Lag Adjust the Gr signal output value generated by strobe light to 150mV. After setting the strobe light so that it strobes with the following timing, measure the residual signal (Vlag). Substitute the value into the following formula. Lag = (Vlag/150) × 100 [%] VD V2 Light Strobe light timing Gr signal output 150mV Output – 11 – Vlag (Lag) RG Hφ1 Hφ2 XV3 XSG XV2 XV1 XSUB 11 10 22/20V 12 13 14 9 8 7 15 16 5 CXD1267AN 17 4 6 18 22/16V 1/35V 1/20V 0.1 0.01 100k 16 15 14 13 12 11 10 3.3/20V 9 8 7 6 ICX084 ( BOTTOM VIEW ) 5 4 3 2 1 1000p Vφ3 Hφ2 19 Vφ2 Hφ1 3 Vφ1 RG 2 NC VL 100k CGG 20 GND φSUB – 12 – GND 1 GND SUBCIR 15V VOUT VDD Drive Circuit 0.01 2200p 2SK523 3.9k 100 3.3/16V 1M CCD OUT –7.5V ICX084AK ICX084AK Spectral Sensitivity Characteristics (Includes lens characteristics, excludes light source characteristics) 1 0.9 R 0.8 B G Relative Response 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 400 500 600 Wave Length [nm] Sensor Readout Clock Timing Chart XSG XV1 XV2 XV3 Sensor readout clock XSG is used by composing XV2 and XV3. HD 2.53µs (31 bits) 2.04µs (25 bits) 42.4µs (520 bits) V1 V2 V3 – 13 – 700 – 14 – CCD OUT V3 V2 V1 HD VD 525 1 Drive Timing Chart (Vertical Sync) 14 15 7 1 2 3 4 5 6 7 8 12 34 494 7 1 2 3 ICX084AK 525 1 510 508 – 15 – SUB H2 H1 V3 V2 V1 SHD SHP RG CLK 12 1 24 1 36 1 78 1 1 1 1 36 1 36 1 37 1 23 1 12 12 24 36 35 35 1 1 780 1 1 BLK 107 72 HD/SYNC 123 16 Drive Timing Chart (Horizontal Sync) 132 ICX084AK 1 125 1 ICX084AK Notes on Handling 1) Static charge prevention CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following protective measures. a) Either handle bare handed or use non-chargeable gloves, clothes or material. Also use conductive shoes. b) When handling directly use an earth band. c) Install a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image sensor. e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges. 2) Soldering a) Make sure the package temperature does not exceed 80°C. b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a ground 30W soldering iron and solder each pin in less than 2 seconds. For repairs and remount, cool sufficiently. c) To dismount an image sensor, do not use a solder suction equipment. When using an electric desoldering tool, use a thermal controller of the zero cross On/Off type and connect it to ground. 3) Dust and dirt protection Image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and dirt. Clean glass plates with the following operation as required, and use them. a) Perform all assembly operations in a clean room (class 1000 or less). b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized air is recommended.) c) Clean with a cotton bud and ethyl alcohol if the grease stained. Be careful not to scratch the glass. d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when moving to a room with great temperature differences. e) When a protective tape is applied before shipping, just before use remove the tape applied for electrostatic protection. Do not reuse the tape. 4) Installing (attaching) a) Remain within the following limits when applying a static load to the package. Do not apply any load more than 0.7mm inside the outer perimeter of the glass portion, and do not apply any load or impact to limited portions. (This may cause cracks in the package.) AAAA AAAA AAAA AAAA AAAA AAAA Cover glass 50N 50N 1.2Nm Plastic package Compressive strength Torsional strength b) If a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the bottom of the package. Therefore, for installation, use either an elastic load, such as a spring plate, or an adhesive. – 16 – ICX084AK c) The adhesive may cause the marking on the rear surface to disappear, especially in case the regulated voltage value is indicated on the rear surface. Therefore, the adhesive should not be applied to this area, and indicated values should be transferred to the other locations as a precaution. d) The notch of the package is used for directional index, and that can not be used for reference of fixing. In addition, the cover glass and seal resin may overlap with the notch of the package. e) If the lead bend repeatedly and the metal, etc., clash or rub against the package, the dust may be generated by the fragments of resin. f) Acrylate anaerobic adhesives are generally used to attach CCD image sensors. In addition, cyanoacrylate instantaneous adhesives are sometimes used jointly with acrylate anaerobic adhesives. (reference) 5) Others a) Do not expose to strong light (sun rays) for long periods, color filters will be discolored. When high luminance objects are imaged with the exposure level control by electronic-iris, the luminance of the image-plane may become excessive and discolor of the color filter will possibly be accelerated. In such a case, it is advisable that taking-lens with the automatic-iris and closing of the shutter during the power-off mode should be properly arranged. For continuous using under cruel condition exceeding the normal using condition, consult our company. b) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or usage in such conditions. c) The brown stain may be seen on the bottom or side of the package. But this does not affect the CCD characteristics. – 17 – – 18 – 1.2 2.5 0.69 ~ ~ Plastic GOLD PLATING 42 ALLOY 0.9g LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT 0.3 M 1.27 9.2 10.3 12.2 ± 0.1 H PACKAGE MATERIAL V 6.1 ~ 2.5 0.46 0.3 A 1.2 2.5 8.4 (For the first pin only) 0.5 PACKAGE STRUCTURE B 5.7 D B' C 1 8 11.6 16 9 2.5 2-R0.5 9. The notches on the bottom of the package are used only for directional index, they must not be used for reference of fixing. 8. The thickness of the cover glass is 0.75mm, and the refractive index is 1.5. 7. The tilt of the effective image area relative to the bottom “C” is less than 50µm. The tilt of the effective image area relative to the top “D” of the cover glass is less than 50µm. 6. The height from the bottom “C” to the effective image area is 1.41 ± 0.10mm. The height from the top of the cover glass “D” to the effective image area is 1.94 ± 0.15mm. 5. The rotation angle of the effective image area relative to H and V is ± 1°. 4. The center of the effective image area relative to “B” and “B'” is (H, V) = (6.1, 5.7) ± 0.15mm. 3. The bottom “C” of the package, and the top of the cover glass “D” are the height reference. 2. The two points “B” of the package are the horizontal reference. The point “B'” of the package is the vertical reference. 1. “A” is the center of the effective image area. 16pin DIP (450mil) 9.5 11.4 ± 0.1 3.1 Unit: mm 3.35 ± 0.15 1.27 3.5 ± 0.3 0° to 9° 0.25 11.43 Package Outline ICX084AK