ILX521AA 256-pixel CCD Linear Image Sensor (B/W) Description The ILX521AA is a rectangular reduction type CCD linear image sensor designed for image scanner sensor. A built-in timing generator and clock driver ensure single 5V power supply for easy use. Features • Number of effective pixels: 256 pixels • Pixel size: 14µm × 14µm (14µm pitch) • Built-in timing generator and clock driver • Built-in S/H circuit • Maximum data rate: 2MHz • Single 5V power supply • Clear mold package (20-pin SOP) 16 NC φCLK 6 15 VDD NC 9 12 NC NC 10 11 NC φROG S/H SW 8 ROG pulse generator Mode selector 7 φCLK VOUT 13 NC TEST φROG 8 4 14 NC 5 256 • Output amplifier • S/H circuit S/H SW 7 VDD TEST 5 GND 17 NC 3 VOUT 4 6 18 NC 1 15 GND 3 Clock driver 19 NC , NC 2 D7 D8 20 NC D12 S1 S2 NC 1 Readout gate S255 S256 D13 Pin Configuration (Top View) Clock pulse generator V °C °C CCD analog shift register 6 –10 to +60 –30 to +80 Block Diagram D17 Absolute Maximum Ratings • Supply voltage VDD • Operating temperature • Storage temperature 20 pin SOP (MOLD) Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E99155-PS ILX521AA Pin Description Pin No. Symbol Description Pin No. Symbol Description 1 NC NC 11 NC NC 2 NC NC 12 NC NC 3 GND GND 13 NC NC 4 VOUT Signal output 14 NC NC 5 TEST Test (open) 15 VDD 5V power supply 6 φCLK Clock pulse input 16 NC NC 7 S/H SW Switching of with S/H or without S/H 17 NC NC 8 φROG Readout gate pulse input 18 NC NC 9 NC NC 19 NC NC 10 NC NC 20 NC NC Recommended Voltage Item VDD Min. Typ. Max. Unit 4.75 5.0 5.25 V Mode Description Used mode Pin 7 S/H SW with S/H GND without S/H VDD Input Clock Voltage Condition∗1 Item Symbol Min. Typ. Max. Unit High level VIH 4.5 VDD VDD + 0.5 V Low level VIL 0 — 0.5 V Min. Typ. Max. Unit ∗1 This is applied to the all external pulses. (φCLK, φROG) Input Pin Capacity Item Symbol Input capacity of φCLK pin CφCLK — 10 — pF Input capacity of φROG pin CφROG — 10 — pF –2– ILX521AA Electrooptical Characteristics (Ta = 25°C, VDD = 5V, Data rate = 1MHz, Without S/H mode, Light source = 3200K, IR cut filter CM-500S (t = 1mm)) Item Symbol Min. Typ. Max. Unit Remarks 13.3 19.0 24.7 V/(lx · s) Note 1 Sensitivity R Sensitivity nonuniformity PRNU — 5.0 12.0 % Note 2 Saturation output voltage VSAT 0.6 0.8 — V — Dark voltage average VDRK — 0.3 2.0 mV Note 3 Dark signal nonuniformity DSNU — 0.5 3.0 mV Note 3 Image lag IL — 0.02 — % Note 4 Dynamic range DR — 2666 — Saturation exposure SE — 0.042 — lx · s Note 6 Current consumption IVDD — 5.0 12.0 mA — Total transfer efficiency TTE 92.0 98.0 — % — Output impedance ZO — 350 — Ω — Offset level VOS — 3.8 — V Note 7 Note 5 Note) 1. For the sensitivity test light is applied with a uniform intensity of illumination. 2. PRNU is defined as indicated below. Ray incidence conditions are the same as for Note 1. PRNU = 6. 7. The maximum output of the 256 pixels is set to VMAX, the minimum output to VMIN and the average output to VAVE. Integration time is 10ms. VOUT = 500mV. DR = VSAT/VDRK When optical integration time is shorter, the dynamic range sets wider because dark output voltage is in proportion to optical integration time. SE = VSAT/R1 Vos is defined as indicated below. , 3. 4. 5. (VMAX – VMIN)/2 × 100 [%] VAVE D8 Vout D9 D10 D11 VOS GND –3– D12 S1 VOUT φCLK 0V 5V 7 D7 6 D6 3 D3 2 9 10 11 12 13 14 D10 D9 D2 D1 –4– 269 271 273 268 270 272 S256 S1 Effective pixel signal (256 pixels) S2 D12 D11 Dummy signal (5 pixels) D13 Note) 280 or more clock pulses are required. 1-line output period (273 pixels) Dummy signal (12 pixels) Optical black (4 pixels) 8 D8 1 D14 0V D15 φROG D16 5V D17 Clock Timing Diagram (without internal S/H mode) 1 ILX521AA VOUT φCLK 0V 5V 0 3 D2 2 D1 1 –5– 9 10 11 12 13 14 D10 D8 D6 Optical black (4 pixels) 8 D7 7 D9 269 271 273 268 270 272 S256 Effective pixel signal (256 pixels) S1 D12 D11 D17 Dummy signal (5 pixels) Note) 280 or more clock pulses are required. 1-line output period (274 pixels) Dummy signal (13 pixels) 6 D13 D0 0V D14 φROG D15 5V D16 Clock Timing Diagram (with internal S/H mode) 1 ILX521AA ILX521AA φCLK Timing (For all modes) t1 t2 90% φCLK 50% 10% t3 Item φCLK pulse rise/fall time φCLK pulse Duty∗1 ∗1 t4 Symbol Min. Typ. Max. Unit t1, t2 0 10 100 ns — 40 50 60 % 100 × t4/(t3 + t4) φROG, φCLK Timing t8 t6 90% φROG 10% t7 90% φCLK t5 Item t9 Symbol Min. Typ. Max. Unit φROG, φCLK pulse timing 1 t5 500 1000 — ns φROG, φCLK pulse timing 2 t9 500 1000 — ns t6, t8 0 10 — ns t7 500 1000 — ns φROG pulse rise/fall time φROG pulse period –6– ILX521AA φCLK Output Signal Timing (Note 1) (Note 3) φCLK t10 t11 VOUT VOUT∗ (Note 2) t12 Item Symbol Min. Typ. Max. Unit φCLK – VOUT output delay time 1 t10 — 150 — ns φCLK – VOUT output delay time 2 φCLK – VOUT∗ (with S/H) output delay time t11 — 220 — ns t12 — 110 — ns Note 1) fck = 1MHz, φCLK pulse Duty = 50%, φCLK pulse rise/fall time = 10ns Note 2) Output waveform when internal S/H circuit is used. Note 3) • is data period. –7– ILX521AA Application Circuit (without internal S/H mode) 5V VDD NC NC NC φCLK S/H SW φROG NC NC 1 2 3 4 5 6 7 8 9 10 NC NC 11 TEST 12 NC 13 VOUT 14 NC 15 VSS 16 NC 17 NC 18 NC 19 NC 20 3kΩ 0.01µ Signal output φCLK 22µ/10V φROG 2SA1175 Note) This circuit diagram is the case when internal S/H mode is not used. Connect Pin 7 to GND when internal S/H mode is used. Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. –8– ILX521AA Example of Representative Characteristics (VDD = 5V, Ta = 25°C) Spectral sensitivity characteristics (Standard characteristics) 1 0.9 Relative sensitivity 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 400 500 600 700 800 900 1000 Wavelength [nm] Output voltage vs. Temperature characteristics (Standard characteristics) 100 50 Output voltage rate 10 5 1 0.5 0.1 0.05 0.01 –10 0 10 20 30 Ta – Ambient temperature [°C] –9– 40 50 60 ILX521AA Offset level vs. Temperature characteristics (Standard characteristics) Offset level vs. VDD characteristics (Standard characteristics) 7 7 Ta = 25°C 6 6 ∆Vos ~ – –2mV/°C ∆Ta 5 Vos – Offset level [V] 5 Vos – Offset level [V] ∆Vos ~ – 0.8 ∆VDD 4 3 2 4 3 2 1 1 0 –10 0 10 30 20 40 50 0 4.75 60 5 5.25 VDD [V] Ta – Ambient temperature [°C] Supply current vs. VDD characteristics (Standard characteristics) Output voltage vs. Integration time (Standard characteristics) 10 10 9 7 5 Output voltage rate IVDD – Supply current [mA] 8 6 5 4 3 2 1 0 4.75 5 1 5.25 1 5 τ – Integration time [ms] VDD [V] – 10 – 10 ILX521AA Notes on Handling 1) Static charge prevention CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following protective measures. a) Either handle bare handed or use non-chargeable gloves, clothes or material. Also use conductive shoes. b) When handling directly use an earth band. c) Install a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image sensors. e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges. 2) Soldering a) Make sure the package temperature does not exceed 80°C. b) Use a grounded 30W soldering iron and solder each pin in less than 2 seconds. For repairs and remount, cool sufficiently. c) To dismount an image sensor, do not use solder suction equipment. When using an electric desoldering tool, ground the controller. For the temperature control system, use a zero-cross type. 3) Dust and dirt protection a) Operate in clean environments. b) Do not either touch mirror surfaces by hand or have any object come in contact with mirror surfaces. Should dirt stick to a mirror surface, blow it off with an air blower. (For dirt stuck through static electricity ionized air is recommended.) c) Clean with a cotton bud and ethyl alcohol if the mirror surfaces are grease stained. Be careful not to scratch the mirror surfaces. d) Keep in a case to protect from dust and dirt. To prevent dew condensation on the mirror surfaces, preheat or precool when moving to a room with great temperature differences. 4) Do not expose to intense light for long periods. 5) Exposure to high temperatures or humidity will affect the characteristics. Accordingly avoid storage or usage in such conditions. 6) CCD image sensors are precise optical equipment that should not be subject to mechanical shocks. 7) Normal output signal is not obtained immediately after device switch on. – 11 – 1 V H 20 – 12 – Plastic SOLDER PLATING 42ALLOY 0.31g LS-F7(E) LEAD TREATMENT LEAD MATERIAL PACKAGE MASS DRAWING NUMBER 10 11 PACKAGE MATERIAL PACKAGE STRUCTURE 15˚(All sides) 0.8 11.6 ± 0.1 0.3 ± 0.1 +0.1 0.15 - 0.05 A B +0.2 0.1 - 0.1 0.15 2.4 ± 0.2 2. The refractive index of the resin is 1.57. DETAIL A DETAIL B 0˚ to 10˚ 0.05 ± 0.04 1. The height from the sensor surface is 1.55 ± 0.2mm. 0.15 M Ø3.5 depth 0.05 (bottom) 4.0 ± 0.1 13.3 ± 0.3 6.9 ± 0.3 5.00 ± 0.4 15˚(All sides) Ø0.8 depth 0.05 1st.pin Index 3.66 ± 0.4 20pin SOP 9.5 ± 0.3 Unit: mm 0.8 0.5 ± 0.2 Package Outline ILX521AA