ILX553B 5150-pixel CCD Linear Sensor (B/W) Description The ILX553B is a reduction type CCD linear sensor developped for DPPC, multifunction printers. This sensor reads A4-size documents at a density of 600 DPI at high speed of 16MHZ. 16 φROG φ1 φCLP φRS 1 4 19 φRS VOUT 5 18 GND VDD 6 17 φCLP GND 7 16 φROG φ1 8 15 φ2 GND 9 14 GND 17 GND 20 20 φLH 6 3 φLH GND VDD 21 GND D14 D15 2 D63 S1 GND 13 GND GND 10 VOUT 5 5150 GND 11 8 22 GND 1 CCD register Pin Configuration (Top View) GND 19 Driver 15 φ2 V °C °C Read out gate • Operating temperature • Storage temperature 15 –10 to +60 –30 to +80 S5150 D64 Absolute Maximum Ratings • Supply voltage VDD Block Diagram D Features • Number of effective pixels: 5150 pixels • Pixel size: 7µm × 7µm (7µm pitch) • Clamp circuit is on-chip • Ultra high sensitivity/Ultra low lag • Maximum data rate: 16MHz • Single 12V power supply • Input clock pulse: CMOS 5V drive • Package: 22 pin Plastic DIP (400mil) 22 pin DIP (Plastic) 12 GND Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E01Y36 ILX553B Pin Description Pin No. Symbol Description Pin No. Symbol Description 1 GND GND 12 GND GND 2 GND GND 13 GND GND 3 GND GND 14 GND GND 4 GND GND 15 φ2 Clock pulse input 5 VOUT Signal out 16 φROG Clock pulse input 6 VDD 12V power supply 17 φCLP Clock pulse input 7 GND GND 18 GND GND 8 φ1 Clock pulse input 19 φRS Clock pulse input 9 GND GND 20 φLH Clock pulse input 10 GND GND 21 GND GND 11 GND GND 22 GND GND Recommended Supply Voltage Item VDD Min. Typ. Max. Unit 11.4 12.0 12.6 V Clock Characteristics Item Symbol Input capacity of φ1, φ2 Min. Typ. Max. Unit Cφ1, Cφ2 — 400 — pF φLH∗1 CφLH — 10 — pF Input capacity of φRS∗1 CφRS — 10 — pF Input capacity of φCLP∗1 CφCLP — 10 — pF Input capacity of φROG CφROG — 10 — pF Input capacity of Clock Frequency Item Symbol φ1, φ2, φLH, φRS, φCLP Min. Typ. Max. Unit — 1 16 MHz fφ1, fφ2, fφLH, fφRS, fφCLP Input Clock Pulse Voltage Condition Min. Typ. Max. Unit High level 4.75 5.0 5.25 V Low level 0 — 0.1 V Item φ1, φ2, φLH, φRS, φCLP, φROG pulse voltage –2– ILX553B Electrooptical Characteristics (Note 1) Ta = 25°C, VDD = 12V, fφR = 2MHz, Input clock = 5Vp-p, Light source = 3200K, IR cut filter CM-500S (t = 1.0mm) Item Min. Typ. Max. Unit Remarks 11.8 14.8 17.8 V/(lx · s) Note 2 Symbol Sensitivity R Sensitivity nonuniformity PRNU — 4 10 % Note 3 Saturation output voltage VSAT 1 2 — V Note 4 Saturation exposure SER — 0.14 — lx · s Note 5 Dark voltage average VDRK — 0.3 2 mV Dark signal nonuniformity DSNU — 0.6 3 mV Image lag IL — 0.02 — % Note 7 Supply current IVDD — 15 30 mA — Total transfer efficiency TTE 92 98 — % — Output impedance ZO — 230 — Ω — Offset level VOS — 6.2 — V Note 8 Note 6 Notes 1) In accordance with the given electrooptical characteristics, the even black level is defined as the average value of D14, D15, to D62. 2) For the sensitivity test light is applied with a uniform intensity of illumination. 3) PRNU is defined as indicated below. Ray incidence conditions are the same as for Note 2. VOUT = 500mV (Typ.) PRNU = (VMAX – VMIN)/2 × 100 [%] VAVE The maximum output of 5150 pixels is set to VMAX, the minimum output to VMIN and the average output to VAVE. 4) Use below the minimum value of the saturation output voltage. 5) Saturation exposure is defined as follows. SE = VSAT R 6) Optical signal accumulated time τ int stands at 10ms. 7) VOUT = 500mV (Typ.) 8) VOS is defined as indicated bellow. VOUT VOS GND –3– Clock Timing Chart 1 5 φ1 φLH φ2 4 3 2 0 1 φROG 5 0 5 0 0 D65 D64 S5150 S2 S1 D63 D62 D61 D15 D14 D13 D3 VOUT D2 0 S5149 5 D1 –4– φCLP 5 S5148 φRS Optical black (49 pixles) Dummy signal (63 pixles) 1-line output period (5220 pixles) Note) The transfer pulses (φ1, φ2, φLH) must have more than 5220 cycles. ILX553B ILX553B Clock Timing Chart 2 t4 t5 φROG t2 t6 φ1 φLH t7 t1 t3 φ2 Clock Timing Chart 3 t7 t6 φ1 φLH φ2 t10 t11 t9 φRS t8 t14 t15 t13 φCLP t12 t16 t17 VOUT –5– ILX553B Clock Timing Chart 4 Cross point φ1 and φ2 φ1 φ2 5V 1.5V (Min.) 1.5V (Min.) 2.0V (Min.) 0.5V (Min.) 0V Cross point φLH and φ2 φ2 φLH 5V 0V –6– ILX553B Clock Pulse Recommended Timing Item Symbol Min. Typ. Max. Unit φROG, φ1 pulse timing t1 50 100 — ns φROG pulse high level period t2 3 5 — µs φROG, φ1 pulse timing t3 1 2 — µs φROG pulse rise time t4 0 5 10 ns φROG pulse fall time t5 0 5 10 ns φ1 pulse rise time/φ2 pulse fall time t6 0 20 60 ns φ1 pulse fall time/φ2 pulse rise time t7 0 60 ns φRS pulse high level period t8 (10) 20 200∗1 — ns — ns φRS, φCLP pulse timing t9 (10) 200∗1 φRS pulse rise time t10 0 10 (30) ns φRS pulse fall time t11 0 (30) ns φCLP pulse high level period t12 (20) 10 200∗1 — ns φCLP, φLH pulse timing t13 (5) 50∗1 — ns φCLP pulse rise time t14 0 10 (30) ns φCLP pulse fall time t15 0 10 (30) ns t16 — 15 — ns t17 — 8 — ns Signal output delay time ∗1 These timing is the recommended condition under fφRS = 1MHz. –7– Application Circuit∗ φRS φLH φROG φCLP IC2 φ2 IC2 IC1 100Ω 100Ω 2Ω φ1 GND GND GND 2 3 4 5 6 7 8 9 10 11 GND φROG GND 1 GND φCLP VDD 12 GND 13 VOUT 14 φRS 15 GND 16 φLH 17 GND 18 GND 19 GND 20 GND 21 GND 22 GND 100Ω φ2 100Ω –8– 12V 100Ω 47µF/16V 2Ω Tr1 ∗ Data rate fφRS = 1MHz 0.1µF IC1 VOUT IC1: 74AC04 5.1kΩ φ1 IC2: 74HC04 Tr1: 2SC2785 ILX553B Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. ILX553B Example of Representative Characteristics (VDD = 12V, Ta = 25°C) Spectral sensitivity characteristics (Standard characteristics) 1.0 0.9 0.8 Relative sensitivity 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 400 500 600 800 700 900 1000 Wavelength [nm] Dark signal output temperature characteristics (Standard characteristics) Integration time output voltage characteristics (Standard characteristics) 10 Output voltage rate Output voltage rate 5 1 0.5 0.1 0 10 20 30 40 50 1 0.5 0.1 60 5 1 10 Ta – Ambient temperature [˚C] τ int – integration time [ms] Offset level vs. VDD characteristics (Standard characteristics) Offset level vs. Temperature characteristics (Standard characteristics) Ta = 25˚C 10 VOS – Offset level [V] VOS – Offset level [V] 10 8 6 4 ∆VOS ≈ 0.6 ∆VDD 2 0 11.4 ∆VOS ≈ –2mV/˚C ∆Ta 8 6 4 2 12.0 0 12.6 VDD [V] 0 10 20 30 40 50 Ta – Ambient temperature [˚C] –9– 60 ILX553B Notes of Handling 1) Static charge prevention CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following protective measures. a) Either handle bare handed or use non chargeable gloves, clothes or material. Also use conductive shoes. b) When handling directly use an earth band. c) Install a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image sensor. e) For the shipment of mounted substrates, use boxes treated for prevention of static charges. 2) Notes on Handling CCD Packages The following points should be observed when handling and installing packages. a) Remain within the following limits when applying static load to the package: (1) Compressive strength: 39N/surface (Do not apply load more than 0.7mm inside the outer perimeter of the glass portion.) (2) Shearing strength: 29N/surface (3) Tensile strength: 29N/surface (4) Torsional strength: 0.9Nm Cover glass Plastic portion 29N 39N 0.9Nm 29N Adhesive Ceramic portion (1) (2) (3) (4) b) In addition, if a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the ceramic portion. Therefore, for installation, either use an elastic load, such as a spring plate, or an adhesive. c) Be aware that any of the following can cause the package to crack or dust to be generated. (1) Applying repetitive bending stress to the external leads. (2) Applying heat to the external leads for an extended period of time with soldering iron. (3) Rapid cooling or heating. (4) Prying the plastic portion and ceramic portion away at a support point of the adhesive layer. (5) Applying the metal a crash or a rub against the plastic portion. Note that the preceding notes should also be observed when removing a component from a board after it has already been soldered. d) The notch of the plastic portion is used for directional index, and that can not be used for reference of fixing. In addition, the cover glass and seal resin may overlap with the notch or ceramic may overlap with the notch of the plastic portion. – 10 – ILX553B 3) Soldering a) Make sure the package temperature does not exceed 80°C. b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a 30W soldering iron with a ground wire and solder each pin in less then 2 seconds. For repairs and remount, cool sufficiently. c) To dismount an imaging device, do not use a solder suction equipment. When using an electric desoldering tool, ground the controller. For the control system, use a zero cross type. 4) Dust and dirt protection a) Operate in clean environments. b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized air is recommended.) c) Clean with a cotton bud and ethyl alcohol if the glass surface is grease stained. Be careful not to scratch the glass. d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when moving to a room with great temperature differences. 5) Exposure to high temperatures or humidity will affect the characteristics. Accordingly avoid storage or usage in such conditions. 6) CCD image sensors are precise optical equipment that should not be subject to mechanical shocks. – 11 – Package Outline Unit: mm 22 pin DIP (400mil) 0˚ to 9˚ 55.7 ± 0.3 36.05 (7µm X 5150pixels) H No.1 Pixel 1 0.25 7.3 V 10.16 12 22 10.0 ± 0.3 5.0 ± 0.3 10.6 ± 0.3 11 53.00 2.54 0.51 0.3 M 4.28 ± 0.5 3.58 – 12 – 4.0 ± 0.5 ( 4.55 ) 1. The height from the bottom to the sensor surface is 2.38 ± 0.3mm. 2. The thickness of the cover glass is 0.7mm, and the refractive index is 1.5. PACKAGE STRUCTURE Plastic, Ceramic LEAD TREATMENT GOLD PLATING LEAD MATERIAL 42 ALLOY PACKAGE MASS 5.43g DRAWING NUMBER LS-B23-02(E) ILX553B Sony Corporation PACKAGE MATERIAL