HV6008 32-Channel ±40V Liquid Crystal Display Row Driver Ordering Information Package Options Device 44-J Lead Quad Plastic Chip Carrier 44 -J Lead Quad Ceramic Chip Carrier 44-Lead Quad Plastic Gullwing Die HV6008 HV6008PJ HV6008DJ HV6008PG HV6008X Features General Description ❏ Symmetrical ± 40V output swing Not recommended for new designs. ❏ Active return to GND The HV60 is a 32-channel liquid crystal display driver with 3-state DMOS outputs. Each output can be set to +40V, -40V, or GND. A symmetric waveform can be applied to a capacitive load using the phase shift feature of the HV60. ❏ 15mA peak source/sink/GND current per channel ❏ +5V control logic ❏ Special shift register with clear The HV60 consists of a 32-bit shift register with Clear, Enable, and Phase Shift logic, and 32 high voltage output buffers. With the Enable pin held low, all outputs are placed in the return to zero (GND) state. When Enable is high, each output reflects the data in its shift register bit. All outputs with a logic “0” in their shift register will be in the return to zero state. Outputs with a logic “1” in their shift register will reflect the state of the phase shift pin. These outputs will be switched to VPP when phase shift is high and VNN when phase shift is logic “0”. ❏ Phase shift control ❏ Output enable ❏ Data out enable ❏ 1MHz shift register ❏ Surface mount package available Additional functions provided are Shift Register Clear and Data Out. All bits of the shift register are changed to logic “0” when Clear is pulled low. With Clear at a logic “1”, normal shift register operation proceeds. The data output reflects the status of the 32nd shift register stage. Absolute Maximum Ratings Supply voltage, VDD11 -6V 1 +6V Supply voltage, VPP1,2 +42V Supply voltage, VNN1,2 -42V Supply voltage, VDD2 Logic input Ground levels1 VDD1 - 0.3V to VDD2 + 0.3V currrent2 Continuous total power 700mA dissipation3 Operating temperature range Storage temperature range 1W -40°C to +85°C -65°C to +150°C Notes: 1. All voltages are referenced to GND. 2. Duty cycle is limited by the total power dissipated in the package. 3. For operation above 25°C ambient derate linearly to 85°C at 16.7mW/°C. 02/96/022 Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website. 1 HV6008 Electrical Characteristics (over recommended operating conditions unless noted) DC Characteristics Symbol Parameter Min Typ Max VDD1 Units Conditions VI = 4V, VDD1 = -6V IDD1,2 VDD supply current VIH Logic input high +2 VIL Logic input low VDD1 VOH Logic output high VOL Logic output low -2 V IIH High-level logic input current +3 µA VI = VDD, VDD1,2 = max VDD2 500 µA VDD2 V VDD1 = -4.5V, -2 V VDD2 = +4.5V V VDD1 = -4.5V VDD2 = +4.5V IOH = -15µA IOL = 250µA +2 VI = 4V, VDD2 = +6V IIL Low-level logic input current -50 µA VI = 0V, VDD1,2 = max IPP High voltage supply current +1 mA Static, no load INN High voltage supply current -1 mA Static, no load VOH Output voltage high +39 V VCL Output voltage clamp -20 VPP, VNN = ±40 No load VOL Output voltage low ZOH Output switch impedence high ZCL Output switch impedance clamp 500 ZOL Output switch impedance low 700 IO DC output current +20 mV -39 V 1000 Ω Output H or L Data out H or L 5 mA 150 µA VPP, VNN = ±40 IO = ±15mA 1 output only AC Characteristics Symbol Parameter Min Typ Max Units tWH Width of high data pulse 500 ns tWL Width of low data pulse 500 ns tSU Data set-up time before clock falls 25 ns tH Data hold time after clock falls 10 ns Phase shift duty cycle 50 Conditions % Recommended Operating Conditions Symbol Parameter Min Typ Max Units VDD1 Logic supply voltage -4 -6 V VDD2 Logic supply voltage +4 +6 V VPP High voltage supply +10 +40 V VNN High voltage supply -10 -40 V VIH High-level input voltage +2V VDD2 V VIL Low-level input voltage -2V VDD1 V IO Pk. Peak output current (any state) ±80 mA TA Operating free-air temperature -40 +70 °C fDIN Input data rate 1 MHz fPS Phase shift rate 20 KHz Note: Power-up sequence should be the following: 1. Connect ground. 2. Apply VDD. 3. 4. Set all inputs (Data, CLK, Enable, etc.) to a known state. Apply VPP and VNN. Power-down sequence should be the reverse of the above. 2 HV6008 Switching Waveform + 5V Clock - 5V + 5V Phase Shift - 5V + 5V SR #1 - 5V + 5V SR #2 - 5V + 5V SR #3 - 5V VPP OUT #1 0V VNN VPP OUT #2 0V VNN VPP OUT #3 0V VNN 3 HV6008 Functional Block Diagram ! ! " ! " Function Table Inputs Function Data In CLK Outputs CLR Enable Phase Shift CLR Reg X X H X X All output GND X X X L X H or L ↓ L L X Load S/R Output State X H or L L H Notes: X = Irrelevant * = Dependent on previous stage’s state before the last CLK ↓ = High to low transition H = High level L = Low level 4 Shift Reg HV Outputs 1 1 2…32 ALL L Data Out 2…32 ALL GND L *…* ALL GND * H or L *…* ALL GND * GND GND…GND * * X L L…L H H H…H VPP VPP…VPP * L H H…H VNN VNN…VNN * HV6008 Pin Configurations Package Outlines 44-Pin J-Lead Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 Function HVOUT 16 HVOUT 15 HVOUT 14 HVOUT 13 HVOUT 12 HVOUT 11 HVOUT 10 VPP HVOUT 9 HVOUT 8 HVOUT 7 HVOUT 6 HVOUT 5 HVOUT 4 HVOUT 3 HVOUT 2 HVOUT 1 Data In GND Phase Shift Clock Clear Pin 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Function VDD 1 Enable VDD 2 GND Data Out HVOUT 32 HVOUT 31 HVOU 30 HVOUT 29 HVOUT 28 HVOUT 27 HVOUT 26 HVOUT 25 HVOUT 24 VNN HVOUT 23 HVOUT 22 HVOUT 21 HVOUT 20 HVOUT 19 HVOUT 18 HVOUT 17 39 38 37 36 35 34 33 32 31 30 29 40 28 41 27 42 26 43 25 44 24 1 23 2 22 3 21 4 20 5 19 6 18 7 8 9 10 11 12 13 14 15 16 17 top view 44-pin J Lead Package 44-Pin Quad Palstic Package Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 Function HVOUT 21 HVOUT 20 HVOUT 19 HVOUT 18 HVOUT 17 HVOUT 16 HVOUT 15 HVOUT 14 HVOUT 13 HVOUT 12 HVOUT 11 HVOUT 10 VPP HVOUT 9 HVOUT 8 HVOUT 7 HVOUT 6 HVOUT 5 HVOUT 4 HVOUT 3 HVOUT 2 HVOUT 1 Pin 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Function Data In GND Phase Shift Clock Clear VDD1 Enable VDD2 GND Data Out HVOUT 32 HVOUT 31 HVOUT 30 HVOUT 29 HVOUT 28 HVOUT 27 HVOUT 26 HVOUT 25 HVOUT 24 VNN HVOUT 23 HVOUT 22 44 43 42 41 40 39 38 37 36 35 34 1 33 2 32 3 31 4 30 5 29 6 28 7 27 8 26 9 25 10 24 11 23 12 13 14 15 16 17 18 19 20 21 22 top view 44-pin Quad Plastic Gullwing Package 02/06//02 ©2002 Supertex Inc. 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