AP1332EU
Advanced Power
Electronics Corp.
N-CHANNEL ENHANCEMENT MODE
POWER MOSFET
▼ Simple Gate Drive
D
▼ Small Package Outline
▼ 2KV ESD Rating(Per MIL-STD-883D)
BVDSS
20V
RDS(ON)
600mΩ
ID
600mA
S
SOT-323 G
Description
D
The Advanced Power MOSFETs from APEC provide the
designer with the best combination of fast switching,
low on-resistance and cost-effectiveness.
G
S
Absolute Maximum Ratings
Symbol
Parameter
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
ID@TA=25℃
ID@TA=70℃
Rating
Unit
20
V
±6
V
3
600
mA
3
470
mA
Continuous Drain Current
Continuous Drain Current
1,2
IDM
Pulsed Drain Current
2.5
A
PD@TA=25℃
Total Power Dissipation
0.35
W
Linear Derating Factor
0.003
W/℃
TSTG
Storage Temperature Range
-55 to 150
℃
TJ
Operating Junction Temperature Range
-55 to 150
℃
Thermal Data
Symbol
Rthj-a
Parameter
Thermal Resistance Junction-ambient
Data and specifications subject to change without notice
3
Max.
Value
Unit
360
℃/W
200712041
AP1332EU
Electrical Characteristics@Tj=25oC(unless otherwise specified)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
20
-
-
V
BVDSS
Drain-Source Breakdown Voltage
ΔBVDSS/ΔTj
Breakdown Voltage Temperature Coefficient Reference to 25℃, ID=1mA
-
0.02
-
V/℃
RDS(ON)
Static Drain-Source On-Resistance
VGS=4.5V, ID=600mA
-
-
600
mΩ
VGS=2.5V, ID=400mA
-
-
850
mΩ
VDS=VGS, ID=250uA
0.5
-
1.2
V
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
IDSS
VDS=5V, ID=600mA
-
1
-
S
o
VDS=20V, VGS=0V
-
-
1
uA
o
Drain-Source Leakage Current (Tj=70 C)
VDS=16V ,VGS=0V
-
-
10
uA
Gate-Source Leakage
VGS=±6V
-
-
±10
uA
ID=600mA
-
1.3
2
nC
Drain-Source Leakage Current (Tj=25 C)
IGSS
VGS=0V, ID=250uA
2
Qg
Total Gate Charge
Qgs
Gate-Source Charge
VDS=16V
-
0.3
-
nC
Qgd
Gate-Drain ("Miller") Charge
VGS=4.5V
-
0.5
-
nC
VDS=10V
-
21
-
ns
2
td(on)
Turn-on Delay Time
tr
Rise Time
ID=600mA
-
53
-
ns
td(off)
Turn-off Delay Time
RG=3.3Ω,VGS=5V
-
100
-
ns
tf
Fall Time
RD=16.7Ω
-
125
-
ns
Ciss
Input Capacitance
VGS=0V
-
38
60
pF
Coss
Output Capacitance
VDS=10V
-
17
-
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
12
-
pF
Min.
Typ.
Max.
Unit
-
-
1.2
V
Source-Drain Diode
Symbol
VSD
Parameter
2
Forward On Voltage
Notes:
1.Pulse width limited by Max. junction temperature.
2.Pulse width <300us , duty cycle <2%.
3.Surface mounted on FR4 board, t ≦ 10 sec.
Test Conditions
IS=300mA, VGS=0V
AP1332EU
2.5
2.5
5.0V
4.5V
3.5V
ID , Drain Current (A)
2.0
T A = 150 o C
1.5
2.5V
1.0
V G =2.0V
1.5
2.5V
1.0
V G =2.0V
0.5
0.5
0.0
0.0
0.0
0.5
1.0
1.5
2.0
2.5
0.0
0.5
1.0
1.5
2.0
2.5
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
1.8
I D = 0.4 A
I D =0.6A
V G =4.5V
1.6
o
T A =25 C
Normalized R DS(ON)
800
RDS(ON) (mΩ )
5.0V
4.5V
3.5V
2.0
ID , Drain Current (A)
T A =25 o C
600
1.4
1.2
1.0
400
0.8
0.6
200
2
3
4
-50
5
0
50
100
150
o
V GS , Gate-to-Source Voltage (V)
T j , Junction Temperature ( C)
Fig 3. On-Resistance v.s. Gate Voltage
Fig 4. Normalized On-Resistance
v.s. Junction Temperature
2.0
1.0
0.8
Normalized VGS(th) (V)
1.5
IS(A)
0.6
T j =150 o C
T j =25 o C
0.4
1.0
0.5
0.2
0.0
0.0
0
0.2
0.4
0.6
0.8
1
1.2
V SD , Source-to-Drain Voltage (V)
Fig 5. Forward Characteristic of
Reverse Diode
1.4
-50
0
50
100
150
o
T j , Junction Temperature ( C)
Fig 6. Gate Threshold Voltage v.s.
Junction Temperature
AP1332EU
f=1.0MHz
12
100
V DS =10V
V DS =12V
V DS =16V
8
C iss
C (pF)
VGS , Gate to Source Voltage (V)
I D =0.6A
10
6
4
C oss
2
C rss
0
10
0.0
0.5
1.0
1.5
2.0
2.5
1
3.0
3
5
7
9
11
V DS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
10
Normalized Thermal Response (R thja)
1
100us
ID (A)
1
1ms
0.1
10ms
o
T A =25 C
Single Pulse
100ms
DC
Duty factor=0.5
0.2
0.1
0.05
0.1
0.02
PDM
0.01
t
Single Pulse
T
Duty factor = t/T
Peak Tj = PDM x Rthja + Ta
0.01
0.01
0.1
1
10
100
0.0001
0.001
0.01
V DS , Drain-to-Source Voltage (V)
Fig 9. Maximum Safe Operating Area
0.1
1
10
100
1000
t , Pulse Width (s)
Fig 10. Effective Transient Thermal Impedance
VG
VDS
90%
QG
4.5V
QGS
QGD
10%
VGS
td(on) tr
td(off) tf
Fig 11. Switching Time Waveform
Charge
Fig 12. Gate Charge Waveform
Q