LF453 Wide-Bandwidth Dual JFET-Input Operational Amplifiers General Description Features The LF453 is a low-cost, high-speed, dual JFET-input operational amplifier with an internally trimmed input offset voltage (BI-FET II technology). The device requires a low supply current and yet the amplifiers maintain a large gain bandwidth product and a fast slew rate. In addition, well matched high voltage JFET input devices provide very low input bias and offset currents. The LF453 is pin compatible with the standard LM1558, allowing designers to upgrade the overall performance of existing designs. The LF453 may be used in such applications as high-speed integrators, fast D/A converters, sample-and-hold circuits and many other circuits requiring low input bias current, high input impedance, high slew rate and wide bandwidth. Y Typical Connection Connection Diagram Y Y Y Y Y Y Y Y Y Internally trimmed offset voltage Low input bias current Low input noise current Wide gain bandwidth High slew rate Low supply current High input impedance Low total harmonic distortion AV e 10, RL e 10k, VO e 20 Vp– p, f e 20 Hz – 20 kHz Low 1/f noise corner Fast settling time to 0.01% 5.0 mV (max) 50 pA (typ) 0.01 pA/ SHz (typ) 4 MHz (typ) 13 V/ms (typ) 6.5 mA (max) 1012X (typ) k 0.02% (typ) 50 Hz (typ) 2 ms (typ) SO Package TL/H/9710 – 2 Top View Order Number LF453CM See NS Package Number M08A TL/H/9710 – 1 Simplified Schematic TL/H/9710 – 3 BI-FET IITM is a trademark of National Semiconductor Corporation. C1995 National Semiconductor Corporation TL/H/9710 RRD-B30M115/Printed in U. S. A. LF453 Wide-Bandwidth Dual JFET-Input Operational Amplifiers December 1994 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage (V a bVb) Input Voltage Range Differential Input Voltage (Note 2) Junction Temperature (TJ MAX) Output Short Circuit Duration Power Dissipation (Note 3) ESD Tolerance Soldering Information (Note 4) SO Package: Vapor Phase (60 sec.) Infrared (15 sec.) 36V Vb s VIN s V a g 30V 150§ C Continuous 500 mW TBD 215§ C 220§ C Operating Ratings (Note 1) TMIN s TA s TMAX 0§ C s TA a 70§ C 125§ C 10V to 32V Temperature Range LF453CM Junction Temperature (TJ max) Supply Voltage (V a bVb) DC Electrical Characteristics The following specifications apply for V a e a 15V and Vb e b15V. Boldface limits apply for TMIN to TMAX; all other limits TA e TJ e 25§ C. LF453CM Symbol Parameter Conditions Typical (Note 5) Tested Limit (Note 6) 100 VOS Maximum Input Offset Voltage RS e 10 kX, (Note 9) IOS Maximum Input Offset Current (Notes 8, 9) TJ e 25§ C TJ e 70§ C 25 (Notes 8, 9) TJ e 25§ C TJ e 70§ C 50 IB Maximum Input Bias Current Design Limit (Note 7) 5 mV 2 pA nA 4 pA nA 25 V/mV 200 RIN Input Resistance TJ e 25§ C 1012 AVOL Minimum Large Signal Voltage Gain VO e g 10V, RL e 2 kX (Note 9) 200 VO Minimum Output Voltage Swing RL e 10k VCM Minimum Input Common Mode Voltage Range CMRR Minimum Common-Mode Rejection Ratio RS s 10 kX PSRR Minimum Supply Voltage Rejection Ratio (Note 10) IS Maximum Supply Current Units X 50 g 13.5 g 12 g 12 V a 14.5 b 11.5 a 11 b 11 a 11 b 11 V V 100 80 80 dB 100 80 80 dB 6.5 mA 6.5 AC Electrical Characteristics The following specifications apply for V a e a 15V and Vb e b15V. Limits apply for TA e TJ e 25§ C. LF453CM Symbol Parameter Conditions Typical (Note 5) Tested Limit (Note 6) Design Limit (Note 7) Units SR Slew Rate AV e a 1 13 8 GBW Minimum Gain-Bandwidth Product f e 100 kHz 4 2.7 V/ms en Equivalent Input Noise Voltage RS e 100X, f e 1 kHz 25 nV/ SHz in Equivalent Input Noise Current RS e 100X, f e 1 kHz 0.01 pA/ SHz MHz Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating the device beyond its specified operating ratings. Note 2: When the input voltage exceeds the power supplies, the current should be limited to 1 mA. Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJ MAX, HJA and the ambient temperature, TA. The maximum allowable power dissipation at any temperature is PD e (TJ MAX b TA)/HJA or the number given in the Absolute Maximum Ratings, whichever is lower. For guaranteed operation TJ max e 125§ C. The typical thermal resistance (HJA) of the LF453CM when board-mounted is 160§ C/W. Note 4: See AN-450 ‘‘Surface Mounting Methods and Their Effect on Product Reliability’’ (section titled ‘‘Surface Mount’’) for other methods of soldering surface mount devices. Note 5: Typicals are at TJ e 25§ C and represent most likely parametric norm. Note 6: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level). Note 7: Design limits are guaranteed to National’s AOQL, but not 100% tested. Note 8: The input bias currents are junction leakage currents which approximately double for every 10§ C increase in the junction temperature TJ. Due to limited production test time, the input bias currents are correlated to junction temperature. In normal operation the junction temperature rises above the ambient temperature as a result of internal power dissipation, PD. TJ e TA a HJA PD where HJA is the thermal resistance from junction to ambient. Note 9: VOS, IB, AVOL and IOS are measured at VCM e 0V. Note 10: Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice. 2 Typical Performance Characteristics Input Bias Current Input Bias Current Supply Current Positive Common-Mode Input Voltage Limit Negative Common-Mode Input Voltage Limit Positive Current Limit Negative Current Limit Voltage Swing Output Voltage Swing Gain Bandwidth Bode Plot Slew Rate TL/H/9710 – 4 3 Typical Performance Characteristics (Continued) Distortion vs Frequency Undistorted Output Voltage Swing Open Loop Frequency Response Common-Mode Rejection Ratio Power Supply Rejection Ratio Equivalent Input Noise Voltage Open Loop Voltage Gain (V/V) Output Impedance Inverter Settling Time TL/H/9710 – 5 4 Pulse Response Small Signal Inverting Small Signal Non-Inverting TL/H/9710 – 6 TL/H/9710 – 7 Large Signal Inverting Large Signal Non-Inverting TL/H/9710 – 8 TL/H/9710 – 9 Current Limit (RL e 100 X) TL/H/9710 – 10 5 Application Hints Precautions should be taken to ensure that the power supply for the integrated circuit never becomes reversed in polarity or that the unit is not inadvertently installed backwards in a socket as an unlimited current surge through the resulting forward diode within the IC could cause fusing of the internal conductors and result in a destroyed unit. As with most amplifiers, care should be taken with lead dress, component placement and supply decoupling in order to ensure stability. For example, resistors from the output to an input should be placed with the body close to the input to minimize ‘‘pick-up’’ and maximize the frequency of the feedback pole by minimizing the capacitance from the input to ground. A feedback pole is created when the feedback around any amplifier is resistive.The parallel resistance and capacitance from the input of the device (usually the inverting input) to AC ground set the frequency of the pole. In many instances the frequency of this pole is much greater than the expected 3 dB frequency of the closed loop gain and consequently there is negligible effect on stability margin. However, if the feedback pole is less than approximately 6 times the expected 3 dB frequency a lead capacitor should be placed from the output to the input of the op amp. The value of the added capacitor should be such that the RC time constant of this capacitor and the resistance it parallels is greater than or equal to the original feedback pole time constant. The benefit of the SO package results from its very small size. It follows, however, that the die inside the SO package is less protected from external physical forces than a die in a standard DIP would be, because there is so much less plastic in the SO. Therefore, not following certain precautions when board mounting the LF453CM can put mechanical stress on the die, lead frame, and/or bond wires. This can cause shifts in the LF453CM’s parameters, even causing them to exceed limits specified in the Electrical Characteristics. For recommended practices in LF453CM surface mounting refer to Application Note AN450 ‘‘Surface Mounting Methods and Their Effect on Product Reliability’’ and to the section titled ‘‘Surface Mount’’ found in any Rev 1. Linear Databook volume. These devices are op amps with an internally trimmed input offset voltage and JFET input devices (BI-FET II). These JFETs have large reverse breakdown voltages from gate to source and drain eliminating the need for clamps across the inputs. Therefore, large differential input voltages can easily be accommodated without a large increase in input current. The maximum differential input voltage is independent of the supply voltages. However, neither of the input voltages should be allowed to exceed the negative supply as this will cause large currents to flow which can result in a destroyed unit. Exceeding the negative common-mode limit with the non-inverting input, or with both inputs, will force the output to a high state, potentially causing a reversal of phase to the output. In neither case does a latch occur since raising the input back within the common-mode range again puts the input stage and thus the amplifier in a normal operating mode. Exceeding the positive common-mode limit on a single input will not change the phase of the output; however, if both inputs exceed the limit, the output of the amplifier will be forced to a high state. The amplifiers will operate with a common-mode input voltage equal to the positive supply; however, the gain bandwidth and slew rate may be decreased in this condition. When the negative common-mode voltage swings to within 3V of the negative supply, an increase in input offset voltage may occur. Each amplifier is individually biased by a zener reference which allows normal circuit operation on g 5V power supplies. Supply voltages less than these may result in lower gain bandwidth and slew rate. The amplifiers will drive a 2 kX load resistance to g 10V over the full temperature range of 0§ C to a 70§ C. If the amplifier is forced to drive heavier load currents, however, an increase in input offset voltage may occur on the negative voltage swing and finally reach an active current limit on both positive and negative swings. 6 Detailed Schematic TL/H/9710 – 11 7 LF453 Wide-Bandwidth Dual JFET-Input Operational Amplifiers Physical Dimensions inches (millimeters) SO Package (M) Order Number LF453CM NS Package Number M08A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 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