ICHAUS IC-MFN

iC-MFN
8-FOLD FAIL-SAFE N-FET DRIVER
Rev A2, Page 1/13
FEATURES
APPLICATIONS
♦ 8-fold level shift up to 40 V output voltage
♦ Inputs compatible with TTL and CMOS levels, 40 V voltage
proof
♦ Level shift configurable to 5 V, 10 V or supply voltage
♦ Short-circuit-proof push-pull current sources for driving FETs
slowly
♦ Safe low output state with single errors
♦ Ground and supply voltage monitor
♦ Status output for error and system diagnostics
♦ Temperature range from -40 to 125 °C
♦ Protective ESD circuitry
♦ Operation of N-FETs from 1.8 V,
2.5 V, 3.3 V or 5 V systems
PACKAGES
QFN24
BLOCK DIAGRAM
iC−MFN
IN1
OUT1
IN2
OUT2
IN3
OUT3
IN4
OUT4
IN5
OUT5
IN6
OUT6
IN7
OUT7
IN8
OUT8
EN5
EN10
NOK
ENFS
VBR
Supply, Ground and
VB
Copyright © 2007 iC-Haus
Temperature Monitor
GNDR
GND
http://www.ichaus.com
iC-MFN
8-FOLD FAIL-SAFE N-FET DRIVER
Rev A2, Page 2/13
DESCRIPTION
iC-MFN is a monolithically integrated, 8-channel level
adjustment device which drives N-channel FETs.
The internal circuit blocks have been designed in
such a way that with single errors, such as open
pins (VB, VBR, GND, GNDR) or the short-circuiting
of two outputs, iC-MFN’s output stages switch to a
predefined, safe low state. Externally connected Nchannel FET are thus shut down safely in the event
of a single error.
The inputs of the eight channels consist of a Schmitt
trigger with a pull-down current source and are compatible with TTL and CMOS levels and are voltageproof up to 40 V. The eight channels have a currentlimited push-pull output stage and a pull-down resistor at the output. The hi-level at one of the inputs
EN5, EN10 or ENFS defines the output hi-level and
enables the outputs. The output hi-level is disabled
with the lo-level at all inputs EN5, EN10 and ENFS or
with the hi-level at more than one input.
iC-MFN monitors the supply voltage at VB and VBR
pin and the voltages at the two ground pins GND and
GNDR. Both power supply pins VB and VBR and
both pins GND and GNDR must be connected together externally in order to guarantee the safe low
state of the output stages in the event of error.
puts to be actively tied to GND via the lowside transistors. If the ground potential ceases to be applied
to GND, the outputs are tied to GNDR by pull-down
resistors.
If the connection between the ground potential and
the GND pin is disrupted, the highside and lowside
transistors of the output stages are shut down and
the outputs tied to GNDR via the pull-down resistors.
If on the other hand the connection between ground
potential and the GNDR pin is disrupted, only the
output stage highside transistors are shut down; the
outputs are then actively tied to GND via the lowside
transistors.
Pull-down currents provide the safe lo-level at open
inputs IN1. . . 8, EN5, EN10 and ENFS. The pulldown currents have two stages in order to minimize
power dissipation with enhanced noise immunity.
The status of the device is indicated with the OpenDrain pin NOK and can be used for system diagnostics.
Temperature monitoring protects the device from too
high power dissipation.
The device is protected against destruction by ESD.
Should the supply voltage at VB undershoot a predefined threshold, the voltage monitor causes the out-
iC-MFN
8-FOLD FAIL-SAFE N-FET DRIVER
Rev A2, Page 3/13
PACKAGES QFN24 4 mm x 4 mm to JEDEC
PIN CONFIGURATION QFN24
(top view)
24
23
22
21
PIN FUNCTIONS
No. Name Function
20
19
1
18
2
17
16
3
MFN
code...
...
4
5
15
14
13
6
7
8
9
10
11
12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
OUT1
VB
VBR
EN5
EN10
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
NOK
ENFS
GNDR
GND
OUT8
OUT7
OUT6
OUT5
OUT4
OUT3
OUT2
TP
Output channel 1
Supply Voltage
Supply Voltage (R)
Enable input hi-level = 5V
Enable input hi-level = 10V
Input channel 1
Input channel 2
Input channel 3
Input channel 4
Input channel 5
Input channel 6
Input channel 7
Input channel 8
Output inverted status
Enable input full scale hi-level = VB
Ground (R)
Ground
Output channel 8
Output channel 7
Output channel 6
Output channel 5
Output channel 4
Output channel 3
Output channel 2
TP Thermal-Pad
The Thermal Pad is to be connected to a ground plane on the PCB. Connections between GND, GNDR
and the ground plane should be conciled to system FMEA aspects.
iC-MFN
8-FOLD FAIL-SAFE N-FET DRIVER
Rev A2, Page 4/13
ABSOLUTE MAXIMUM RATINGS
Beyond these values damage may occur; device operation is not guaranteed.
Item
No.
Symbol
Parameter
Conditions
Unit
Min.
Max.
G001 VB, VBR
Supply Voltage
-0.3
40
V
G002 V()
Voltage at OUT1...8, NOK
-0.3
40
V
G003 V()
Voltage at IN1...8, EN5, EN10, ENFS
-0.3
40
V
G004 V(GNDR)
Voltage at GNDR referenced to GND
-0.3
0.3
V
G005 V(GND)
Voltage at GND referenced to GNDR
-0.3
0.3
V
G006 V(VBR)
Voltage at VBR referenced to VB
-0.3
0.3
V
G007 V(VB)
Voltage at VB referenced to VBR
-0.3
0.3
V
G008 Imx()
Current in OUT1...8, NOK, IN1...8,
EN5, EN10, ENFS
-10
10
mA
G009 Imx()
Current in VB, VBR
-10
80
mA
G010 Imx()
Current in GND, GNDR
-80
10
mA
G011 Vd()
ESD susceptibility at all pins
2
kV
G012 Tj
Operating Junction Temperature
-40
140
°C
G013 Ts
Storage Temperature Range
-55
125
°C
HBM 100 pF discharged through 1.5 kΩ
THERMAL DATA
Operating Conditions: VB = VBR = 4.5. . . 40 V, GND = GNDR = 0 V
Item
No.
Symbol
Parameter
Conditions
Unit
Min.
T01
Ta
Operating Ambient Temperature Range
T02
Rthja
Thermal Resistance Chip/Ambient
-40
SMD assembly, no additional cooling areas.
All voltages are referenced to ground unless otherwise stated.
All currents into the device pins are positive; all currents out of the device pins are negative.
Typ.
Max.
125
°C
75
K/W
iC-MFN
8-FOLD FAIL-SAFE N-FET DRIVER
Rev A2, Page 5/13
ELECTRICAL CHARACTERISTICS
Operating Conditions: VB = VBR = 4.5. . . 40 V, GND = GNDR = 0 V, Tj = -40...125 °C unless otherwise stated
Item
No.
Symbol
Parameter
Conditions
Tj
°C
Fig.
Unit
Min.
Typ.
Max.
Total Device
001
002
VB
Permissible Supply Voltage
4.5
40
V
I(VB)
Supply Current in VB
No load, EN5 = lo,EN10 = lo,
ENFS = lo
1.2
3.6
mA
003
I(VB)
Supply Current in VB
No load, EN5 = hi,EN10 = lo,
ENFS = lo, IN1. . . 8 = hi,
VB = 8. . . 40 V
3.2
6.6
mA
004
I(VB)
Supply Current in VB
No load, EN5 = lo, EN10 = hi,
ENFS = lo, IN1. . . 8 = hi,
VB = 13. . . 40 V
3.2
6.8
mA
005
I(VB)
Supply Current in VB
No load, EN5 = lo, EN10 = lo,
ENFS = hi, IN1. . . 8 = hi,
VB = 4.5. . . 40 V
1.3
6.6
mA
006
I(VBR)
Supply Current in VBR
007
I(GND)
Current in GND
No load
-7
008
I(GNDR)
Current in GNDR
No load, all OUTx = hi
tbd
mA
mA
tbd
mA
Current Driver OUT1...8
101
Vc(OUTx)hi Clamp Voltage hi
I() = 10 mA
42
60
V
102
Vc(OUTx)lo Clamp Voltage lo referenced to
I() = -10 mA
the lower voltage of GND, GNDR
-2
-0.4
V
103
Vs(OUTx)hi Saturation Voltage hi referenced
to VB
Vs()hi = VB – V(), INx = hi,
ENFS = hi;
I() = -0.5 mA
I() = -2 mA
0.2
0.8
V
V
104
Vs(OUTx)lo Saturation Voltage lo referenced
to GND
I() = 0.5 mA
I() = 2 mA
0.2
0.8
V
V
105
Vr(OUTx)
Output Voltage regulated, no load EN5 = hi, INx = hi,
I() = 0 mA
4.7
5
5.3
V
9.4
10
10.6
V
106
Vr(OUTx)
Output Voltage regulated, no load EN10 = hi, INx = hi,
I() = 0 mA
107
Ri(OUTx)
Output Resistance
EN10 = hi or EN5 = hi, INx = hi,
I() = ± 2 mA
108
Vl(OUTx)
Output Voltage
I(OUTx) = 2 µA, GND open
109
Ipd(OUTx) Pull-Down Current
V(OUTx) = 1 V, GND open
30
120
µA
110
Rpd(OUTx) Pull-Down Resistor at OUTx
referenced to GNDR
VB, VBR, V(OUTX) = 10 V, GND
open
50
300
kΩ
111
Rpd(OUTx) Pull-Down Resistor at OUTx
referenced to GNDR
VB, VBR, V(OUTX) = 40 V, GND
open
100
600
kΩ
112
Isc(OUTx)lo Short circuit current lo
V() = 0.8 V...VB
113
114
Isc(OUTx)hi Short circuit current hi
V() = 0...VB – 0.8 V
100
500
Ω
600
mV
2
3.6
10
mA
-10
-3
-2
mA
Vsh(OUTx) Output Voltage at short circuit of EN5 = hi,
At two different input signals hi
two outputs
and lo
1
V
115
Vsh(OUTx) Output Voltage at short circuit of EN10 = hi oder ENFS = hi,
At two different input signals hi
two outputs
and lo
1.3
V
116
Vt(OUTx)hi Threshold Voltage hi monitoring
comparator
Vt() = Vr() – V() or
Vt() = VB – V()
117
Vt(OUTx)lo Threshold Voltage lo monitoring
comparator
Vt() = Vr() – V() or
Vt() = VB – V()
118
Vt()hys
Vt()hys = Vt()lo – Vt()hi
Hysteresis
0.8
50
V
2.2
V
300
mV
iC-MFN
8-FOLD FAIL-SAFE N-FET DRIVER
Rev A2, Page 6/13
ELECTRICAL CHARACTERISTICS
Operating Conditions: VB = VBR = 4.5. . . 40 V, GND = GNDR = 0 V, Tj = -40...125 °C unless otherwise stated
Item
No.
Symbol
Parameter
Conditions
Tj
°C
Fig.
Unit
Min.
Typ.
Max.
Input IN1...8, EN5, EN10, ENFS
201
Vc()hi
Clamp Voltage hi
202
Vc()lo
Clamp Voltage lo referenced to
I() = -10 mA
the lower voltage of GND, GNDR
I() = 10 mA
203
Vt()hi
Threshold Voltage hi
204
Vt()lo
Threshold Voltage lo
205
Vt()hys
Input Hysteresis
Vt()hys = Vt()hi – Vt()lo
206
Ipd1()
Pull-Down Current 1
0.4 V < V() < Vt()hi
5
75
207
Ipd2()
Pull-Down Current 2
V() > 1.4 V
5
20
208
Cin()
Input Capacitance
209
Il()
Leakage Current
VB, VBR = 0 V, V() = 0..40 V
42
60
V
-2
-0.4
V
1.15
1.4
V
0.8
1.05
V
200
400
mV
225
350
µA
45
70
µA
20
pF
-10
10
µA
V
Supply and Temperature Monitor
301
VBon
Turn-On Threshold VB
3.8
4.3
302
VBoff
Turn-Off Threshold VB
Decreasing voltage VB
3.4
4.0
303
VBhys
Hysteresis
VBhys = VBon – VBoff
200
304
Toff
Turn-Off Temperature
Increasing temperature
145
160
180
°C
305
Ton
Turn-On temperature
Decreasing temperature
130
147
170
°C
306
Thys
Hysteresis
Thys = Toff – Ton
V
mV
13
°C
Ground Monitor GND, GNDR
401
Vt()hi
Threshold Voltage hi GND
Monitor
Referenced to GNDR
270
mV
402
Vt()lo
Threshold Voltage lo GND
Monitor
Referenced to GNDR
50
403
Vt()hys
Hysteresis
Vt()hys = Vt()hi – Vt()lo
5
404
Vt()hi
Threshold Voltage hi GNDR
Monitor
Referenced to GND
405
Vt()lo
Threshold Voltage lo GNDR
Monitor
Referenced to GND
50
406
Vt()hys
Hysteresis
Vt()hys = Vt()hi – Vt()lo
5
100
mV
407
Vc()hi
Clamp Voltage GNDR hi
referenced to GND
I() = 1 mA
0.4
2
V
408
Vc()lo
Clamp Voltage GNDR lo
referenced to GND
I() = -1 mA
-2
-0.4
V
I() = 10 mA
mV
100
mV
270
mV
mV
Status Output NOK
501
Vc(NOK)hi Clamp Voltage hi
42
60
V
502
Vc(NOK)lo Clamp Voltage lo referenced to
I() = -10 mA
the lower voltage of GND, GNDR
-2
-0.4
V
503
504
Il(NOK)
-20
Vs(NOK)lo Saturation Voltage lo referenced
to GND
I() = 0.5 mA
I() = 2 mA
505
Isc(NOK)lo Short circuit current lo
V() = 0.8 V...VB
Leakage Current
GND < V(NOK) < VB
2
3
20
µA
0.2
0.8
V
V
10
mA
270
mV
Supply Monitor VB, VBR
601
Vt(VB)hi
Threshold Voltage hi VB Monitor Referenced to VBR
602
Vt(VB)lo
Threshold Voltage lo VB Monitor Referenced to VBR
603
Vt(VB)hys Hysteresis
Vt()hys = Vt()hi – Vt()lo
604
Vt(VBR)hi
Threshold Voltage hi VBR
Monitor
Referenced to VB
605
Vt(VBR)lo
Threshold Voltage lo VBR
Monitor
Referenced to VB
606
Vt(VBR)hys Hysteresis
Vt()hys = Vt()hi – Vt()lo
607
Vc(VBR)hi Clamp Voltage hi
I() = 1 mA, Vc() = V(VBR) - V(VB)
608
Vc(VBR)lo Clamp Voltage lo
I() = -1 mA, Vc() = V(VBR) V(VB)
-2
50
5
mV
100
mV
270
mV
5
100
mV
0.4
2
V
-0.4
V
50
iC-MFN
8-FOLD FAIL-SAFE N-FET DRIVER
Rev A2, Page 7/13
ELECTRICAL CHARACTERISTICS
Operating Conditions: VB = VBR = 4.5. . . 40 V, GND = GNDR = 0 V, Tj = -40...125 °C unless otherwise stated
Item
No.
Symbol
Parameter
Conditions
Tj
°C
Fig.
Unit
Min.
Typ.
Max.
Testmode EN5, EN10, ENFS
701
Vt()hi
Threshold Voltage hi disable test EN5 = EN10 = ENFS
702
Vt()lo
Threshold Voltage lo enable test EN5 = EN10 = ENFS
703
Vt()hys
Hysteresis
Vt()hys = Vt()hi – Vt()lo
Propagation delay
INx, EN5 → OUTx
({INx,EN5}lo → hi) → 90 %OUTx
({INx,EN5}hi → lo) → 10 %OUTx
CLoad() = 100 pF
Timing
901 tp(OUTx)
-60
-320
mV
mV
50
160
mV
1
0.45
1.1
µs
902
tp(OUTx)
Propagation delay
INx, EN5 → OUTx
({INx,EN5}lo → hi) → 90 %OUTx
({INx,EN5}hi → lo) → 10 %OUTx
CLoad() = 1 nF
1
1.3
2.4
µs
903
tp(OUTx)
Propagation delay
INx, EN5 → OUTx
({INx,EN5}lo → hi) → 90 %OUTx
({INx,EN5}hi → lo) → 10 %OUTx
CLoad() = 2 nF
1
2.2
3.7
µs
904
tp(OUTx)
Propagation delay
INx, EN5 → OUTx
({INx,EN5}lo → hi) → 90 %OUTx
({INx,EN5}hi → lo) → 10 %OUTx
CLoad() = 5 nF
1
5
8.1
µs
905
tp(OUTx)
Propagation delay
INx, EN10 → OUTx
({INx,EN10}lo → hi) → 90 %OUTx
({INx,EN10}hi → lo) → 10 %OUTx
CLoad() = 100 pF
1
0.7
1.6
µs
906
tp(OUTx)
Propagation delay
INx, EN10 → OUTx
({INx,EN10}lo → hi) → 90 %OUTx
({INx,EN10}hi → lo) → 10 %OUTx
CLoad() = 1 nF
1
2.3
4.1
µs
907
tp(OUTx)
Propagation delay
INx, EN10 → OUTx
({INx,EN10}lo → hi) → 90 %OUTx
({INx,EN10}hi → lo) → 10 %OUTx
CLoad() = 2 nF
1
3.9
7.1
µs
908
tp(OUTx)
Propagation delay
INx, EN10 → OUTx
({INx,EN10}lo → hi) → 90 %OUTx
({INx,EN10}hi → lo) → 10 %OUTx
CLoad() = 5 nF
1
9
16
µs
909
tp(OUTx)
Propagation delay
INx, ENFS → OUTx
({INx,ENFS}lo → hi) → 90 %OUTx
({INx,ENFS}hi → lo) → 10 %OUTx
CLoad() = 100 pF
1
1.4
3.1
µs
910
tp(OUTx)
Propagation delay
INx, ENFS → OUTx
({INx,ENFS}lo → hi) → 90 %OUTx
({INx,ENFS}hi → lo) → 10 %OUTx
CLoad() = 1 nF
1
5.2
9.8
µs
911
tp(OUTx)
Propagation delay
INx, ENFS → OUTx
({INx,ENFS}lo → hi) → 90 %OUTx
({INx,ENFS}hi → lo) → 10 %OUTx
CLoad() = 2 nF
1
9.2
16.7
µs
912
tp(OUTx)
Propagation delay
INx, ENFS → OUTx
({INx,ENFS}lo → hi) → 90 %OUTx
({INx,ENFS}hi → lo) → 10 %OUTx
CLoad() = 5 nF
1
20
35
µs
913
dV()/dt
Slew rate
VB = 24 V, CLoad() = 100 pF
7
18
V/µs
914
dV()/dt
Slew rate
VB = 24 V, CLoad() = 1 nF
2.2
4.5
V/µs
915
dV()/dt
Slew rate
VB = 24 V, CLoad() = 2 nF
1.2
2.5
V/µs
916
dV()/dt
Slew rate
VB = 24 V, CLoad() = 5 nF
0.5
1.2
V/µs
iC-MFN
8-FOLD FAIL-SAFE N-FET DRIVER
Rev A2, Page 8/13
ELECTRICAL CHARACTERISTICS: Diagrams
V(INx, EN5, EN10, ENFS)
Vt()hi
Vt()lo
0
t
V(OUTx)
V()hi
90%
10%
0
t
tp(OUTx)
tp(OUTx)
Figure 1: Propagation delays
iC-MFN
8-FOLD FAIL-SAFE N-FET DRIVER
Rev A2, Page 9/13
DESCRIPTION OF FUNCTIONS
Hi-level output configuration
The device iC-MFN has three adjustable hi-levels for
driving N-channel fets. The configured hi-level is common to all outputs OUTx and the maxmimum level is
the power supply VB potential. The hi-level configuration inputs are used simultaneous for enabling the hilevel at the outputs OUTx. The hi-level at exactly one
input EN5, EN10 or ENFS configure the voltage of hilevel and enable the outputs. If more than one of these
inputs have hi-level the outputs remains disabled. The
hi-level 5 V (configured with EN5 = hi) and 10 V (configured with EN10 = hi) are internally generated by a
voltage reference and regulated. The hi-level VB (configured with ENFS = hi) is an unregulated connection
to VB. In this case the voltage swing depends directly
from the power supply VB.
Output characteristics of the highside transistor
The highside output transistors at the eight channels
demonstrate a resistive behavior with low voltage (VB
– V(OUTx)) and behave as a current source with finite
output resistance with higher voltages.
I(OUTx)
[mA]
3.6
165 Ω
V(OUTx)−Vr(OUTx)
−2.5
−2
−1.5
−1
−0.5
0.5
1
1.5
2
2.5
[V]
−3
Figure 3: Output characteristic of the regulated
push-pull-output at OUTx
Output characteristic of the lowside transistor
The lowside output transistors at the eight channels
demonstrate a resistive behavior with low voltage
V(OUTx) and behave as a current sink with finite output resistance with higher voltages.
I(OUTx)
[mA]
3.6
400 Ω
I(OUTx)
[mA]
VB − V(OUTx)
1
2
3
4
5
[V]
−400Ω
−3
Figure 2: Output characteristic of the highside transistor at OUTx
Output characteristic of the regulated push-pulloutput at OUTx
The hi-level 5 V and 10 V is generated with a regulated
push-pull output and demonstrate a resistive behavior with low voltage changes and behave as a current
source with finite output resistance with higher voltage
changes.
V(OUTx)
1
2
3
4
5
[V]
Figure 4: Output characteristic of the lowside transistor at OUTx
Status output NOK
The status output NOK is a current limited 40 V proof
open-drain output. The output transistor is switched
on if the hi-level of the outputs OUTx are enabled with
exactly one pin ENx, the outputs have reached the voltage levels defined by the inputs INx, the power supply
voltage is above the power-on threshold, the temperature is below the switch off temperature and all power
supply pins are connected.
iC-MFN
8-FOLD FAIL-SAFE N-FET DRIVER
Rev A2, Page 10/13
Pull-down currents
In order to enhance noise immunity with limited power
dissipation at inputs INx, EN5, EN10 and ENFS the
pull-down currents at these pins have two stages. With
a rise in voltage at input pins INx, EN5, EN10 und
ENFS the pull-down current remains high until Vt()hi
(Electrical Characteristics No. 203); above this threshold the device switches to a lower pull-down current.
If the voltage falls below Vt()lo (Electrical Characteristics No. 204), the device switches back to a higher
pull-down current.
Ipd()
V() increasing
Ipd1()
Ipd2()
V() decreasing
Vt()hi
Vt()lo
V()
Figure 5: Pull-down currents at INx, EN5, EN10 and
ENFS
DETECTING SINGLE ERRORS
If single errors are detected, safety-relevant applications require externally connected switching transistors
to be specifically shut down. Single errors can occur
when a pin is open (due to a disconnected bonding
wire or a bad solder connection, for example) or when
two pins are short-circuited.
I(OUTx)
[mA]
3.6
400 Ω
When two output of different logic levels are shortcircuited, the driving capability of the lowside driver will
predominate, keeping the connected N-channel FETs
in a safe shutdown state.
With open pins VB, VBR, GND or GNDR iC-MFN
switches the output stages to a safe, predefined low
state via pull-down resistors and current sources at
the outputs, subsequently shutting down any externally
connected N-channel FETs.
Loss of VB potential
If power supply potential is no longer applied to the VBpin, the output stage highside drivers are shut down
and the outputs actively tied to GND via the lowside
drivers.
V(OUTx)
1
2
3
4
5
[V]
Figure 6: Output characeristics at OUTx with loss of
VB, VBR or GNDR
Loss of GND potential
If ground potential is not longer applied to GND, the
output stages are shut down and the outputs tied to
GNDR via current sources and internal pull-down resistors with a typical value of 200 kΩ.
I(OUTx)
[µA]
200 kΩ
80
Loss of VBR potential
If power supply potential is no longer applied to the
VBR-pin, the output stage highside drivers are shut
down and the outputs actively tied to GND via the lowside drivers.
Loss of GNDR potential
If ground potential is no longer applied to the GNDRpin, the output stage highside drivers are shut down
and the outputs actively tied to GND via the lowside
drivers.
V(OUTx)
1
2
3
4
5
[V]
Figure 7: Output characeristics at OUTx with loss of
GND
iC-MFN
8-FOLD FAIL-SAFE N-FET DRIVER
Rev A2, Page 11/13
APPLICATION NOTES
Driving an N-channel MOSFET
One typical field of application for iC-MFN is in the operation of N-FETs with microprocessor output signals,
as shown in Figure 8.
Vth (FET)
−Isc(OUTx)hi
(1)
tt1 ..t2 [µs] = Crss @(Vds = hi) ×
VB
−Isc(OUTx)hi
(2)
VB
iC−MFN
3.3V
tt0 ..t1 [µs] = Ciss @(Vds = hi) ×
IN1
OUT1
IN2
OUT2
RL
OUT3
IN3
VD
Microcontroller
IN4
OUT4
IN5
OUT5
IN6
OUT6
IN7
OUT7
IN8
OUT8
tt2 ..t3 [µs] = Ciss @(Vds = lo) ×
EN5
EN10
NOK
ENFS
VBR
VB
Supply, Ground and
VB
Temperature Monitor
Vr(OUTx) − Vth (FET)
−Isc(OUTx)hi
(3)
GNDR
GND
ton = tt0 ..t1 + tt1 ..t2 + tt2 ..t3
Figure 8: Driving an N-channel MOSFET
Slowly switching of a transistor is done with a current
limited driver. Figure 9 shows the different phases of
a turn on process with resitive load. In Section t0 to
t1 the gate of the transistors is loaded to the threshold
voltage Vth(FET) and is a dead time. In section t1 to t2
the gate voltage keeps nearly constant (miller-plateau)
during the drain voltage slope. The slew rate depends
on the current of the driver and the gate-drain capacitor of the transistor. In section t2 to t3 the gate voltage
reach the static value. The transistor thus goes low
ohmic and minimizes the power dissipation. The equations 1 to 4 are simplified and give an estimation of the
timing on the basis of data from the specifications of
the device iC-MFN and the used transistor. The turn off
looks similar to the turn on but with reverse run trough.
V(OUTx)
Vr()
Vth(FET)
t
VD
VB
t
t0
t1
t2
t3
Figure 9: On switching of a transistor
(4)
Ciss = Cgs + Cgd = voltage dependent gate-source and
gate-drain capacitor [nF]
Crss = Cgd = voltage dependent gate-drain capacitor
[nF]
Isc(OUTx)lo = short circuit current lo at OUTx [mA]
tt0 ..t1 = dead time [µs]
tt1 ..t2 = slope time at drain (Miller-Plateau) [µs]
tt2 ..t3 = time to reach static gate voltage [µs]
ton = overall turn on time [µs]
VB = power supply VB [V]
Vr(OUTx) = configured static turn on voltage at OUTx
[V]
Vth (FET) = threshold of the transistor [V]
iC-MFN
8-FOLD FAIL-SAFE N-FET DRIVER
Rev A2, Page 12/13
Example
Turn on calculation with following estimations:
Ciss @(Vds = 24 V ) = 1.5 nF
Ciss @(Vds = 1 V ) = 3 nF
Crss @(Vds = 24 V ) = 0.3 nF
Isc(OUTx)hi = -4 mA
VB = 24 V
Vr(OUTx) = 10 V
Vth (FET) = 3 V
From this follows:
tt0 ..t1 = 1.13 µs
tt1 ..t2 = 1.8 µs
tt2 ..t3 = 5.25 µs
ton = 8.18 µs
The slew rate at the drain of transistor is: 13.3 V/µs
Figure 10 shows the turn on and off at one channel
with pin INx. The pulse duration at pin NOK, especially
at turn on, can be used for monitoring the connected
transistor and the load.
INx
V(OUTx)
VD
V(NOK)
t
Figure 10: Turn on and off one channel with INx
Figure 11: Circuit diagram one channel with monitoring comparator
This specification is for a newly developed product. iC-Haus therefore reserves the right to change or update, without notice, any information contained herein,
design and specification; and to discontinue or limit production or distribution of any product versions. Please contact iC-Haus to ascertain the current data.
Copying – even as an excerpt – is only permitted with iC-Haus approval in writing and precise reference to source.
iC-Haus does not warrant the accuracy, completeness or timeliness of the specification on this site and does not assume liability for any errors or omissions
in the materials. The data specified is intended solely for the purpose of product description. No representations or warranties, either express or implied, of
merchantability, fitness for a particular purpose or of any other nature are made hereunder with respect to information/specification or the products to which
information refers and no guarantee with respect to compliance to the intended use is given. In particular, this also applies to the stated possible applications or
areas of applications of the product.
iC-Haus conveys no patent, copyright, mask work right or other trade mark right to this product. iC-Haus assumes no liability for any patent and/or other trade
mark rights of a third party resulting from processing or handling of the product and/or any other use of the product.
iC-MFN
8-FOLD FAIL-SAFE N-FET DRIVER
Rev A2, Page 13/13
ORDERING INFORMATION
Type
Package
Order Designation
iC-MFN
QFN24 4 mm
iC-MFN QFN24
For technical support, information about prices and terms of delivery please contact:
iC-Haus GmbH
Am Kuemmerling 18
D-55294 Bodenheim
GERMANY
Tel.: +49 (61 35) 92 92-0
Fax: +49 (61 35) 92 92-192
Web: http://www.ichaus.com
E-Mail: [email protected]
Appointed local distributors: http://www.ichaus.de/support_distributors.php