SCH5027D Super I/O with Temperature Sensing, Quiet Auto Fan and Glue Logic with

SCH5027D-NW
Super I/O with Temperature Sensing, Quiet Auto Fan and
Glue Logic with PECI
Product Features
• General Features
- 3.3 Volt Operation (SIO Block is 5 Volt Tolerant)
- LPC Interface
- Programmable Wake-up Event Interface
- PC99, PC2001 Compliant
- ACPI 2.0 Compliant
- Multiplexed Command, Address and Data
Bus
- Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems
- PME Interface
- ISA Plug-and-Play Compatible Register Set
- 25 General Purpose Input/Output Pins
- System Management Interrupt
- AC Power Failure Recovery
- Operating Temperature Range of 0oC to
+70oC
• Watchdog Timer
• 2.88 MB Super I/O Floppy Disk Controller
- Licensed CMOS 765B Floppy Disk Controller
- Software and Register Compatible with
Microchip's Proprietary 82077AA Compatible
Core
- Supports One Floppy Drive
- Configurable Open Drain/Push-PullOutput
Drivers
- Supports Vertical Recording Format
- 16-Byte Data FIFO
- 100% IBM® Compatibility
- Detects All Overrun and Underrun Conditions
- Sophisticated Power Control Circuitry (PCC)
Including Multiple Powerdown Modes for
Reduced Power Consumption
- DMA Enable Logic
- Data Rate and Drive Control Registers
- 480 Address, Up to Eight IRQ and Three
DMA Options
- Support 3 Mode FDD
- Enhanced Digital Data Separator
- 2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps, 250
Kbps Data Rates
- Programmable Precompensation Modes
• Serial Ports
- Two Full Function Serial Ports
- High Speed NS16C550A Compatible UARTs
with Send/Receive 16-Byte FIFOs
- Supports 230k and 460k Baud
 2014 Microchip Technology Inc.
•
•
•
•
- Programmable Baud Rate Generator
- Modem Control Circuitry
- 480 Address and 15 IRQ Options
Infrared Port
- Multiprotocol Infrared Interface
- IrDA 1.0 Compliant
- SHARP ASK IR
- 480 Addresses, Up to 15 IRQ
Multi-Mode™ Parallel Port with ChiProtect™
- Standard Mode IBM PC/XT®, PC/AT®, and
PS/2™ Compatible Bi-directional Parallel
Port
- Enhanced Parallel Port (EPP) Compatible EPP 1.7 and EPP 1.9 (IEEE 1284 Compliant)
- IEEE 1284 Compliant Enhanced Capabilities
Port (ECP)
- ChiProtect Circuitry for Protection
- 960 Address, Up to 15 IRQ and Three DMA
Options
Keyboard Controller
- 8042 Software Compatible
- 8 Bit Microcomputer
- 2k Bytes of Program ROM
- 256 Bytes of Data RAM
- Four Open Drain Outputs Dedicated for Keyboard/Mouse Interface
- Asynchronous Access to Two Data Registers
and One Status Register
- Supports Interrupt and Polling Access
- 8 Bit Counter Timer
- Port 92 Support
- Fast Gate A20 and KRESET Outputs
Motherboard GLUE Logic
- IDE Reset Output
- (4) Buffered PCI Reset Outputs with software
controlled reset capability - default transparent
- Front Panel Reset Debouncing and Power
Good Signal Generation
- Power Supply Turn On Circuitry with Support
for power button on PS/2 Keyboard
- Resume Reset Signal Generation
- SMBus Isolation Circuitry (2 sets external
and 1 set internal for Hardware Monitoring
Block)
- SMBus 2.0 compliant interface for Hardware
Monitoring
- LED Control (2)
DS00001782A-page 1
SCH5027D-NW
• Fan Control
- 5 PWM (Pulse width Modulation) Outputs
- Two and three piece linear fan function
options
- Low frequency and high frequency PWM
support
- 6 Fan Tachometer Inputs
- Programmable automatic fan control based
on temperature
- Interrupt Pin for out-of-limit Fantach Events
- Fantach events generate PMEs
• Temperature Monitor
- Monitoring of Two Remote Thermal Diodes
- Processor temperature monitoring by PECI
- Internal Ambient Temperature Measurement
- Limit Comparison of all Monitored Values
- Interrupt Pin for out-of-limit Temperature Indication
- Thermal events generate PMEs
- Configurable offset for internal or external
temperature channels.
• Voltage Monitor
- Monitor Power supplies (2 at 1.125V, one at
5V, one each for Vccp, Vbat, VTR, and VCC)
- Limit Comparison of all Monitored Values
- Interrupt Pin for out-of-limit Voltage Indication
- Voltage events generate PMEs
• Security Features
- Security Key Register (32 byte) for Device
Authentication
• 3 VID (Voltage Identification) Inputs
• Phoenix Keyboard BIOS ROM
• 128-Pin QFP RoHS Compliant Package
Description
tem Management Bus (SMBus). The same interrupt
event reported on the nHWM_INT pin also creates
PME wakeup events and speaker alarm annunciation.
The SCH5027D-NW also allows for a two or three
piece linear fan function.
The Motherboard Glue logic includes various power
management and system logic including generation of
nRSMRST, SMBus buffers, and buffered PCI reset outputs.
The SCH5027D-NW incorporates complete legacy
Super I/O functionality including an 8042 based keyboard and mouse controller, an IEEE 1284, EPP, and
ECP compatible parallel port, one serial port that is
16C550A UART compatible, one IrDA 1.0 infrared
ports, and a floppy disk controller with Microchip's true
CMOS 765B core and enhanced digital data separator,
The true CMOS 765B core provides 100% compatibility
with IBM PC/XT and PC/AT architectures and is software and register compatible with Microchip's proprietary 82077AA core. System related functionality,
which offers flexibility to the system designer, General
Purpose I/O control functions, control of two LED's, and
fan control using fan tachometer inputs and pulse width
modulator (PWM) outputs
The SCH5027D-NW is ACPI 1.0/2.0 compatible and
therefore supports multiple low power-down modes. It
incorporates sophisticated power control circuitry
(PCC), which includes support for keyboard and mouse
wake-up events.
The SCH5027D-NW supports the ISA Plug-and-Play
Standard register set (Version 1.0a). The I/O Address,
DMA Channel and hardware IRQ of each logical device
in the SCH5027D-NW may be reprogrammed through
the internal configuration registers. There are up to 480
(960 - Parallel Port) I/O address location options, a
Serialized IRQ interface, and Three DMA channels.
The SCH5027D-NW is a 3.3V (Super I/O Block is 5V
tolerant) PC99/PC2001 compliant Super I/O controller
with an LPC interface. SCH5027D-NW also includes
Hardware Monitoring capabilities, enhanced Security
features, Power Control logic and Motherboard Glue
logic.
The SCH5027D-NW's hardware monitoring capability
includes temperature, voltage and fan speed monitoring. It has the ability to alert the system to out-of-limit
conditions and automatically control the speeds of multiple fans. There are four analog inputs for monitoring
external voltages, two at 1.125V, one at 5V and one at
2.25V for Vccp (core processor voltage). There is also
internal monitoring of the SIO's VCC, VTR, and Vbat
power supplies. The SCH5027D-NW includes support
for monitoring two external temperatures via thermal
diode inputs and an internal sensor for measuring
ambient temperature. The nHWM_INT pin is implemented to indicate out-of-limit temperature, voltage,
and FANTACH conditions. The hardware monitoring
block of the SCH5027D-NW is accessible via the Sys-
DS00001782A-page 2
 2014 Microchip Technology Inc.
SCH5027D-NW
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 2014 Microchip Technology Inc.
DS00001782A-page 3
SCH5027D-NW
BLOCK DIAGRAM
CLK32
CLOCKI
WDT*
WDT
CLOCK
GEN
SER_IRQ
PCI_CLK
SERIAL
IRQ
LAD[3:0]
LPC
Bus Interface
LFrame#
Internal Bus
(Data, Address, and Control lines)
PCI_RESET#
High-Speed
16550A
UART
PORT 2
S
M
b
u
s
SDA
SCLK
SDA1
SCLK1
SDA2
SCLK2
SMbus
Isolation
Switch
DS00001782A-page 4
PCI_RESET#
96 Mhz
PCI Reset
Outputs
14.318Mhz
HWN_INT
SLP_S5#
nRDATA, nWDATA
SLP_S3#
nDSKCHG, nDS0,
Vbat
nDIR, nSTEP
VTR
DRVDEN0*, nWRTPRT
Proprietary
82077
Compatible
Floppydisk
Controller with
Digital Data
Separator &
Write Precompensation
PD[7,0]
BUSY, SLCT, PE,
nERROR, nACK
nSTROBE, nINIT,
nSLCTIN, nALF
TXD1*, RXD1
nCTS1, nRTS1*
nDSR1, nDTR1
nDCD1, nRI1
TXD2 (IRTX)*,
RXD2 (IRRX)*
CTS2*, RTS2 *
DSR2*, DTR2*
DCD2*, RI2*
32 byte
Security
Key
Register
VCC
nWGATE, nHDSEL
General
Purpose
I/O
Keyboard/Mouse
8042
controller
Power Control
and Recovery
Hardware
Monitor
Intruder
Detection
nHWM_INT
Vref
PECI
READY
VID3/PWMA
VID4/PWMB
VID5 / FANTACH3
V1_IN
V2_IN
VCCP_IN
+2.5VTR_IN
Remote1Remote1+
Remote2Remote2+
PWM1/xTest Out
PWM2
PWM3/ ADDR_EN#
FANTACH1
FANTACH2
FANTACH4/ ADDR_SEL
PWMA*, PWMB*
FANTACHA*
FANTACHB*
nMTR0, nTRK0, InNDEX
Multi-Mode
Parallel Port
with
ChiProtectTM/
FDC MUX
(see LPC47B27x)
Power Mgmt
GP1[0:4]*, GP21*,GP22*
GP27*, GP32*,GP33*
GP36*, GP37* , GP4[0,2,3]*
GP5[0:1]*, GP6[0:1]*
LEDs
High-Speed
16550A
UART
PORT 1
LDRQ#
IO_PME_S3*
IO_PME_S5*
IO_SMI*
LED2*
SCH5027D-NW BLOCK DIAGRAM
LED1*
FIGURE 1:
nIDE_RSTDRV*
nPCIRST_OUT[1:4]*
MCLK*, MDAT*
A20M*
nKBDRST*
KCLK*, KDAT*
nFPRST, PB_IN#
PWRGD_PS
SLP_S3#, SLP_S5#
`
PWRGD_CPU ,
PWRGD_3V
SLP_S3DEL#
PS_ON
nRSMRST
nINTRD_IN
Note 1: This diagram does not show power and ground
connections.
Note 2: Signal names followed by an asterisk (*) are
located on multifunction pins. This diagram is designed to
show the various functions available on the chip and
should not be used as a pin layout.
 2014 Microchip Technology Inc.
SCH5027D-NW
PACKAGE OUTLINE
128-PIN QFP PACKAGE, 14MM X 20MM X 2.7MM BODY, 3.2MM FOOTPRINT
Note: For the most current package drawings,
see the Microchip Packaging Specification at
http://www.microchip.com/packaging
FIGURE 2:
 2014 Microchip Technology Inc.
DS00001782A-page 5
SCH5027D-NW
APPENDIX A:
TABLE A-1:
PRODUCT BRIEF REVISION HISTORY
REVISION HISTORY
Revision
DS00001782A (07-02-14)
DS00001782A-page 6
Section/Figure/Entry
Correction
Replaces previous version Rev. 0.36 (06-08-07)
 2014 Microchip Technology Inc.
SCH5027D-NW
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Technical support is available through the web site at: http://www.microchip.com/support
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DS00001782A-page 7
SCH5027D-NW
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.(1)
-
Device
Device:
Package:
Tape and Reel
Option:
XXX(2)
Package
[X](3)
-
Tape and Reel
Option
Example:
SCH5027D-NW = 128-pin QFP
SCH5027D-NW (1)
NW
= 128-pin QFP (2) RoHS Compliant package
Blank
TR
= Tray packaging
= Tape and Reel (3)
DS00001782A-page 8
Note 1:
These products meet the halogen maximum
concentration values per IEC61249-2-21.
Note 2:
All package options are RoHS compliant.
For RoHS compliance and environmental
information, please visit http://www.microchip.com/pagehandler/en-us/aboutus/
ehs.html .
Note 3:
Tape and Reel identifier only appears in the
catalog part number description. This identifier is used for ordering purposes and is not
printed on the device package. Check with
your Microchip Sales Office for package
availability with the Tape and Reel option.
 2014 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device applications and the like is provided only for your convenience and may be
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otherwise, under any Microchip intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC, FlashFlex, flexPWR, JukeBlox, KEELOQ, KEELOQ logo, Kleer, LANCheck,
MediaLB, MOST, MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC, SST, SST Logo, SuperFlash and
UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
The Embedded Control Solutions Company and mTouch are registered trademarks of Microchip Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, ECAN, In-Circuit Serial
Programming, ICSP, Inter-Chip Connectivity, KleerNet, KleerNet logo, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK,
MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, RightTouch logo, REAL ICE, SQI, Serial
Quad I/O, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries.
GestIC is a registered trademarks of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in
other countries.
All other trademarks mentioned herein are property of their respective companies.
© 2014, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.
ISBN: 9781632763174
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DS00001782A-page 9
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